Commit 895e239b authored by 陳永達's avatar 陳永達

Merge branch 'neuros' of...

Merge branch 'neuros' of ssh://git@git.neuros.com.cn/git/git-pub/osd20/linux-davinci-2.6 into neuros
parents c918194f 3ed322c3
...@@ -136,11 +136,10 @@ void ccdc_config_ycbcr(ccdc_params_ycbcr * params) ...@@ -136,11 +136,10 @@ void ccdc_config_ycbcr(ccdc_params_ycbcr * params)
else else
{ {
/* configure ccdc register for progressive mode */ /* configure ccdc register for progressive mode */
regw(0x5a0,HSIZE_OFF);
ccdc_setwin(params); ccdc_setwin(params);
regw(((params->win.width * 2) + 31) & 0xffffffe0, HSIZE_OFF);
regw((params->pix_order << 11) | 0x8000, CCDCFG); regw((params->pix_order << 11) | 0x8000, CCDCFG);
regw((0x00031000)|(0x1 << 17)|(0x1 << 16)|(0x1 << 3)|(0x1 << 4), SYN_MODE); regw((0x1 << 12)|(0x1 << 17)|(0x1 << 16)|(0x1 << 3)|(0x1 << 4), SYN_MODE);
} }
} }
...@@ -90,6 +90,7 @@ static struct v4l2_fract pal_aspect = VPFE_PIXELASPECT_PAL; ...@@ -90,6 +90,7 @@ static struct v4l2_fract pal_aspect = VPFE_PIXELASPECT_PAL;
static struct v4l2_rect ntscsp_bounds = VPFE_WIN_NTSC_SP; static struct v4l2_rect ntscsp_bounds = VPFE_WIN_NTSC_SP;
static struct v4l2_rect palsp_bounds = VPFE_WIN_PAL_SP; static struct v4l2_rect palsp_bounds = VPFE_WIN_PAL_SP;
static struct v4l2_rect hd_480p_bounds = VPFE_WIN_HD480P; static struct v4l2_rect hd_480p_bounds = VPFE_WIN_HD480P;
static struct v4l2_rect hd_576p_bounds = VPFE_WIN_HD576P;
static struct v4l2_rect hd_720p_bounds = VPFE_WIN_HD720P; static struct v4l2_rect hd_720p_bounds = VPFE_WIN_HD720P;
static struct v4l2_rect hd_1080i_bounds = VPFE_WIN_HD1080I; static struct v4l2_rect hd_1080i_bounds = VPFE_WIN_HD1080I;
static struct v4l2_fract sp_aspect = VPFE_PIXELASPECT_NTSC_SP; static struct v4l2_fract sp_aspect = VPFE_PIXELASPECT_NTSC_SP;
...@@ -613,6 +614,33 @@ static int vpfe_doioctl(struct inode *inode, struct file *file, ...@@ -613,6 +614,33 @@ static int vpfe_doioctl(struct inode *inode, struct file *file,
vpfe->ccdc_params.frm_fmt = CCDC_FRMFMT_PROGRESSIVE; vpfe->ccdc_params.frm_fmt = CCDC_FRMFMT_PROGRESSIVE;
vpfe->ccdc_params.pix_fmt = CCDC_PIXFMT_YCBCR_16BIT; vpfe->ccdc_params.pix_fmt = CCDC_PIXFMT_YCBCR_16BIT;
} }
else if (id & V4L2_STD_HD_576P)
{
vpfe->std = id;
vpfe->bounds = vpfe->vwin = hd_576p_bounds;
vpfe->pixelaspect = sp_aspect;
vpfe->ccdc_params.win = hd_576p_bounds;
vpfe->ccdc_params.frm_fmt = CCDC_FRMFMT_PROGRESSIVE;
vpfe->ccdc_params.pix_fmt = CCDC_PIXFMT_YCBCR_16BIT;
}
else if (id & V4L2_STD_HD_720P)
{
vpfe->std = id;
vpfe->bounds = vpfe->vwin = hd_720p_bounds;
vpfe->pixelaspect = sp_aspect;
vpfe->ccdc_params.win = hd_720p_bounds;
vpfe->ccdc_params.frm_fmt = CCDC_FRMFMT_PROGRESSIVE;
vpfe->ccdc_params.pix_fmt = CCDC_PIXFMT_YCBCR_16BIT;
}
else if (id & V4L2_STD_HD_1080I)
{
vpfe->std = id;
vpfe->bounds = vpfe->vwin = hd_1080i_bounds;
vpfe->pixelaspect = sp_aspect;
vpfe->ccdc_params.win = hd_1080i_bounds;
vpfe->ccdc_params.frm_fmt = CCDC_FRMFMT_INTERLACED;
vpfe->ccdc_params.pix_fmt = CCDC_PIXFMT_YCBCR_16BIT;
}
else else
{ {
ret = -EINVAL; ret = -EINVAL;
......
...@@ -190,7 +190,7 @@ static const struct i2c_reg_value tvp7000_init_component[] = { ...@@ -190,7 +190,7 @@ static const struct i2c_reg_value tvp7000_init_component[] = {
TVP7000_SOG_CLAMP, 0x80 TVP7000_SOG_CLAMP, 0x80
}, },
{ /* 0x31 */ { /* 0x31 */
TVP7000_ALC_PLACEMENT, 0x00 TVP7000_ALC_PLACEMENT, 0x18
}, },
}; };
...@@ -320,6 +320,11 @@ struct tvp7000_video_std ...@@ -320,6 +320,11 @@ struct tvp7000_video_std
u8 plldiv_lsb; u8 plldiv_lsb;
u8 pll_ctrl; u8 pll_ctrl;
u8 phase_select_bit0; u8 phase_select_bit0;
u8 pre_coast;
u8 post_coast;
u8 clamp_start;
u8 clamp_width;
u8 alc_placement;
}; };
static const struct tvp7000_video_std video_std[] = { static const struct tvp7000_video_std video_std[] = {
...@@ -450,6 +455,11 @@ static const struct tvp7000_video_std video_std[] = { ...@@ -450,6 +455,11 @@ static const struct tvp7000_video_std video_std[] = {
.plldiv_lsb = 0x40, .plldiv_lsb = 0x40,
.pll_ctrl = 0x68, .pll_ctrl = 0x68,
.phase_select_bit0 = 0x01, .phase_select_bit0 = 0x01,
.pre_coast = 0x03,
.post_coast = 0x0c,
.clamp_start = 0x06,
.clamp_width = 0x10,
.alc_placement = 0x18,
}, },
{ /* Video standard: 720*576p resolution,50HZ refresh rate, { /* Video standard: 720*576p resolution,50HZ refresh rate,
31.25kHZ Horizontal frequency,27MHZ pixel rate. 31.25kHZ Horizontal frequency,27MHZ pixel rate.
...@@ -458,6 +468,11 @@ static const struct tvp7000_video_std video_std[] = { ...@@ -458,6 +468,11 @@ static const struct tvp7000_video_std video_std[] = {
.plldiv_lsb = 0x00, .plldiv_lsb = 0x00,
.pll_ctrl = 0x68, .pll_ctrl = 0x68,
.phase_select_bit0 = 0x01, .phase_select_bit0 = 0x01,
.pre_coast = 0x03,
.post_coast = 0x0c,
.clamp_start = 0x06,
.clamp_width = 0x10,
.alc_placement = 0x18,
}, },
{ /* Video standard: 1280*720p resolution,60HZ refresh rate, { /* Video standard: 1280*720p resolution,60HZ refresh rate,
45kHZ Horizontal frequency,74.25MHZ pixel rate. 45kHZ Horizontal frequency,74.25MHZ pixel rate.
...@@ -466,6 +481,11 @@ static const struct tvp7000_video_std video_std[] = { ...@@ -466,6 +481,11 @@ static const struct tvp7000_video_std video_std[] = {
.plldiv_lsb = 0x20, .plldiv_lsb = 0x20,
.pll_ctrl = 0xA8, .pll_ctrl = 0xA8,
.phase_select_bit0 = 0x00, .phase_select_bit0 = 0x00,
.pre_coast = 0x0,
.post_coast = 0x0,
.clamp_start = 0x32,
.clamp_width = 0x20,
.alc_placement = 0x5a,
}, },
{ /* Video standard: 1280*720p resolution,50HZ refresh rate, { /* Video standard: 1280*720p resolution,50HZ refresh rate,
37.5kHZ Horizontal frequency,74.25MHZ pixel rate. 37.5kHZ Horizontal frequency,74.25MHZ pixel rate.
...@@ -474,6 +494,11 @@ static const struct tvp7000_video_std video_std[] = { ...@@ -474,6 +494,11 @@ static const struct tvp7000_video_std video_std[] = {
.plldiv_lsb = 0xC0, .plldiv_lsb = 0xC0,
.pll_ctrl = 0xA8, .pll_ctrl = 0xA8,
.phase_select_bit0 = 0x00, .phase_select_bit0 = 0x00,
.pre_coast = 0x0,
.post_coast = 0x0,
.clamp_start = 0x32,
.clamp_width = 0x20,
.alc_placement = 0x5a,
}, },
{ /* Video standard: 1920*1080i resolution,60HZ refresh rate, { /* Video standard: 1920*1080i resolution,60HZ refresh rate,
33.75kHZ Horizontal frequency,74.25MHZ pixel rate. 33.75kHZ Horizontal frequency,74.25MHZ pixel rate.
...@@ -482,6 +507,11 @@ static const struct tvp7000_video_std video_std[] = { ...@@ -482,6 +507,11 @@ static const struct tvp7000_video_std video_std[] = {
.plldiv_lsb = 0x80, .plldiv_lsb = 0x80,
.pll_ctrl = 0xA8, .pll_ctrl = 0xA8,
.phase_select_bit0 = 0x00, .phase_select_bit0 = 0x00,
.pre_coast = 0x03,
.post_coast = 0x0,
.clamp_start = 0x32,
.clamp_width = 0x20,
.alc_placement = 0x5a,
}, },
{ /* Video standard: 1920*1080i resolution,50HZ refresh rate, { /* Video standard: 1920*1080i resolution,50HZ refresh rate,
28.125kHZ Horizontal frequency,74.25MHZ pixel rate. 28.125kHZ Horizontal frequency,74.25MHZ pixel rate.
...@@ -490,6 +520,11 @@ static const struct tvp7000_video_std video_std[] = { ...@@ -490,6 +520,11 @@ static const struct tvp7000_video_std video_std[] = {
.plldiv_lsb = 0x00, .plldiv_lsb = 0x00,
.pll_ctrl = 0xA8, .pll_ctrl = 0xA8,
.phase_select_bit0 = 0x00, .phase_select_bit0 = 0x00,
.pre_coast = 0x03,
.post_coast = 0x0,
.clamp_start = 0x32,
.clamp_width = 0x20,
.alc_placement = 0x5a,
}, },
{ /* Video standard: 1920*1080p resolution,60HZ refresh rate, { /* Video standard: 1920*1080p resolution,60HZ refresh rate,
67.5kHZ Horizontal frequency,148.5MHZ pixel rate. 67.5kHZ Horizontal frequency,148.5MHZ pixel rate.
...@@ -498,6 +533,11 @@ static const struct tvp7000_video_std video_std[] = { ...@@ -498,6 +533,11 @@ static const struct tvp7000_video_std video_std[] = {
.plldiv_lsb = 0x80, .plldiv_lsb = 0x80,
.pll_ctrl = 0xD8, .pll_ctrl = 0xD8,
.phase_select_bit0 = 0x00, .phase_select_bit0 = 0x00,
.pre_coast = 0x0,
.post_coast = 0x0,
.clamp_start = 0x32,
.clamp_width = 0x20,
.alc_placement = 0x5a,
}, },
{ /* Video standard: 1920*1080p resolution,50HZ refresh rate, { /* Video standard: 1920*1080p resolution,50HZ refresh rate,
56.25kHZ Horizontal frequency,148.5MHZ pixel rate. 56.25kHZ Horizontal frequency,148.5MHZ pixel rate.
...@@ -506,12 +546,14 @@ static const struct tvp7000_video_std video_std[] = { ...@@ -506,12 +546,14 @@ static const struct tvp7000_video_std video_std[] = {
.plldiv_lsb = 0x00, .plldiv_lsb = 0x00,
.pll_ctrl = 0xD8, .pll_ctrl = 0xD8,
.phase_select_bit0 = 0x00, .phase_select_bit0 = 0x00,
.pre_coast = 0x0,
.post_coast = 0x0,
.clamp_start = 0x32,
.clamp_width = 0x20,
.alc_placement = 0x5a,
}, },
}; };
static __init int tvp7000_init(void);
static __exit void tvp7000_exit(void);
static int tvp7000_attach_adapter(struct i2c_adapter *adapter); static int tvp7000_attach_adapter(struct i2c_adapter *adapter);
static int tvp7000_detach_client(struct i2c_client *client); static int tvp7000_detach_client(struct i2c_client *client);
...@@ -671,6 +713,12 @@ static int tvp7000_setup_video_standard(const struct tvp7000_video_std *std) ...@@ -671,6 +713,12 @@ static int tvp7000_setup_video_standard(const struct tvp7000_video_std *std)
val &= ~0x01; val &= ~0x01;
err |= tvp7000_write_reg(TVP7000_PHASE_SELECT, (std->phase_select_bit0 & 0x01) | val); err |= tvp7000_write_reg(TVP7000_PHASE_SELECT, (std->phase_select_bit0 & 0x01) | val);
err |= tvp7000_write_reg(TVP7000_PRE_COAST, std->pre_coast);
err |= tvp7000_write_reg(TVP7000_POST_COAST, std->post_coast);
err |= tvp7000_write_reg(TVP7000_CLAMP_START, std->clamp_start);
err |= tvp7000_write_reg(TVP7000_CLAMP_WIDTH, std->clamp_width);
err |= tvp7000_write_reg(TVP7000_ALC_PLACEMENT, std->alc_placement);
return err; return err;
} }
...@@ -728,12 +776,23 @@ static int tvp7000_device_cmd(u32 cmd, void *arg) ...@@ -728,12 +776,23 @@ static int tvp7000_device_cmd(u32 cmd, void *arg)
struct vpfe_capture_params *params = struct vpfe_capture_params *params =
(struct vpfe_capture_params *)arg; (struct vpfe_capture_params *)arg;
if (params->amuxmode == VPFE_AMUX_COMPONENT) switch (params->mode)
{ {
case V4L2_STD_HD_480P:
ret = tvp7000_setup_video_standard(STD(VIDEO480P60HZ)); ret = tvp7000_setup_video_standard(STD(VIDEO480P60HZ));
} break;
else case V4L2_STD_HD_576P:
ret = tvp7000_setup_video_standard(STD(VIDEO576P50HZ));
break;
case V4L2_STD_HD_720P:
ret = tvp7000_setup_video_standard(STD(VIDEO720P60HZ));
break;
case V4L2_STD_HD_1080I:
ret = tvp7000_setup_video_standard(STD(VIDEO1080I60HZ));
break;
default:
ret = -1; ret = -1;
}
break; break;
} }
default: default:
......
...@@ -234,8 +234,8 @@ static inline int is_win(const struct dm_win_info *w, unsigned int win) ...@@ -234,8 +234,8 @@ static inline int is_win(const struct dm_win_info *w, unsigned int win)
#define LCD_PANEL_CLOCK 180000 #define LCD_PANEL_CLOCK 180000
static const struct dm_extended_mode dm_extended_modedb[] = { static const struct dm_extended_mode dm_extended_modedb[] = {
{ "576i", 0, 0, 0 },
{ "480i", 0, 0, 0 }, { "480i", 0, 0, 0 },
{ "576i", 0, 0, 0 },
{ "480p", 0x50, 0x5, 0 }, { "480p", 0x50, 0x5, 0 },
{ "720p", 300, 30, 0 }, { "720p", 300, 30, 0 },
{ "1080i", 243, 20, 13 }, { "1080i", 243, 20, 13 },
...@@ -1137,7 +1137,6 @@ static void dm_win_fix_set(struct dm_win_info *w) ...@@ -1137,7 +1137,6 @@ static void dm_win_fix_set(struct dm_win_info *w)
struct fb_info *info = &w->info; struct fb_info *info = &w->info;
info->fix.smem_start = w->fb_base_phys; info->fix.smem_start = w->fb_base_phys;
info->fix.line_length = (info->var.xres_virtual * info->var.bits_per_pixel) / 8;
info->fix.smem_len = w->fb_size; info->fix.smem_len = w->fb_size;
info->fix.type = FB_TYPE_PACKED_PIXELS; info->fix.type = FB_TYPE_PACKED_PIXELS;
info->fix.visual = (info->var.bits_per_pixel <= 8) ? info->fix.visual = (info->var.bits_per_pixel <= 8) ?
...@@ -1233,14 +1232,6 @@ static int dm_win_probe(struct dm_win_info *w) ...@@ -1233,14 +1232,6 @@ static int dm_win_probe(struct dm_win_info *w)
is_win(w, DAVINCIFB_WIN_OSD1) ? 4 : 16)) { is_win(w, DAVINCIFB_WIN_OSD1) ? 4 : 16)) {
return -EINVAL; return -EINVAL;
} }
/* create the fb device */
if (register_framebuffer(info) < 0) {
dev_err(dev, "Unable to register %s framebuffer\n",
dm_win_names[w->win]);
ret = -EINVAL;
goto register_error;
}
davincifb_set_par(info);
/* clear the memory */ /* clear the memory */
switch (info->var.bits_per_pixel) { switch (info->var.bits_per_pixel) {
case 16: case 16:
...@@ -1256,6 +1247,14 @@ static int dm_win_probe(struct dm_win_info *w) ...@@ -1256,6 +1247,14 @@ static int dm_win_probe(struct dm_win_info *w)
break; break;
} }
memset((void *)w->fb_base, bg_color, w->fb_size); memset((void *)w->fb_base, bg_color, w->fb_size);
/* create the fb device */
if (register_framebuffer(info) < 0) {
dev_err(dev, "Unable to register %s framebuffer\n",
dm_win_names[w->win]);
ret = -EINVAL;
goto register_error;
}
davincifb_set_par(info);
dm_win_enable(w, 1); dm_win_enable(w, 1);
return 0; return 0;
...@@ -1270,6 +1269,8 @@ static int dm_wins_probe(struct dm_info *info) ...@@ -1270,6 +1269,8 @@ static int dm_wins_probe(struct dm_info *info)
int windows_ok = 0; int windows_ok = 0;
int i = 0; int i = 0;
/* Set an initial invalid mode */
info->curr_mode = -1;
/* Setup DAVINCIFB_WIN_VID0 framebuffer */ /* Setup DAVINCIFB_WIN_VID0 framebuffer */
if (!(info->windows_mask & (1 << DAVINCIFB_WIN_VID0))) { if (!(info->windows_mask & (1 << DAVINCIFB_WIN_VID0))) {
printk(KERN_WARNING "No video/osd windows will be enabled " printk(KERN_WARNING "No video/osd windows will be enabled "
...@@ -1571,8 +1572,10 @@ static int davincifb_set_par(struct fb_info *info) ...@@ -1571,8 +1572,10 @@ static int davincifb_set_par(struct fb_info *info)
/* we are going to change the mode */ /* we are going to change the mode */
mode = dm_venc_find_mode(v); mode = dm_venc_find_mode(v);
if (mode == w->dm->curr_mode) if (mode == w->dm->curr_mode) {
printk("same mode, do nothing!!\n");
return 0; return 0;
}
if (mode < 0) if (mode < 0)
{ {
printk("errorrrr\n"); printk("errorrrr\n");
......
...@@ -54,6 +54,7 @@ ...@@ -54,6 +54,7 @@
#define VPFE_WIN_QVGA {0,0,320,240} #define VPFE_WIN_QVGA {0,0,320,240}
#define VPFE_WIN_SIF {0,0,352,240} #define VPFE_WIN_SIF {0,0,352,240}
#define VPFE_WIN_HD480P {0,0,720,480} #define VPFE_WIN_HD480P {0,0,720,480}
#define VPFE_WIN_HD576P {0,0,720,576}
#define VPFE_WIN_HD720P {0,0,1280,720} #define VPFE_WIN_HD720P {0,0,1280,720}
#define VPFE_WIN_HD1080I {0,0,1920,1080} #define VPFE_WIN_HD1080I {0,0,1920,1080}
...@@ -81,8 +82,8 @@ ...@@ -81,8 +82,8 @@
#define VPFE_PIXELASPECT_PAL_SP {1, 1} #define VPFE_PIXELASPECT_PAL_SP {1, 1}
#define VPFE_PIXELASPECT_DEFAULT {1, 1} #define VPFE_PIXELASPECT_DEFAULT {1, 1}
#define VPFE_MAX_FRAME_WIDTH 768 /* account for PAL Square pixel mode */ #define VPFE_MAX_FRAME_WIDTH 1920 /* account for PAL Square pixel mode */
#define VPFE_MAX_FRAME_HEIGHT 576 /* account for PAL */ #define VPFE_MAX_FRAME_HEIGHT 1080 /* account for PAL */
/* 4:2:2 data */ /* 4:2:2 data */
#define VPFE_MAX_FBUF_SIZE (VPFE_MAX_FRAME_WIDTH*VPFE_MAX_FRAME_HEIGHT*2) #define VPFE_MAX_FBUF_SIZE (VPFE_MAX_FRAME_WIDTH*VPFE_MAX_FRAME_HEIGHT*2)
/* frame buffers allocate at driver initialization time */ /* frame buffers allocate at driver initialization time */
......
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