[POWERPC] qe: Fix QUICC Engine SDMA setup errors
Correct the alignment of the internal buffer used by the QUICC Engine SDMA controller to 4Kbytes. Correct the shift direction in the logic that sets up the SDMR register for the QUICC Engine SDMA controller. Signed-off-by: Chuck Meade <chuckmeade@mindspring.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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