Commit 7991ec0d authored by 吴智聪(John Wu)'s avatar 吴智聪(John Wu)

kernel side soft reset bug fix

parent 762a79f1
...@@ -336,15 +336,15 @@ void davinci_watchdog_reset(void) { ...@@ -336,15 +336,15 @@ void davinci_watchdog_reset(void) {
u32 tgcr, wdtcr, base = DAVINCI_WDOG_BASE; u32 tgcr, wdtcr, base = DAVINCI_WDOG_BASE;
/* disable, internal clock source */ /* disable, internal clock source */
davinci_writel(0, base + TCR); davinci_writel(0, base + TGCR);
/* reset timer, set mode to 64-bit watchdog, and unreset */ /* reset timer, set mode to 64-bit watchdog, and unreset */
tgcr = 0; tgcr = 0;
davinci_writel(tgcr, base + TCR); davinci_writel(tgcr, base + TGCR);
tgcr = TGCR_TIMMODE_64BIT_WDOG << TGCR_TIMMODE_SHIFT; tgcr = TGCR_TIMMODE_64BIT_WDOG << TGCR_TIMMODE_SHIFT;
tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) | tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) |
(TGCR_UNRESET << TGCR_TIM34RS_SHIFT); (TGCR_UNRESET << TGCR_TIM34RS_SHIFT);
davinci_writel(tgcr, base + TCR); davinci_writel(tgcr, base + TGCR);
/* clear counter and period regs */ /* clear counter and period regs */
davinci_writel(0, base + TIM12); davinci_writel(0, base + TIM12);
......
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