Commit 67ad0644 authored by Tony Lindgren's avatar Tony Lindgren

Merge source.mvista.com:/home/git/linux-omap-2.6

parents d99adea7 e7bdb7ed
...@@ -47,6 +47,7 @@ ...@@ -47,6 +47,7 @@
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/mach/irq.h> #include <asm/mach/irq.h>
#include <asm/arch/gpio.h> #include <asm/arch/gpio.h>
#include <asm/arch/cpu.h>
#include <asm/io.h> #include <asm/io.h>
...@@ -234,9 +235,11 @@ void __init omap_init_irq(void) ...@@ -234,9 +235,11 @@ void __init omap_init_irq(void)
} }
/* Unmask level 2 handler */ /* Unmask level 2 handler */
if (cpu_is_omap730()) {
if (cpu_is_omap730())
omap_unmask_irq(INT_730_IH2_IRQ); omap_unmask_irq(INT_730_IH2_IRQ);
} else { else if (cpu_is_omap1510())
omap_unmask_irq(INT_IH2_IRQ); omap_unmask_irq(INT_1510_IH2_IRQ);
} else if (cpu_is_omap16xx())
omap_unmask_irq(INT_1610_IH2_IRQ);
} }
...@@ -121,7 +121,7 @@ void omap_pm_idle(void) ...@@ -121,7 +121,7 @@ void omap_pm_idle(void)
*/ */
static void omap_pm_wakeup_setup(void) static void omap_pm_wakeup_setup(void)
{ {
u32 level1_wake = OMAP_IRQ_BIT(INT_IH2_IRQ); u32 level1_wake = 0;
u32 level2_wake = OMAP_IRQ_BIT(INT_UART2); u32 level2_wake = OMAP_IRQ_BIT(INT_UART2);
/* /*
...@@ -130,27 +130,29 @@ static void omap_pm_wakeup_setup(void) ...@@ -130,27 +130,29 @@ static void omap_pm_wakeup_setup(void)
* drivers must still separately call omap_set_gpio_wakeup() to * drivers must still separately call omap_set_gpio_wakeup() to
* wake up to a GPIO interrupt. * wake up to a GPIO interrupt.
*/ */
if (cpu_is_omap1510() || cpu_is_omap16xx()) if (cpu_is_omap730())
level1_wake |= OMAP_IRQ_BIT(INT_GPIO_BANK1); level1_wake = OMAP_IRQ_BIT(INT_730_GPIO_BANK1) |
else if (cpu_is_omap730()) OMAP_IRQ_BIT(INT_730_IH2_IRQ);
level1_wake |= OMAP_IRQ_BIT(INT_730_GPIO_BANK1); else if (cpu_is_omap1510())
level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |
OMAP_IRQ_BIT(INT_1510_IH2_IRQ);
else if (cpu_is_omap16xx())
level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |
OMAP_IRQ_BIT(INT_1610_IH2_IRQ);
omap_writel(~level1_wake, OMAP_IH1_MIR); omap_writel(~level1_wake, OMAP_IH1_MIR);
if (cpu_is_omap730()) { if (cpu_is_omap730()) {
omap_writel(~level2_wake, OMAP_IH2_0_MIR); omap_writel(~level2_wake, OMAP_IH2_0_MIR);
omap_writel(~(OMAP_IRQ_BIT(INT_730_WAKE_UP_REQ) | OMAP_IRQ_BIT(INT_730_MPUIO_KEYPAD)), OMAP_IH2_1_MIR); omap_writel(~(OMAP_IRQ_BIT(INT_730_WAKE_UP_REQ) | OMAP_IRQ_BIT(INT_730_MPUIO_KEYPAD)), OMAP_IH2_1_MIR);
} } else if (cpu_is_omap1510()) {
if (cpu_is_omap1510()) {
level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD); level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD);
omap_writel(~level2_wake, OMAP_IH2_MIR); omap_writel(~level2_wake, OMAP_IH2_MIR);
} } else if (cpu_is_omap16xx()) {
/* INT_1610_WAKE_UP_REQ is needed for GPIO wakeup... */
if (cpu_is_omap16xx()) {
level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD); level2_wake |= OMAP_IRQ_BIT(INT_KEYBOARD);
omap_writel(~level2_wake, OMAP_IH2_0_MIR); omap_writel(~level2_wake, OMAP_IH2_0_MIR);
/* INT_1610_WAKE_UP_REQ is needed for GPIO wakeup... */
omap_writel(~OMAP_IRQ_BIT(INT_1610_WAKE_UP_REQ), OMAP_IH2_1_MIR); omap_writel(~OMAP_IRQ_BIT(INT_1610_WAKE_UP_REQ), OMAP_IH2_1_MIR);
omap_writel(~0x0, OMAP_IH2_2_MIR); omap_writel(~0x0, OMAP_IH2_2_MIR);
omap_writel(~0x0, OMAP_IH2_3_MIR); omap_writel(~0x0, OMAP_IH2_3_MIR);
......
...@@ -14,8 +14,14 @@ ...@@ -14,8 +14,14 @@
(defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)) (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX))
#error "FIXME: OMAP730 doesn't support multiple-OMAP" #error "FIXME: OMAP730 doesn't support multiple-OMAP"
#elif defined(CONFIG_ARCH_OMAP730) #elif defined(CONFIG_ARCH_OMAP730)
#undef INT_IH2_IRQ
#define INT_IH2_IRQ INT_730_IH2_IRQ #define INT_IH2_IRQ INT_730_IH2_IRQ
#elif defined(CONFIG_ARCH_OMAP15XX)
#define INT_IH2_IRQ INT_1510_IH2_IRQ
#elif defined(CONFIG_ARCH_OMAP16XX)
#define INT_IH2_IRQ INT_1610_IH2_IRQ
#else
#warning "IH2 IRQ defaulted"
#define INT_IH2_IRQ INT_1510_IH2_IRQ
#endif #endif
.macro disable_fiq .macro disable_fiq
......
...@@ -31,7 +31,6 @@ ...@@ -31,7 +31,6 @@
* NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
* *
*/ */
#define INT_IH2_IRQ 0
#define INT_CAMERA 1 #define INT_CAMERA 1
#define INT_FIQ 3 #define INT_FIQ 3
#define INT_RTDX 6 #define INT_RTDX 6
...@@ -60,6 +59,7 @@ ...@@ -60,6 +59,7 @@
/* /*
* OMAP-1510 specific IRQ numbers for interrupt handler 1 * OMAP-1510 specific IRQ numbers for interrupt handler 1
*/ */
#define INT_1510_IH2_IRQ 0
#define INT_1510_RES2 2 #define INT_1510_RES2 2
#define INT_1510_SPI_TX 4 #define INT_1510_SPI_TX 4
#define INT_1510_SPI_RX 5 #define INT_1510_SPI_RX 5
...@@ -71,6 +71,7 @@ ...@@ -71,6 +71,7 @@
/* /*
* OMAP-1610 specific IRQ numbers for interrupt handler 1 * OMAP-1610 specific IRQ numbers for interrupt handler 1
*/ */
#define INT_1610_IH2_IRQ 0
#define INT_1610_IH2_FIQ 2 #define INT_1610_IH2_FIQ 2
#define INT_1610_McBSP2_TX 4 #define INT_1610_McBSP2_TX 4
#define INT_1610_McBSP2_RX 5 #define INT_1610_McBSP2_RX 5
......
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