Commit 48ac5eeb authored by Kevin Hilman's avatar Kevin Hilman

ARM: OMAP: Undo level2 IRQ fix. Doesn't build on non-P2 platforms.

Signed-off-by: default avatarKevin Hilman <kevin@hilman.org>
parent 153984dc
...@@ -47,7 +47,6 @@ ...@@ -47,7 +47,6 @@
#include <asm/irq.h> #include <asm/irq.h>
#include <asm/mach/irq.h> #include <asm/mach/irq.h>
#include <asm/arch/gpio.h> #include <asm/arch/gpio.h>
#include <asm/arch/cpu.h>
#include <asm/io.h> #include <asm/io.h>
...@@ -235,11 +234,9 @@ void __init omap_init_irq(void) ...@@ -235,11 +234,9 @@ void __init omap_init_irq(void)
} }
/* Unmask level 2 handler */ /* Unmask level 2 handler */
if (cpu_is_omap730()) {
if (cpu_is_omap730())
omap_unmask_irq(INT_730_IH2_IRQ); omap_unmask_irq(INT_730_IH2_IRQ);
else if (cpu_is_omap1510()) } else {
omap_unmask_irq(INT_1510_IH2_IRQ); omap_unmask_irq(INT_IH2_IRQ);
else if (cpu_is_omap16xx()) }
omap_unmask_irq(INT_1610_IH2_IRQ);
} }
...@@ -121,7 +121,7 @@ void omap_pm_idle(void) ...@@ -121,7 +121,7 @@ void omap_pm_idle(void)
*/ */
static void omap_pm_wakeup_setup(void) static void omap_pm_wakeup_setup(void)
{ {
u32 level1_wake; u32 level1_wake = OMAP_IRQ_BIT(INT_IH2_IRQ);
u32 level2_wake = OMAP_IRQ_BIT(INT_UART2); u32 level2_wake = OMAP_IRQ_BIT(INT_UART2);
/* /*
...@@ -130,15 +130,10 @@ static void omap_pm_wakeup_setup(void) ...@@ -130,15 +130,10 @@ static void omap_pm_wakeup_setup(void)
* drivers must still separately call omap_set_gpio_wakeup() to * drivers must still separately call omap_set_gpio_wakeup() to
* wake up to a GPIO interrupt. * wake up to a GPIO interrupt.
*/ */
if (cpu_is_omap730()) if (cpu_is_omap1510() || cpu_is_omap16xx())
level1_wake = OMAP_IRQ_BIT(INT_730_GPIO_BANK1) | level1_wake |= OMAP_IRQ_BIT(INT_GPIO_BANK1);
OMAP_IRQ_BIT(INT_730_IH2_IRQ); else if (cpu_is_omap730())
else if (cpu_is_omap1510()) level1_wake |= OMAP_IRQ_BIT(INT_730_GPIO_BANK1);
level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |
OMAP_IRQ_BIT(INT_1510_IH2_IRQ);
else if (cpu_is_omap16xx())
level1_wake = OMAP_IRQ_BIT(INT_GPIO_BANK1) |
OMAP_IRQ_BIT(INT_1610_IH2_IRQ);
omap_writel(~level1_wake, OMAP_IH1_MIR); omap_writel(~level1_wake, OMAP_IH1_MIR);
......
...@@ -31,6 +31,7 @@ ...@@ -31,6 +31,7 @@
* NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
* *
*/ */
#define INT_IH2_IRQ 0
#define INT_CAMERA 1 #define INT_CAMERA 1
#define INT_FIQ 3 #define INT_FIQ 3
#define INT_RTDX 6 #define INT_RTDX 6
...@@ -59,7 +60,6 @@ ...@@ -59,7 +60,6 @@
/* /*
* OMAP-1510 specific IRQ numbers for interrupt handler 1 * OMAP-1510 specific IRQ numbers for interrupt handler 1
*/ */
#define INT_1510_IH2_IRQ 0
#define INT_1510_RES2 2 #define INT_1510_RES2 2
#define INT_1510_SPI_TX 4 #define INT_1510_SPI_TX 4
#define INT_1510_SPI_RX 5 #define INT_1510_SPI_RX 5
...@@ -71,7 +71,6 @@ ...@@ -71,7 +71,6 @@
/* /*
* OMAP-1610 specific IRQ numbers for interrupt handler 1 * OMAP-1610 specific IRQ numbers for interrupt handler 1
*/ */
#define INT_1610_IH2_IRQ 0
#define INT_1610_IH2_FIQ 2 #define INT_1610_IH2_FIQ 2
#define INT_1610_McBSP2_TX 4 #define INT_1610_McBSP2_TX 4
#define INT_1610_McBSP2_RX 5 #define INT_1610_McBSP2_RX 5
......
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