Commit 45aeaf1e authored by Ravi Anand's avatar Ravi Anand Committed by James Bottomley

[SCSI] qla2xxx: Add support for new flash part.

Signed-off-by: default avatarAndrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: default avatarJames Bottomley <James.Bottomley@SteelEye.com>
parent 57680080
...@@ -270,6 +270,8 @@ struct device_reg_2xxx { ...@@ -270,6 +270,8 @@ struct device_reg_2xxx {
#define NVR_SELECT BIT_1 #define NVR_SELECT BIT_1
#define NVR_CLOCK BIT_0 #define NVR_CLOCK BIT_0
#define NVR_WAIT_CNT 20000
union { union {
struct { struct {
uint16_t mailbox0; uint16_t mailbox0;
......
...@@ -97,7 +97,7 @@ qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data) ...@@ -97,7 +97,7 @@ qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data)
{ {
int count; int count;
uint16_t word; uint16_t word;
uint32_t nv_cmd; uint32_t nv_cmd, wait_cnt;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_nv_write(ha, NVR_DATA_OUT);
...@@ -127,7 +127,13 @@ qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data) ...@@ -127,7 +127,13 @@ qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data)
/* Wait for NVRAM to become ready */ /* Wait for NVRAM to become ready */
WRT_REG_WORD(&reg->nvram, NVR_SELECT); WRT_REG_WORD(&reg->nvram, NVR_SELECT);
RD_REG_WORD(&reg->nvram); /* PCI Posting. */ RD_REG_WORD(&reg->nvram); /* PCI Posting. */
wait_cnt = NVR_WAIT_CNT;
do { do {
if (!--wait_cnt) {
DEBUG9_10(printk("%s(%ld): NVRAM didn't go ready...\n",
__func__, ha->host_no));
break;
}
NVRAM_DELAY(); NVRAM_DELAY();
word = RD_REG_WORD(&reg->nvram); word = RD_REG_WORD(&reg->nvram);
} while ((word & NVR_DATA_IN) == 0); } while ((word & NVR_DATA_IN) == 0);
...@@ -301,16 +307,17 @@ qla2x00_clear_nvram_protection(scsi_qla_host_t *ha) ...@@ -301,16 +307,17 @@ qla2x00_clear_nvram_protection(scsi_qla_host_t *ha)
{ {
int ret, stat; int ret, stat;
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
uint32_t word; uint32_t word, wait_cnt;
uint16_t wprot, wprot_old; uint16_t wprot, wprot_old;
/* Clear NVRAM write protection. */ /* Clear NVRAM write protection. */
ret = QLA_FUNCTION_FAILED; ret = QLA_FUNCTION_FAILED;
wprot_old = cpu_to_le16(qla2x00_get_nvram_word(ha, 0));
stat = qla2x00_write_nvram_word_tmo(ha, 0, wprot_old = cpu_to_le16(qla2x00_get_nvram_word(ha, ha->nvram_base));
stat = qla2x00_write_nvram_word_tmo(ha, ha->nvram_base,
__constant_cpu_to_le16(0x1234), 100000); __constant_cpu_to_le16(0x1234), 100000);
wprot = cpu_to_le16(qla2x00_get_nvram_word(ha, 0)); wprot = cpu_to_le16(qla2x00_get_nvram_word(ha, ha->nvram_base));
if (stat != QLA_SUCCESS || wprot != __constant_cpu_to_le16(0x1234)) { if (stat != QLA_SUCCESS || wprot != 0x1234) {
/* Write enable. */ /* Write enable. */
qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_nv_write(ha, NVR_DATA_OUT);
qla2x00_nv_write(ha, 0); qla2x00_nv_write(ha, 0);
...@@ -341,14 +348,22 @@ qla2x00_clear_nvram_protection(scsi_qla_host_t *ha) ...@@ -341,14 +348,22 @@ qla2x00_clear_nvram_protection(scsi_qla_host_t *ha)
/* Wait for NVRAM to become ready. */ /* Wait for NVRAM to become ready. */
WRT_REG_WORD(&reg->nvram, NVR_SELECT); WRT_REG_WORD(&reg->nvram, NVR_SELECT);
RD_REG_WORD(&reg->nvram); /* PCI Posting. */ RD_REG_WORD(&reg->nvram); /* PCI Posting. */
wait_cnt = NVR_WAIT_CNT;
do { do {
if (!--wait_cnt) {
DEBUG9_10(printk("%s(%ld): NVRAM didn't go "
"ready...\n", __func__,
ha->host_no));
break;
}
NVRAM_DELAY(); NVRAM_DELAY();
word = RD_REG_WORD(&reg->nvram); word = RD_REG_WORD(&reg->nvram);
} while ((word & NVR_DATA_IN) == 0); } while ((word & NVR_DATA_IN) == 0);
ret = QLA_SUCCESS; if (wait_cnt)
ret = QLA_SUCCESS;
} else } else
qla2x00_write_nvram_word(ha, 0, wprot_old); qla2x00_write_nvram_word(ha, ha->nvram_base, wprot_old);
return ret; return ret;
} }
...@@ -357,7 +372,7 @@ static void ...@@ -357,7 +372,7 @@ static void
qla2x00_set_nvram_protection(scsi_qla_host_t *ha, int stat) qla2x00_set_nvram_protection(scsi_qla_host_t *ha, int stat)
{ {
struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
uint32_t word; uint32_t word, wait_cnt;
if (stat != QLA_SUCCESS) if (stat != QLA_SUCCESS)
return; return;
...@@ -393,7 +408,13 @@ qla2x00_set_nvram_protection(scsi_qla_host_t *ha, int stat) ...@@ -393,7 +408,13 @@ qla2x00_set_nvram_protection(scsi_qla_host_t *ha, int stat)
/* Wait for NVRAM to become ready. */ /* Wait for NVRAM to become ready. */
WRT_REG_WORD(&reg->nvram, NVR_SELECT); WRT_REG_WORD(&reg->nvram, NVR_SELECT);
RD_REG_WORD(&reg->nvram); /* PCI Posting. */ RD_REG_WORD(&reg->nvram); /* PCI Posting. */
wait_cnt = NVR_WAIT_CNT;
do { do {
if (!--wait_cnt) {
DEBUG9_10(printk("%s(%ld): NVRAM didn't go ready...\n",
__func__, ha->host_no));
break;
}
NVRAM_DELAY(); NVRAM_DELAY();
word = RD_REG_WORD(&reg->nvram); word = RD_REG_WORD(&reg->nvram);
} while ((word & NVR_DATA_IN) == 0); } while ((word & NVR_DATA_IN) == 0);
...@@ -500,6 +521,20 @@ qla24xx_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id, ...@@ -500,6 +521,20 @@ qla24xx_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id,
ids = qla24xx_read_flash_dword(ha, flash_data_to_access_addr(0xd03ab)); ids = qla24xx_read_flash_dword(ha, flash_data_to_access_addr(0xd03ab));
*man_id = LSB(ids); *man_id = LSB(ids);
*flash_id = MSB(ids); *flash_id = MSB(ids);
/* Check if man_id and flash_id are valid. */
if (ids != 0xDEADDEAD && (*man_id == 0 || *flash_id == 0)) {
/* Read information using 0x9f opcode
* Device ID, Mfg ID would be read in the format:
* <Ext Dev Info><Device ID Part2><Device ID Part 1><Mfg ID>
* Example: ATMEL 0x00 01 45 1F
* Extract MFG and Dev ID from last two bytes.
*/
ids = qla24xx_read_flash_dword(ha,
flash_data_to_access_addr(0xd009f));
*man_id = LSB(ids);
*flash_id = MSB(ids);
}
} }
int int
...@@ -508,8 +543,8 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, ...@@ -508,8 +543,8 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
{ {
int ret; int ret;
uint32_t liter; uint32_t liter;
uint32_t sec_mask, rest_addr, conf_addr; uint32_t sec_mask, rest_addr, conf_addr, sec_end_mask;
uint32_t fdata; uint32_t fdata, findex ;
uint8_t man_id, flash_id; uint8_t man_id, flash_id;
struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
...@@ -519,6 +554,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, ...@@ -519,6 +554,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
DEBUG9(printk("%s(%ld): Flash man_id=%d flash_id=%d\n", __func__, DEBUG9(printk("%s(%ld): Flash man_id=%d flash_id=%d\n", __func__,
ha->host_no, man_id, flash_id)); ha->host_no, man_id, flash_id));
sec_end_mask = 0;
conf_addr = flash_conf_to_access_addr(0x03d8); conf_addr = flash_conf_to_access_addr(0x03d8);
switch (man_id) { switch (man_id) {
case 0xbf: /* STT flash. */ case 0xbf: /* STT flash. */
...@@ -531,6 +567,12 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, ...@@ -531,6 +567,12 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
rest_addr = 0x3fff; rest_addr = 0x3fff;
sec_mask = 0x3c000; sec_mask = 0x3c000;
break; break;
case 0x1f: // Atmel 26DF081A
rest_addr = 0x0fff;
sec_mask = 0xff000;
sec_end_mask = 0x003ff;
conf_addr = flash_conf_to_access_addr(0x0320);
break;
default: default:
/* Default to 64 kb sector size. */ /* Default to 64 kb sector size. */
rest_addr = 0x3fff; rest_addr = 0x3fff;
...@@ -545,11 +587,30 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, ...@@ -545,11 +587,30 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
/* Disable flash write-protection. */ /* Disable flash write-protection. */
qla24xx_write_flash_dword(ha, flash_conf_to_access_addr(0x101), 0); qla24xx_write_flash_dword(ha, flash_conf_to_access_addr(0x101), 0);
/* Some flash parts need an additional zero-write to clear bits.*/
qla24xx_write_flash_dword(ha, flash_conf_to_access_addr(0x101), 0);
do { /* Loop once to provide quick error exit. */ do { /* Loop once to provide quick error exit. */
for (liter = 0; liter < dwords; liter++, faddr++, dwptr++) { for (liter = 0; liter < dwords; liter++, faddr++, dwptr++) {
if (man_id == 0x1f) {
findex = faddr << 2;
fdata = findex & sec_mask;
} else {
findex = faddr;
fdata = (findex & sec_mask) << 2;
}
/* Are we at the beginning of a sector? */ /* Are we at the beginning of a sector? */
if ((faddr & rest_addr) == 0) { if ((findex & rest_addr) == 0) {
/*
* Do sector unprotect at 4K boundry for Atmel
* part.
*/
if (man_id == 0x1f)
qla24xx_write_flash_dword(ha,
flash_conf_to_access_addr(0x0339),
(fdata & 0xff00) | ((fdata << 16) &
0xff0000) | ((fdata >> 16) & 0xff));
fdata = (faddr & sec_mask) << 2; fdata = (faddr & sec_mask) << 2;
ret = qla24xx_write_flash_dword(ha, conf_addr, ret = qla24xx_write_flash_dword(ha, conf_addr,
(fdata & 0xff00) |((fdata << 16) & (fdata & 0xff00) |((fdata << 16) &
...@@ -570,6 +631,14 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, ...@@ -570,6 +631,14 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
ha->host_no, faddr, *dwptr)); ha->host_no, faddr, *dwptr));
break; break;
} }
/* Do sector protect at 4K boundry for Atmel part. */
if (man_id == 0x1f &&
((faddr & sec_end_mask) == 0x3ff))
qla24xx_write_flash_dword(ha,
flash_conf_to_access_addr(0x0336),
(fdata & 0xff00) | ((fdata << 16) &
0xff0000) | ((fdata >> 16) & 0xff));
} }
} while (0); } while (0);
......
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