Improvement of the fb driver

Lots of new stuff has been addded, here is a brief summary:
* New ioctl to set transparency color
* New ioctl to enable transparency on osd0 and osd1
* The memory allocation now is provided by a struct on the machine description
  Basically, it tells how big the buffers for every plane should be
* Clean up the code, remove unusued code
* Add support for mode switching on vid0 plane, SD / HD is supported, the
  latter is not tested
* Add support for mode list, you can list the modes with:
  cat /sys/class/graphics/fb0/modes
* Add support for mode set, you can se the mode with:
  echo MODE > /sys/class/grpahics/mode
  where MODE is one of the returned my the previous command
* Output switch works, by writing the enum value found on davincifb.h
  to /sys/class/video_output/venc

arch/arm/mach-davinci/board-ntosd-644xA.c

@@ -35,6 +35,8 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/psc.h>
 
+#include <video/davincifb.h>
+
 /* other misc. init functions */
 void __init davinci_psc_init(void);
 void __init davinci_irq_init(void);
@@ -164,6 +166,13 @@ static struct platform_device ntosd_644xa_nandflash_device = {
 #if defined(CONFIG_FB_DAVINCI) || defined(CONFIG_FB_DAVINCI_MODULE) || \
 defined(CONFIG_FB_DM) || defined(CONFIG_FB_DM_MODULE)
 
+static struct davincifb_mach_info davincifb_mach_info = {
+	.size[DAVINCIFB_WIN_VID0] = 12441600, /* 1920x1080*16bpp*3buffers */
+	.size[DAVINCIFB_WIN_VID1] = 691200, /* 720x480*16bpp*1buffer */
+	.size[DAVINCIFB_WIN_OSD0] = 3686400, /* 1280x720*16bpp*2buffers */
+	.size[DAVINCIFB_WIN_OSD1] = 172800, /* 720x480*4bpp*1buffer */
+};
+
 static u64 davinci_fb_dma_mask = DMA_32BIT_MASK;
 
 static struct platform_device davinci_fb_device = {
@@ -172,6 +181,7 @@ static struct platform_device davinci_fb_device = {
 	.dev = {
 		.dma_mask		= &davinci_fb_dma_mask,
 		.coherent_dma_mask      = DMA_32BIT_MASK,
+		.platform_data 		= &davincifb_mach_info,
 	},
 	.num_resources = 0,
 };

include/video/davincifb.h

@@ -181,7 +181,7 @@
 #define	OSD_MISCCT				(OSD_REG_BASE + 0xE8)
 #define	OSD_CLUTRAMYC				(OSD_REG_BASE + 0xEC)
 #define	OSD_CLUTRAMC				(OSD_REG_BASE + 0xF0)
-#define	OSD_TRANSPVA				(OSD_REG_BASE + 0xF0)
+#define	OSD_TRANSPVA				(OSD_REG_BASE + 0xF4)
 #define	OSD_PPVWIN0AD				(OSD_REG_BASE + 0xFC)
 
 /* bit definitions */
@@ -255,7 +255,7 @@
 #define	OSD_OSDWIN0MD_OVZ0_SHIFT		8
 #define	OSD_OSDWIN0MD_BMW0			(3 << 6)
 #define	OSD_OSDWIN0MD_BMW0_SHIFT		6
-#define	OSD_OSDWIN0MD_BLND0			(3 << 3)
+#define	OSD_OSDWIN0MD_BLND0			(7 << 3)
 #define	OSD_OSDWIN0MD_BLND0_SHIFT		3
 #define	OSD_OSDWIN0MD_TE0			(1 << 2)
 #define	OSD_OSDWIN0MD_OFF0			(1 << 1)
@@ -271,7 +271,7 @@
 #define	OSD_OSDWIN1MD_OVZ1_SHIFT		8
 #define	OSD_OSDWIN1MD_BMW1			(3 << 6)
 #define	OSD_OSDWIN1MD_BMW1_SHIFT		6
-#define	OSD_OSDWIN1MD_BLND1			(3 << 3)
+#define	OSD_OSDWIN1MD_BLND1			(7 << 3)
 #define	OSD_OSDWIN1MD_BLND1_SHIFT		3
 #define	OSD_OSDWIN1MD_TE1			(1 << 2)
 #define	OSD_OSDWIN1MD_OFF1			(1 << 1)
@@ -431,7 +431,6 @@
 #define	OSD_TRANSPVA_RGBTRANS			(0xff << 0)
 #define	OSD_TRANSPVA_RGBTRANS_SHIFT		0
 
-
 enum
 {
 	DAVINCIFB_WIN_VID0,
@@ -450,6 +449,10 @@ enum
 	DAVINCIFB_OUTPUTS
 };
 
+struct davincifb_mach_info
+{
+	unsigned int size[DAVINCIFB_WINDOWS];
+};
 
 #define LCD             0
 #define NTSC            1
@@ -477,4 +480,6 @@ struct zoom_params
 #define FBIO_SETZOOM		_IOW('F', 0x24, struct zoom_params)
 #define FBIO_GETSTD		_IOR('F', 0x25, u_int32_t)
 #define FBIO_ENABLE 		_IOW('F', 0x26, u_int32_t)
+#define FBIO_TRANSP 		_IOW('F', 0x27, u_int32_t)
+#define FBIO_TRANSP_COLOR	_IOW('F', 0x28, u_int32_t)
 #endif /* _DAVINCIFB_H_ */