Commit 04731009 authored by andrzej zaborowski's avatar andrzej zaborowski Committed by Tony Lindgren

[PATCH] ARM: OMAP: Clock changes for OMAP310

Clock changes for OMAP310
parent 28b2e072
...@@ -687,6 +687,11 @@ int __init omap1_clk_init(void) ...@@ -687,6 +687,11 @@ int __init omap1_clk_init(void)
clk_register(*clkp); clk_register(*clkp);
continue; continue;
} }
if (((*clkp)->flags &CLOCK_IN_OMAP310) && cpu_is_omap310()) {
clk_register(*clkp);
continue;
}
} }
info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
...@@ -784,7 +789,7 @@ int __init omap1_clk_init(void) ...@@ -784,7 +789,7 @@ int __init omap1_clk_init(void)
clk_enable(&armxor_ck.clk); clk_enable(&armxor_ck.clk);
clk_enable(&armtim_ck.clk); /* This should be done by timer code */ clk_enable(&armtim_ck.clk); /* This should be done by timer code */
if (cpu_is_omap1510()) if (cpu_is_omap15xx())
clk_enable(&arm_gpio_ck); clk_enable(&arm_gpio_ck);
return 0; return 0;
......
...@@ -151,7 +151,7 @@ static struct clk ck_ref = { ...@@ -151,7 +151,7 @@ static struct clk ck_ref = {
.name = "ck_ref", .name = "ck_ref",
.rate = 12000000, .rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
ALWAYS_ENABLED, CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic, .disable = &omap1_clk_disable_generic,
}; };
...@@ -160,7 +160,7 @@ static struct clk ck_dpll1 = { ...@@ -160,7 +160,7 @@ static struct clk ck_dpll1 = {
.name = "ck_dpll1", .name = "ck_dpll1",
.parent = &ck_ref, .parent = &ck_ref,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_PROPAGATES | ALWAYS_ENABLED, CLOCK_IN_OMAP310 | RATE_PROPAGATES | ALWAYS_ENABLED,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic, .disable = &omap1_clk_disable_generic,
}; };
...@@ -183,7 +183,8 @@ static struct clk arm_ck = { ...@@ -183,7 +183,8 @@ static struct clk arm_ck = {
.name = "arm_ck", .name = "arm_ck",
.parent = &ck_dpll1, .parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_CKCTL | RATE_PROPAGATES | ALWAYS_ENABLED, CLOCK_IN_OMAP310 | RATE_CKCTL | RATE_PROPAGATES |
ALWAYS_ENABLED,
.rate_offset = CKCTL_ARMDIV_OFFSET, .rate_offset = CKCTL_ARMDIV_OFFSET,
.recalc = &omap1_ckctl_recalc, .recalc = &omap1_ckctl_recalc,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
...@@ -195,7 +196,8 @@ static struct arm_idlect1_clk armper_ck = { ...@@ -195,7 +196,8 @@ static struct arm_idlect1_clk armper_ck = {
.name = "armper_ck", .name = "armper_ck",
.parent = &ck_dpll1, .parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_CKCTL | CLOCK_IDLE_CONTROL, CLOCK_IN_OMAP310 | RATE_CKCTL |
CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2, .enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_PERCK, .enable_bit = EN_PERCK,
.rate_offset = CKCTL_PERDIV_OFFSET, .rate_offset = CKCTL_PERDIV_OFFSET,
...@@ -209,7 +211,7 @@ static struct arm_idlect1_clk armper_ck = { ...@@ -209,7 +211,7 @@ static struct arm_idlect1_clk armper_ck = {
static struct clk arm_gpio_ck = { static struct clk arm_gpio_ck = {
.name = "arm_gpio_ck", .name = "arm_gpio_ck",
.parent = &ck_dpll1, .parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510, .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
.enable_reg = (void __iomem *)ARM_IDLECT2, .enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_GPIOCK, .enable_bit = EN_GPIOCK,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
...@@ -222,7 +224,7 @@ static struct arm_idlect1_clk armxor_ck = { ...@@ -222,7 +224,7 @@ static struct arm_idlect1_clk armxor_ck = {
.name = "armxor_ck", .name = "armxor_ck",
.parent = &ck_ref, .parent = &ck_ref,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IDLE_CONTROL, CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2, .enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_XORPCK, .enable_bit = EN_XORPCK,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
...@@ -237,7 +239,7 @@ static struct arm_idlect1_clk armtim_ck = { ...@@ -237,7 +239,7 @@ static struct arm_idlect1_clk armtim_ck = {
.name = "armtim_ck", .name = "armtim_ck",
.parent = &ck_ref, .parent = &ck_ref,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IDLE_CONTROL, CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2, .enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_TIMCK, .enable_bit = EN_TIMCK,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
...@@ -252,7 +254,7 @@ static struct arm_idlect1_clk armwdt_ck = { ...@@ -252,7 +254,7 @@ static struct arm_idlect1_clk armwdt_ck = {
.name = "armwdt_ck", .name = "armwdt_ck",
.parent = &ck_ref, .parent = &ck_ref,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IDLE_CONTROL, CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2, .enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_WDTCK, .enable_bit = EN_WDTCK,
.recalc = &omap1_watchdog_recalc, .recalc = &omap1_watchdog_recalc,
...@@ -344,9 +346,9 @@ static struct arm_idlect1_clk tc_ck = { ...@@ -344,9 +346,9 @@ static struct arm_idlect1_clk tc_ck = {
.name = "tc_ck", .name = "tc_ck",
.parent = &ck_dpll1, .parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IN_OMAP730 | RATE_CKCTL | CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 |
RATE_PROPAGATES | ALWAYS_ENABLED | RATE_CKCTL | RATE_PROPAGATES |
CLOCK_IDLE_CONTROL, ALWAYS_ENABLED | CLOCK_IDLE_CONTROL,
.rate_offset = CKCTL_TCDIV_OFFSET, .rate_offset = CKCTL_TCDIV_OFFSET,
.recalc = &omap1_ckctl_recalc, .recalc = &omap1_ckctl_recalc,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
...@@ -358,7 +360,8 @@ static struct arm_idlect1_clk tc_ck = { ...@@ -358,7 +360,8 @@ static struct arm_idlect1_clk tc_ck = {
static struct clk arminth_ck1510 = { static struct clk arminth_ck1510 = {
.name = "arminth_ck", .name = "arminth_ck",
.parent = &tc_ck.clk, .parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED, .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
ALWAYS_ENABLED,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
/* Note: On 1510 the frequency follows TC_CK /* Note: On 1510 the frequency follows TC_CK
* *
...@@ -372,7 +375,8 @@ static struct clk tipb_ck = { ...@@ -372,7 +375,8 @@ static struct clk tipb_ck = {
/* No-idle controlled by "tc_ck" */ /* No-idle controlled by "tc_ck" */
.name = "tibp_ck", .name = "tibp_ck",
.parent = &tc_ck.clk, .parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP1510 | ALWAYS_ENABLED, .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
ALWAYS_ENABLED,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic, .disable = &omap1_clk_disable_generic,
...@@ -417,7 +421,7 @@ static struct clk dma_ck = { ...@@ -417,7 +421,7 @@ static struct clk dma_ck = {
.name = "dma_ck", .name = "dma_ck",
.parent = &tc_ck.clk, .parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
ALWAYS_ENABLED, CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic, .disable = &omap1_clk_disable_generic,
...@@ -437,7 +441,7 @@ static struct arm_idlect1_clk api_ck = { ...@@ -437,7 +441,7 @@ static struct arm_idlect1_clk api_ck = {
.name = "api_ck", .name = "api_ck",
.parent = &tc_ck.clk, .parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
CLOCK_IDLE_CONTROL, CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2, .enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_APICK, .enable_bit = EN_APICK,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
...@@ -451,7 +455,8 @@ static struct arm_idlect1_clk lb_ck = { ...@@ -451,7 +455,8 @@ static struct arm_idlect1_clk lb_ck = {
.clk = { .clk = {
.name = "lb_ck", .name = "lb_ck",
.parent = &tc_ck.clk, .parent = &tc_ck.clk,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IDLE_CONTROL, .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2, .enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_LBCK, .enable_bit = EN_LBCK,
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
...@@ -495,8 +500,8 @@ static struct arm_idlect1_clk lcd_ck_1510 = { ...@@ -495,8 +500,8 @@ static struct arm_idlect1_clk lcd_ck_1510 = {
.clk = { .clk = {
.name = "lcd_ck", .name = "lcd_ck",
.parent = &ck_dpll1, .parent = &ck_dpll1,
.flags = CLOCK_IN_OMAP1510 | RATE_CKCTL | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
CLOCK_IDLE_CONTROL, RATE_CKCTL | CLOCK_IDLE_CONTROL,
.enable_reg = (void __iomem *)ARM_IDLECT2, .enable_reg = (void __iomem *)ARM_IDLECT2,
.enable_bit = EN_LCDCK, .enable_bit = EN_LCDCK,
.rate_offset = CKCTL_LCDDIV_OFFSET, .rate_offset = CKCTL_LCDDIV_OFFSET,
...@@ -512,8 +517,9 @@ static struct clk uart1_1510 = { ...@@ -512,8 +517,9 @@ static struct clk uart1_1510 = {
/* Direct from ULPD, no real parent */ /* Direct from ULPD, no real parent */
.parent = &armper_ck.clk, .parent = &armper_ck.clk,
.rate = 12000000, .rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT, ENABLE_REG_32BIT | ALWAYS_ENABLED |
CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0, .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 29, /* Chooses between 12MHz and 48MHz */ .enable_bit = 29, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate, .set_rate = &omap1_set_uart_rate,
...@@ -544,8 +550,8 @@ static struct clk uart2_ck = { ...@@ -544,8 +550,8 @@ static struct clk uart2_ck = {
.parent = &armper_ck.clk, .parent = &armper_ck.clk,
.rate = 12000000, .rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
ENABLE_REG_32BIT | ALWAYS_ENABLED | CLOCK_IN_OMAP310 | ENABLE_REG_32BIT |
CLOCK_NO_IDLE_PARENT, ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0, .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 30, /* Chooses between 12MHz and 48MHz */ .enable_bit = 30, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate, .set_rate = &omap1_set_uart_rate,
...@@ -559,8 +565,9 @@ static struct clk uart3_1510 = { ...@@ -559,8 +565,9 @@ static struct clk uart3_1510 = {
/* Direct from ULPD, no real parent */ /* Direct from ULPD, no real parent */
.parent = &armper_ck.clk, .parent = &armper_ck.clk,
.rate = 12000000, .rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | ENABLE_REG_32BIT | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT, ENABLE_REG_32BIT | ALWAYS_ENABLED |
CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0, .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 31, /* Chooses between 12MHz and 48MHz */ .enable_bit = 31, /* Chooses between 12MHz and 48MHz */
.set_rate = &omap1_set_uart_rate, .set_rate = &omap1_set_uart_rate,
...@@ -590,7 +597,7 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ ...@@ -590,7 +597,7 @@ static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */
/* Direct from ULPD, no parent */ /* Direct from ULPD, no parent */
.rate = 6000000, .rate = 6000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_FIXED | ENABLE_REG_32BIT, CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT,
.enable_reg = (void __iomem *)ULPD_CLOCK_CTRL, .enable_reg = (void __iomem *)ULPD_CLOCK_CTRL,
.enable_bit = USB_MCLK_EN_BIT, .enable_bit = USB_MCLK_EN_BIT,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
...@@ -601,7 +608,7 @@ static struct clk usb_hhc_ck1510 = { ...@@ -601,7 +608,7 @@ static struct clk usb_hhc_ck1510 = {
.name = "usb_hhc_ck", .name = "usb_hhc_ck",
/* Direct from ULPD, no parent */ /* Direct from ULPD, no parent */
.rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
.flags = CLOCK_IN_OMAP1510 | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
RATE_FIXED | ENABLE_REG_32BIT, RATE_FIXED | ENABLE_REG_32BIT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0, .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = USB_HOST_HHC_UHOST_EN, .enable_bit = USB_HOST_HHC_UHOST_EN,
...@@ -637,7 +644,9 @@ static struct clk mclk_1510 = { ...@@ -637,7 +644,9 @@ static struct clk mclk_1510 = {
.name = "mclk", .name = "mclk",
/* Direct from ULPD, no parent. May be enabled by ext hardware. */ /* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000, .rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | RATE_FIXED, .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED,
.enable_reg = (void __iomem *)SOFT_REQ_REG,
.enable_bit = 6,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic, .disable = &omap1_clk_disable_generic,
}; };
...@@ -659,7 +668,7 @@ static struct clk bclk_1510 = { ...@@ -659,7 +668,7 @@ static struct clk bclk_1510 = {
.name = "bclk", .name = "bclk",
/* Direct from ULPD, no parent. May be enabled by ext hardware. */ /* Direct from ULPD, no parent. May be enabled by ext hardware. */
.rate = 12000000, .rate = 12000000,
.flags = CLOCK_IN_OMAP1510 | RATE_FIXED, .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
.disable = &omap1_clk_disable_generic, .disable = &omap1_clk_disable_generic,
}; };
...@@ -683,7 +692,8 @@ static struct clk mmc1_ck = { ...@@ -683,7 +692,8 @@ static struct clk mmc1_ck = {
.parent = &armper_ck.clk, .parent = &armper_ck.clk,
.rate = 48000000, .rate = 48000000,
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT |
CLOCK_NO_IDLE_PARENT,
.enable_reg = (void __iomem *)MOD_CONF_CTRL_0, .enable_reg = (void __iomem *)MOD_CONF_CTRL_0,
.enable_bit = 23, .enable_bit = 23,
.enable = &omap1_clk_enable_generic, .enable = &omap1_clk_enable_generic,
...@@ -706,7 +716,7 @@ static struct clk mmc2_ck = { ...@@ -706,7 +716,7 @@ static struct clk mmc2_ck = {
static struct clk virtual_ck_mpu = { static struct clk virtual_ck_mpu = {
.name = "mpu", .name = "mpu",
.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
VIRTUAL_CLOCK | ALWAYS_ENABLED, CLOCK_IN_OMAP310 | VIRTUAL_CLOCK | ALWAYS_ENABLED,
.parent = &arm_ck, /* Is smarter alias for */ .parent = &arm_ck, /* Is smarter alias for */
.recalc = &followparent_recalc, .recalc = &followparent_recalc,
.set_rate = &omap1_select_table_rate, .set_rate = &omap1_select_table_rate,
......
...@@ -81,10 +81,11 @@ extern int clk_get_usecount(struct clk *clk); ...@@ -81,10 +81,11 @@ extern int clk_get_usecount(struct clk *clk);
#define CM_PLL_SEL1 (1 << 18) #define CM_PLL_SEL1 (1 << 18)
#define CM_PLL_SEL2 (1 << 19) #define CM_PLL_SEL2 (1 << 19)
#define CM_SYSCLKOUT_SEL1 (1 << 20) #define CM_SYSCLKOUT_SEL1 (1 << 20)
#define CLOCK_IN_OMAP730 (1 << 21) #define CLOCK_IN_OMAP310 (1 << 21)
#define CLOCK_IN_OMAP1510 (1 << 22) #define CLOCK_IN_OMAP730 (1 << 22)
#define CLOCK_IN_OMAP16XX (1 << 23) #define CLOCK_IN_OMAP1510 (1 << 23)
#define CLOCK_IN_OMAP242X (1 << 24) #define CLOCK_IN_OMAP16XX (1 << 24)
#define CLOCK_IN_OMAP243X (1 << 25) #define CLOCK_IN_OMAP242X (1 << 25)
#define CLOCK_IN_OMAP243X (1 << 26)
#endif #endif
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