• Anil Keshavamurthy's avatar
    [PATCH] ia64: race flushing icache in COW path · c38c8db7
    Anil Keshavamurthy authored
    There is a race condition that showed up in a threaded JIT environment.
    The situation is that a process with a JIT code page forks, so the page is
    marked read-only, then some threads are created in the child.  One of the
    threads attempts to add a new code block to the JIT page, so a
    copy-on-write fault is taken, and the kernel allocates a new page, copies
    the data, installs the new pte, and then calls lazy_mmu_prot_update() to
    flush caches to make sure that the icache and dcache are in sync.
    Unfortunately, the other thread runs right after the new pte is installed,
    but before the caches have been flushed.  It tries to execute some old JIT
    code that was already in this page, but it sees some garbage in the i-cache
    from the previous users of the new physical page.
    
    Fix: we must make the caches consistent before installing the pte.  This is
    an ia64 only fix because lazy_mmu_prot_update() is a no-op on all other
    architectures.
    Signed-off-by: default avatarAnil Keshavamurthy <anil.s.keshavamurthy@intel.com>
    Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
    Cc: Hugh Dickins <hugh@veritas.com>
    Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
    Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
    c38c8db7
memory.c 66.6 KB