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Rajesh Shah authored
Per the PCI Express spec, the power-fault-detected bit in the slot status register can be set anytime hardware detects a power fault, regardless of whether the slot has a device populated in it or not. This bit is sticky and must be explicitly cleared. This patch is needed to allow hot-add after such a power fault has been detected. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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