There's an existing quirk for the kernel to use 1k IO space granularity
on the Intel P64H2.  It turns out however that pci_setup_bridge() in
drivers/pci/setup-bus.c reads in the IO base and limit address register
masks it off to the nearest 4k, and writes it back.  This causes the
kernel to be on 1k boundaries and the hardware to be 4k aligned.  The
patch below fixes the problem. 
Signed-off-by: Dan Yeisley <dan.yeisley@unisys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>