src/misc/cpu.c:

 * SSE2 detection, using a similar approch as for SSE
parent 675864e2
...@@ -2,7 +2,7 @@ ...@@ -2,7 +2,7 @@
* cpu.c: CPU detection code * cpu.c: CPU detection code
***************************************************************************** *****************************************************************************
* Copyright (C) 1998-2004 VideoLAN * Copyright (C) 1998-2004 VideoLAN
* $Id: cpu.c,v 1.13 2004/01/20 15:34:44 hartman Exp $ * $Id: cpu.c,v 1.14 2004/02/01 23:02:02 sigmunau Exp $
* *
* Authors: Samuel Hocevar <sam@zoy.org> * Authors: Samuel Hocevar <sam@zoy.org>
* Christophe Massiot <massiot@via.ecp.fr> * Christophe Massiot <massiot@via.ecp.fr>
...@@ -185,6 +185,25 @@ uint32_t CPUCapabilities( void ) ...@@ -185,6 +185,25 @@ uint32_t CPUCapabilities( void )
} }
# endif # endif
} }
if( i_edx & 0x04000000 )
{
# ifdef CAN_COMPILE_SSE
/* We test if OS supports the SSE instructions */
psz_capability = "SSE2";
i_illegal = 0;
if( setjmp( env ) == 0 )
{
/* Test a SSE2 instruction */
__asm__ __volatile__ ( "movupd %%xmm0, %%xmm0\n" : : );
}
if( i_illegal == 0 )
{
i_capabilities |= CPU_CAPABILITY_SSE2;
}
# endif
}
/* test for additional capabilities */ /* test for additional capabilities */
cpuid( 0x80000000 ); cpuid( 0x80000000 );
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment