Commit b9c7e24f authored by Xiang, Haihao's avatar Xiang, Haihao

i965_drv_video: VC-1 on Sandybridge

Currently support progressive picture.
Signed-off-by: default avatarXiang, Haihao <haihao.xiang@intel.com>
parent ae6adeb0
This diff is collapsed.
......@@ -34,13 +34,30 @@
#include <i915_drm.h>
#include <intel_bufmgr.h>
struct gen6_mfd_surface
struct gen6_avc_surface
{
dri_bo *dmv_top;
dri_bo *dmv_bottom;
int dmv_bottom_flag;
};
#define GEN6_VC1_I_PICTURE 0
#define GEN6_VC1_P_PICTURE 1
#define GEN6_VC1_B_PICTURE 2
#define GEN6_VC1_BI_PICTURE 3
#define GEN6_VC1_SKIPPED_PICTURE 4
#define GEN6_VC1_SIMPLE_PROFILE 0
#define GEN6_VC1_MAIN_PROFILE 1
#define GEN6_VC1_ADVANCED_PROFILE 2
#define GEN6_VC1_RESERVED_PROFILE 3
struct gen6_vc1_surface
{
dri_bo *dmv;
int picture_type;
};
#define MAX_MFX_REFERENCE_SURFACES 16
struct gen6_mfd_context
{
......
......@@ -159,6 +159,12 @@
#define MFD_MPEG2_BSD_OBJECT MFX(2, 3, 1, 8)
#define MFX_VC1_PIC_STATE MFX(2, 2, 0, 0)
#define MFX_VC1_PRED_PIPE_STATE MFX(2, 2, 0, 1)
#define MFX_VC1_DIRECTMODE_STATE MFX(2, 2, 0, 2)
#define MFD_VC1_BSD_OBJECT MFX(2, 2, 1, 8)
#define I965_DEPTHFORMAT_D32_FLOAT 1
#define BASE_ADDRESS_MODIFY (1 << 0)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment