Commit 79172c79 authored by Xiang, Haihao's avatar Xiang, Haihao

i965_drv_video: deinterlacing & scaling on SandyBridge

Signed-off-by: default avatarXiang, Haihao <haihao.xiang@intel.com>
parent 5f2b34c1
......@@ -27,6 +27,13 @@
#define CMD_BSD_IND_OBJ_BASE_ADDR CMD(2, 4, 4)
#define CMD_AVC_BSD_OBJECT CMD(2, 4, 8)
#define CMD_MEDIA_VFE_STATE CMD(2, 0, 0)
#define CMD_MEDIA_CURBE_LOAD CMD(2, 0, 1)
#define CMD_MEDIA_INTERFACE_DESCRIPTOR_LOAD CMD(2, 0, 2)
#define CMD_MEDIA_GATEWAY_STATE CMD(2, 0, 3)
#define CMD_MEDIA_STATE_FLUSH CMD(2, 0, 4)
#define CMD_MEDIA_OBJECT_WALKER CMD(2, 1, 3)
#define CMD_PIPELINED_POINTERS CMD(3, 0, 0)
#define CMD_BINDING_TABLE_POINTERS CMD(3, 0, 1)
# define GEN6_BINDING_TABLE_MODIFY_PS (1 << 12)/* for GEN6 */
......
This diff is collapsed.
......@@ -89,6 +89,7 @@ struct i965_post_processing_context
struct {
dri_bo *bo;
int num_interface_descriptors;
} idrt;
struct {
......
......@@ -1421,11 +1421,6 @@ i965_render_put_surface(VADriverContextP ctx,
unsigned short desth,
unsigned int flag)
{
i965_post_processing(ctx, surface,
srcx, srcy, srcw, srch,
destx, desty, destw, desth,
flag);
i965_render_initialize(ctx);
i965_surface_render_state_setup(ctx, surface,
srcx, srcy, srcw, srch,
......@@ -2023,6 +2018,11 @@ intel_render_put_surface(VADriverContextP ctx,
{
struct i965_driver_data *i965 = i965_driver_data(ctx);
i965_post_processing(ctx, surface,
srcx, srcy, srcw, srch,
destx, desty, destw, desth,
flag);
if (IS_GEN6(i965->intel.device_id))
gen6_render_put_surface(ctx, surface,
srcx, srcy, srcw, srch,
......
......@@ -1065,4 +1065,67 @@ struct gen6_depth_stencil_state
} ds2;
};
struct gen6_interface_descriptor_data
{
struct {
unsigned int pad0:6;
unsigned int kernel_start_pointer:26;
} desc0;
struct {
unsigned int pad0:7;
unsigned int software_exception_enable:1;
unsigned int pad1:3;
unsigned int maskstack_exception_enable:1;
unsigned int pad2:1;
unsigned int illegal_opcode_exception_enable:1;
unsigned int pad3:2;
unsigned int floating_point_mode:1;
unsigned int thread_priority:1;
unsigned int single_program_flow:1;
unsigned int pad4:13;
} desc1;
struct {
unsigned int pad0:2;
unsigned int sampler_count:3;
unsigned int sampler_state_pointer:27;
} desc2;
struct {
unsigned int binding_table_entry_count:5;
unsigned int binding_table_pointer:27;
} desc3;
struct {
unsigned int constant_urb_entry_read_offset:16;
unsigned int constant_urb_entry_read_length:16;
} desc4;
union {
struct {
unsigned int num_threads:8;
unsigned int barrier_return_byte:8;
unsigned int shared_local_memory_size:5;
unsigned int barrier_enable:1;
unsigned int rounding_mode:2;
unsigned int barrier_return_grf_offset:8;
} gen7;
struct {
unsigned int barrier_id:4;
unsigned int pad0:28;
} gen6;
} desc5;
struct {
unsigned int cross_thread_constant_data_read_length:8;
unsigned int pad0:24;
} desc6;
struct {
unsigned int pad0;
} desc7;
};
#endif /* _I965_STRUCTS_H_ */
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