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Commit 3452cb67 authored by Xiang, Haihao's avatar Xiang, Haihao
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i965_drv_video: move batchbuffer to context 

Signed-off-by: default avatarXiang, Haihao <haihao.xiang@intel.com>
parent d94adb34
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Showing with 343 additions and 389 deletions
i965_drv_video/gen6_mfc.c
View file @ 3452cb67
......@@ -39,10 +39,9 @@
#include "i965_encoder.h"
static void
gen6_mfc_pipe_mode_select(VADriverContextP ctx)
gen6_mfc_pipe_mode_select(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
BEGIN_BCS_BATCH(batch,4);
......@@ -74,8 +73,7 @@ gen6_mfc_pipe_mode_select(VADriverContextP ctx)
static void
gen6_mfc_surface_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context;
BEGIN_BCS_BATCH(batch, 6);
......@@ -103,8 +101,7 @@ gen6_mfc_surface_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_e
static void
gen6_mfc_pipe_buf_addr_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context;
int i;
......@@ -147,8 +144,7 @@ gen6_mfc_pipe_buf_addr_state(VADriverContextP ctx, struct gen6_encoder_context *
static void
gen6_mfc_ind_obj_base_addr_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context;
BEGIN_BCS_BATCH(batch, 11);
......@@ -173,8 +169,7 @@ gen6_mfc_ind_obj_base_addr_state(VADriverContextP ctx, struct gen6_encoder_conte
static void
gen6_mfc_bsp_buf_base_addr_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context;
BEGIN_BCS_BATCH(batch, 4);
......@@ -192,8 +187,7 @@ gen6_mfc_bsp_buf_base_addr_state(VADriverContextP ctx, struct gen6_encoder_conte
static void
gen6_mfc_avc_img_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context;
int width_in_mbs = (mfc_context->surface_state.width + 15) / 16;
......@@ -245,10 +239,9 @@ gen6_mfc_avc_img_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_e
}
static void gen6_mfc_avc_directmode_state(VADriverContextP ctx)
static void gen6_mfc_avc_directmode_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
int i;
BEGIN_BCS_BATCH(batch, 69);
......@@ -286,8 +279,7 @@ static void gen6_mfc_avc_slice_state(VADriverContextP ctx,
int intra_slice,
struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context;
BEGIN_BCS_BATCH(batch, 11);;
......@@ -332,10 +324,9 @@ static void gen6_mfc_avc_slice_state(VADriverContextP ctx,
ADVANCE_BCS_BATCH(batch);
}
static void gen6_mfc_avc_qm_state(VADriverContextP ctx)
static void gen6_mfc_avc_qm_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
int i;
BEGIN_BCS_BATCH(batch, 58);
......@@ -349,10 +340,9 @@ static void gen6_mfc_avc_qm_state(VADriverContextP ctx)
ADVANCE_BCS_BATCH(batch);
}
static void gen6_mfc_avc_fqm_state(VADriverContextP ctx)
static void gen6_mfc_avc_fqm_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
int i;
BEGIN_BCS_BATCH(batch, 113);
......@@ -365,10 +355,9 @@ static void gen6_mfc_avc_fqm_state(VADriverContextP ctx)
ADVANCE_BCS_BATCH(batch);
}
static void gen6_mfc_avc_ref_idx_state(VADriverContextP ctx)
static void gen6_mfc_avc_ref_idx_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
int i;
BEGIN_BCS_BATCH(batch, 10);
......@@ -386,10 +375,9 @@ static void gen6_mfc_avc_ref_idx_state(VADriverContextP ctx)
static void
gen6_mfc_avc_insert_object(VADriverContextP ctx, int flush_data)
gen6_mfc_avc_insert_object(VADriverContextP ctx, int flush_data, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
BEGIN_BCS_BATCH(batch, 4);
......@@ -406,10 +394,10 @@ gen6_mfc_avc_insert_object(VADriverContextP ctx, int flush_data)
}
static int
gen6_mfc_avc_pak_object_intra(VADriverContextP ctx, int x, int y, int end_mb, int qp,unsigned int *msg)
gen6_mfc_avc_pak_object_intra(VADriverContextP ctx, int x, int y, int end_mb, int qp,unsigned int *msg,
struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
int len_in_dwords = 11;
BEGIN_BCS_BATCH(batch, len_in_dwords);
......@@ -441,10 +429,10 @@ gen6_mfc_avc_pak_object_intra(VADriverContextP ctx, int x, int y, int end_mb, in
return len_in_dwords;
}
static int gen6_mfc_avc_pak_object_inter(VADriverContextP ctx, int x, int y, int end_mb, int qp, unsigned int offset)
static int gen6_mfc_avc_pak_object_inter(VADriverContextP ctx, int x, int y, int end_mb, int qp, unsigned int offset,
struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
int len_in_dwords = 11;
BEGIN_BCS_BATCH(batch, len_in_dwords);
......@@ -547,8 +535,7 @@ void gen6_mfc_avc_pipeline_programing(VADriverContextP ctx,
struct encode_state *encode_state,
struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
struct gen6_mfc_context *mfc_context = &gen6_encoder_context->mfc_context;
struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context;
VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param->buffer;
......@@ -574,15 +561,15 @@ void gen6_mfc_avc_pipeline_programing(VADriverContextP ctx,
if (emit_new_state) {
intel_batchbuffer_emit_mi_flush(batch);
gen6_mfc_pipe_mode_select(ctx);
gen6_mfc_pipe_mode_select(ctx, gen6_encoder_context);
gen6_mfc_surface_state(ctx, gen6_encoder_context);
gen6_mfc_pipe_buf_addr_state(ctx, gen6_encoder_context);
gen6_mfc_ind_obj_base_addr_state(ctx, gen6_encoder_context);
gen6_mfc_bsp_buf_base_addr_state(ctx, gen6_encoder_context);
gen6_mfc_avc_img_state(ctx, gen6_encoder_context);
gen6_mfc_avc_qm_state(ctx);
gen6_mfc_avc_fqm_state(ctx);
gen6_mfc_avc_ref_idx_state(ctx);
gen6_mfc_avc_qm_state(ctx, gen6_encoder_context);
gen6_mfc_avc_fqm_state(ctx, gen6_encoder_context);
gen6_mfc_avc_ref_idx_state(ctx, gen6_encoder_context);
/*gen6_mfc_avc_directmode_state(ctx);*/
gen6_mfc_avc_slice_state(ctx, is_intra, gen6_encoder_context);
/*gen6_mfc_avc_insert_object(ctx, 0);*/
......@@ -591,10 +578,10 @@ void gen6_mfc_avc_pipeline_programing(VADriverContextP ctx,
if (is_intra) {
assert(msg);
object_len_in_bytes = gen6_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg);
object_len_in_bytes = gen6_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, gen6_encoder_context);
msg += 4;
} else {
object_len_in_bytes = gen6_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp, offset);
object_len_in_bytes = gen6_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp, offset, gen6_encoder_context);
offset += 64;
}
......@@ -683,8 +670,7 @@ static VAStatus gen6_mfc_run(VADriverContextP ctx,
struct encode_state *encode_state,
struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
intel_batchbuffer_flush(batch); //run the pipeline
......
i965_drv_video/gen6_mfd.c
View file @ 3452cb67
......@@ -242,8 +242,7 @@ gen6_mfd_pipe_mode_select(VADriverContextP ctx,
int standard_select,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
assert(standard_select == MFX_FORMAT_MPEG2 ||
standard_select == MFX_FORMAT_AVC ||
......@@ -278,10 +277,10 @@ gen6_mfd_pipe_mode_select(VADriverContextP ctx,
static void
gen6_mfd_surface_state(VADriverContextP ctx,
struct decode_state *decode_state,
int standard_select)
int standard_select,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct object_surface *obj_surface = SURFACE(decode_state->current_render_target);
assert(obj_surface);
......@@ -313,8 +312,7 @@ gen6_mfd_pipe_buf_addr_state(VADriverContextP ctx,
int standard_select,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
int i;
......@@ -374,10 +372,10 @@ gen6_mfd_pipe_buf_addr_state(VADriverContextP ctx,
static void
gen6_mfd_ind_obj_base_addr_state(VADriverContextP ctx,
dri_bo *slice_data_bo,
int standard_select)
int standard_select,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
BEGIN_BCS_BATCH(batch, 11);
OUT_BCS_BATCH(batch, MFX_IND_OBJ_BASE_ADDR_STATE | (11 - 2));
......@@ -400,8 +398,7 @@ gen6_mfd_bsp_buf_base_addr_state(VADriverContextP ctx,
int standard_select,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
BEGIN_BCS_BATCH(batch, 4);
OUT_BCS_BATCH(batch, MFX_BSP_BUF_BASE_ADDR_STATE | (4 - 2));
......@@ -441,10 +438,10 @@ gen6_mfd_aes_state(VADriverContextP ctx,
static void
gen6_mfd_wait(VADriverContextP ctx,
struct decode_state *decode_state,
int standard_select)
int standard_select,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
BEGIN_BCS_BATCH(batch, 1);
OUT_BCS_BATCH(batch, MFX_WAIT | (1 << 8));
......@@ -452,10 +449,11 @@ gen6_mfd_wait(VADriverContextP ctx,
}
static void
gen6_mfd_avc_img_state(VADriverContextP ctx, struct decode_state *decode_state)
gen6_mfd_avc_img_state(VADriverContextP ctx,
struct decode_state *decode_state,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
int qm_present_flag;
int img_struct;
int mbaff_frame_flag;
......@@ -541,10 +539,11 @@ gen6_mfd_avc_img_state(VADriverContextP ctx, struct decode_state *decode_state)
}
static void
gen6_mfd_avc_qm_state(VADriverContextP ctx, struct decode_state *decode_state)
gen6_mfd_avc_qm_state(VADriverContextP ctx,
struct decode_state *decode_state,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
int cmd_len;
VAIQMatrixBufferH264 *iq_matrix;
VAPictureParameterBufferH264 *pic_param;
......@@ -588,9 +587,8 @@ gen6_mfd_avc_directmode_state(VADriverContextP ctx,
VASliceParameterBufferH264 *slice_param,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
struct object_surface *obj_surface;
struct gen6_avc_surface *gen6_avc_surface;
VAPictureH264 *va_pic;
......@@ -687,10 +685,10 @@ static void
gen6_mfd_avc_slice_state(VADriverContextP ctx,
VAPictureParameterBufferH264 *pic_param,
VASliceParameterBufferH264 *slice_param,
VASliceParameterBufferH264 *next_slice_param)
VASliceParameterBufferH264 *next_slice_param,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1;
int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1;
int slice_hor_pos, slice_ver_pos, next_slice_hor_pos, next_slice_ver_pos;
......@@ -774,10 +772,11 @@ gen6_mfd_avc_slice_state(VADriverContextP ctx,
}
static void
gen6_mfd_avc_phantom_slice_state(VADriverContextP ctx, VAPictureParameterBufferH264 *pic_param)
gen6_mfd_avc_phantom_slice_state(VADriverContextP ctx,
VAPictureParameterBufferH264 *pic_param,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1;
int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */
......@@ -804,8 +803,7 @@ gen6_mfd_avc_ref_idx_state(VADriverContextP ctx,
VASliceParameterBufferH264 *slice_param,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
int i, j, num_ref_list;
struct {
unsigned char bottom_idc:1;
......@@ -879,10 +877,10 @@ gen6_mfd_avc_ref_idx_state(VADriverContextP ctx,
static void
gen6_mfd_avc_weightoffset_state(VADriverContextP ctx,
VAPictureParameterBufferH264 *pic_param,
VASliceParameterBufferH264 *slice_param)
VASliceParameterBufferH264 *slice_param,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
int i, j, num_weight_offset_table = 0;
short weightoffsets[32 * 6];
......@@ -952,10 +950,10 @@ static void
gen6_mfd_avc_bsd_object(VADriverContextP ctx,
VAPictureParameterBufferH264 *pic_param,
VASliceParameterBufferH264 *slice_param,
dri_bo *slice_data_bo)
dri_bo *slice_data_bo,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
int slice_data_bit_offset;
uint8_t *slice_data = NULL;
......@@ -986,10 +984,11 @@ gen6_mfd_avc_bsd_object(VADriverContextP ctx,
}
static void
gen6_mfd_avc_phantom_slice_bsd_object(VADriverContextP ctx, VAPictureParameterBufferH264 *pic_param)
gen6_mfd_avc_phantom_slice_bsd_object(VADriverContextP ctx,
VAPictureParameterBufferH264 *pic_param,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
BEGIN_BCS_BATCH(batch, 6);
OUT_BCS_BATCH(batch, MFD_AVC_BSD_OBJECT | (6 - 2));
......@@ -1002,10 +1001,12 @@ gen6_mfd_avc_phantom_slice_bsd_object(VADriverContextP ctx, VAPictureParameterBu
}
static void
gen6_mfd_avc_phantom_slice(VADriverContextP ctx, VAPictureParameterBufferH264 *pic_param)
gen6_mfd_avc_phantom_slice(VADriverContextP ctx,
VAPictureParameterBufferH264 *pic_param,
struct gen6_mfd_context *gen6_mfd_context)
{
gen6_mfd_avc_phantom_slice_state(ctx, pic_param);
gen6_mfd_avc_phantom_slice_bsd_object(ctx, pic_param);
gen6_mfd_avc_phantom_slice_state(ctx, pic_param, gen6_mfd_context);
gen6_mfd_avc_phantom_slice_bsd_object(ctx, pic_param, gen6_mfd_context);
}
static void
......@@ -1127,8 +1128,7 @@ gen6_mfd_avc_decode_picture(VADriverContextP ctx,
struct decode_state *decode_state,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
VAPictureParameterBufferH264 *pic_param;
VASliceParameterBufferH264 *slice_param, *next_slice_param;
dri_bo *slice_data_bo;
......@@ -1141,11 +1141,11 @@ gen6_mfd_avc_decode_picture(VADriverContextP ctx,
intel_batchbuffer_start_atomic_bcs(batch, 0x1000);
intel_batchbuffer_emit_mi_flush(batch);
gen6_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_AVC, gen6_mfd_context);
gen6_mfd_surface_state(ctx, decode_state, MFX_FORMAT_AVC);
gen6_mfd_surface_state(ctx, decode_state, MFX_FORMAT_AVC, gen6_mfd_context);
gen6_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_AVC, gen6_mfd_context);
gen6_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_AVC, gen6_mfd_context);
gen6_mfd_avc_img_state(ctx, decode_state);
gen6_mfd_avc_qm_state(ctx, decode_state);
gen6_mfd_avc_img_state(ctx, decode_state, gen6_mfd_context);
gen6_mfd_avc_qm_state(ctx, decode_state, gen6_mfd_context);
for (j = 0; j < decode_state->num_slice_params; j++) {
assert(decode_state->slice_params && decode_state->slice_params[j]->buffer);
......@@ -1157,7 +1157,7 @@ gen6_mfd_avc_decode_picture(VADriverContextP ctx,
else
next_slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j + 1]->buffer;
gen6_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_AVC);
gen6_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_AVC, gen6_mfd_context);
assert(decode_state->slice_params[j]->num_elements == 1);
for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) {
......@@ -1172,15 +1172,15 @@ gen6_mfd_avc_decode_picture(VADriverContextP ctx,
next_slice_param = slice_param + 1;
gen6_mfd_avc_directmode_state(ctx, pic_param, slice_param, gen6_mfd_context);
gen6_mfd_avc_slice_state(ctx, pic_param, slice_param, next_slice_param);
gen6_mfd_avc_slice_state(ctx, pic_param, slice_param, next_slice_param, gen6_mfd_context);
gen6_mfd_avc_ref_idx_state(ctx, pic_param, slice_param, gen6_mfd_context);
gen6_mfd_avc_weightoffset_state(ctx, pic_param, slice_param);
gen6_mfd_avc_bsd_object(ctx, pic_param, slice_param, slice_data_bo);
gen6_mfd_avc_weightoffset_state(ctx, pic_param, slice_param, gen6_mfd_context);
gen6_mfd_avc_bsd_object(ctx, pic_param, slice_param, slice_data_bo, gen6_mfd_context);
slice_param++;
}
}
gen6_mfd_avc_phantom_slice(ctx, pic_param);
gen6_mfd_avc_phantom_slice(ctx, pic_param, gen6_mfd_context);
intel_batchbuffer_end_atomic(batch);
intel_batchbuffer_flush(batch);
}
......@@ -1260,10 +1260,11 @@ gen6_mfd_mpeg2_decode_init(VADriverContextP ctx,
}
static void
gen6_mfd_mpeg2_pic_state(VADriverContextP ctx, struct decode_state *decode_state)
gen6_mfd_mpeg2_pic_state(VADriverContextP ctx,
struct decode_state *decode_state,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
VAPictureParameterBufferMPEG2 *pic_param;
assert(decode_state->pic_param && decode_state->pic_param->buffer);
......@@ -1293,10 +1294,11 @@ gen6_mfd_mpeg2_pic_state(VADriverContextP ctx, struct decode_state *decode_state
}
static void
gen6_mfd_mpeg2_qm_state(VADriverContextP ctx, struct decode_state *decode_state)
gen6_mfd_mpeg2_qm_state(VADriverContextP ctx,
struct decode_state *decode_state,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
VAIQMatrixBufferMPEG2 *iq_matrix;
int i;
......@@ -1341,10 +1343,10 @@ static void
gen6_mfd_mpeg2_bsd_object(VADriverContextP ctx,
VAPictureParameterBufferMPEG2 *pic_param,
VASliceParameterBufferMPEG2 *slice_param,
VASliceParameterBufferMPEG2 *next_slice_param)
VASliceParameterBufferMPEG2 *next_slice_param,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
unsigned int width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16;
unsigned int height_in_mbs = ALIGN(pic_param->vertical_size, 16) / 16;
int mb_count;
......@@ -1379,8 +1381,7 @@ gen6_mfd_mpeg2_decode_picture(VADriverContextP ctx,
struct decode_state *decode_state,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
VAPictureParameterBufferMPEG2 *pic_param;
VASliceParameterBufferMPEG2 *slice_param, *next_slice_param;
dri_bo *slice_data_bo;
......@@ -1393,18 +1394,18 @@ gen6_mfd_mpeg2_decode_picture(VADriverContextP ctx,
intel_batchbuffer_start_atomic_bcs(batch, 0x1000);
intel_batchbuffer_emit_mi_flush(batch);
gen6_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_MPEG2, gen6_mfd_context);
gen6_mfd_surface_state(ctx, decode_state, MFX_FORMAT_MPEG2);
gen6_mfd_surface_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen6_mfd_context);
gen6_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen6_mfd_context);
gen6_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_MPEG2, gen6_mfd_context);
gen6_mfd_mpeg2_pic_state(ctx, decode_state);
gen6_mfd_mpeg2_qm_state(ctx, decode_state);
gen6_mfd_mpeg2_pic_state(ctx, decode_state, gen6_mfd_context);
gen6_mfd_mpeg2_qm_state(ctx, decode_state, gen6_mfd_context);
assert(decode_state->num_slice_params == 1);
for (j = 0; j < decode_state->num_slice_params; j++) {
assert(decode_state->slice_params && decode_state->slice_params[j]->buffer);
slice_param = (VASliceParameterBufferMPEG2 *)decode_state->slice_params[j]->buffer;
slice_data_bo = decode_state->slice_datas[j]->bo;
gen6_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_MPEG2);
gen6_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_MPEG2, gen6_mfd_context);
for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) {
assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL);
......@@ -1414,7 +1415,7 @@ gen6_mfd_mpeg2_decode_picture(VADriverContextP ctx,
else
next_slice_param = NULL;
gen6_mfd_mpeg2_bsd_object(ctx, pic_param, slice_param, next_slice_param);
gen6_mfd_mpeg2_bsd_object(ctx, pic_param, slice_param, next_slice_param, gen6_mfd_context);
slice_param++;
}
}
......@@ -1653,10 +1654,11 @@ gen6_mfd_vc1_decode_init(VADriverContextP ctx,
}
static void
gen6_mfd_vc1_pic_state(VADriverContextP ctx, struct decode_state *decode_state)
gen6_mfd_vc1_pic_state(VADriverContextP ctx,
struct decode_state *decode_state,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
VAPictureParameterBufferVC1 *pic_param;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct object_surface *obj_surface;
......@@ -1865,10 +1867,11 @@ gen6_mfd_vc1_pic_state(VADriverContextP ctx, struct decode_state *decode_state)
}
static void
gen6_mfd_vc1_pred_pipe_state(VADriverContextP ctx, struct decode_state *decode_state)
gen6_mfd_vc1_pred_pipe_state(VADriverContextP ctx,
struct decode_state *decode_state,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
VAPictureParameterBufferVC1 *pic_param;
int interpolation_mode = 0;
int intensitycomp_single;
......@@ -1917,10 +1920,11 @@ gen6_mfd_vc1_pred_pipe_state(VADriverContextP ctx, struct decode_state *decode_s
static void
gen6_mfd_vc1_directmode_state(VADriverContextP ctx, struct decode_state *decode_state)
gen6_mfd_vc1_directmode_state(VADriverContextP ctx,
struct decode_state *decode_state,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
VAPictureParameterBufferVC1 *pic_param;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct object_surface *obj_surface;
......@@ -1988,10 +1992,10 @@ gen6_mfd_vc1_bsd_object(VADriverContextP ctx,
VAPictureParameterBufferVC1 *pic_param,
VASliceParameterBufferVC1 *slice_param,
VASliceParameterBufferVC1 *next_slice_param,
dri_bo *slice_data_bo)
dri_bo *slice_data_bo,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
int next_slice_start_vert_pos;
int macroblock_offset;
uint8_t *slice_data = NULL;
......@@ -2026,8 +2030,7 @@ gen6_mfd_vc1_decode_picture(VADriverContextP ctx,
struct decode_state *decode_state,
struct gen6_mfd_context *gen6_mfd_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
VAPictureParameterBufferVC1 *pic_param;
VASliceParameterBufferVC1 *slice_param, *next_slice_param;
dri_bo *slice_data_bo;
......@@ -2040,19 +2043,19 @@ gen6_mfd_vc1_decode_picture(VADriverContextP ctx,
intel_batchbuffer_start_atomic_bcs(batch, 0x1000);
intel_batchbuffer_emit_mi_flush(batch);
gen6_mfd_pipe_mode_select(ctx, decode_state, MFX_FORMAT_VC1, gen6_mfd_context);
gen6_mfd_surface_state(ctx, decode_state, MFX_FORMAT_VC1);
gen6_mfd_surface_state(ctx, decode_state, MFX_FORMAT_VC1, gen6_mfd_context);
gen6_mfd_pipe_buf_addr_state(ctx, decode_state, MFX_FORMAT_VC1, gen6_mfd_context);
gen6_mfd_bsp_buf_base_addr_state(ctx, decode_state, MFX_FORMAT_VC1, gen6_mfd_context);
gen6_mfd_vc1_pic_state(ctx, decode_state);
gen6_mfd_vc1_pred_pipe_state(ctx, decode_state);
gen6_mfd_vc1_directmode_state(ctx, decode_state);
gen6_mfd_vc1_pic_state(ctx, decode_state, gen6_mfd_context);
gen6_mfd_vc1_pred_pipe_state(ctx, decode_state, gen6_mfd_context);
gen6_mfd_vc1_directmode_state(ctx, decode_state, gen6_mfd_context);
assert(decode_state->num_slice_params == 1);
for (j = 0; j < decode_state->num_slice_params; j++) {
assert(decode_state->slice_params && decode_state->slice_params[j]->buffer);
slice_param = (VASliceParameterBufferVC1 *)decode_state->slice_params[j]->buffer;
slice_data_bo = decode_state->slice_datas[j]->bo;
gen6_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_VC1);
gen6_mfd_ind_obj_base_addr_state(ctx, slice_data_bo, MFX_FORMAT_VC1, gen6_mfd_context);
for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) {
assert(slice_param->slice_data_flag == VA_SLICE_DATA_FLAG_ALL);
......@@ -2062,7 +2065,7 @@ gen6_mfd_vc1_decode_picture(VADriverContextP ctx,
else
next_slice_param = NULL;
gen6_mfd_vc1_bsd_object(ctx, pic_param, slice_param, next_slice_param, slice_data_bo);
gen6_mfd_vc1_bsd_object(ctx, pic_param, slice_param, next_slice_param, slice_data_bo, gen6_mfd_context);
slice_param++;
}
}
......@@ -2133,17 +2136,20 @@ gen6_mfd_context_destroy(void *hw_context)
dri_bo_unreference(gen6_mfd_context->bitplane_read_buffer.bo);
gen6_mfd_context->bitplane_read_buffer.bo = NULL;
intel_batchbuffer_free(gen6_mfd_context->base.batch);
free(gen6_mfd_context);
}
struct hw_context *
gen6_dec_hw_context_init(VADriverContextP ctx, VAProfile profile)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct gen6_mfd_context *gen6_mfd_context = calloc(1, sizeof(struct gen6_mfd_context));
int i;
gen6_mfd_context->base.destroy = gen6_mfd_context_destroy;
gen6_mfd_context->base.run = gen6_mfd_decode_picture;
gen6_mfd_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER);
for (i = 0; i < ARRAY_ELEMS(gen6_mfd_context->reference_surface); i++) {
gen6_mfd_context->reference_surface[i].surface_id = VA_INVALID_ID;
......
i965_drv_video/gen6_vme.c
View file @ 3452cb67
......@@ -434,20 +434,18 @@ static VAStatus gen6_vme_vme_state_setup(VADriverContextP ctx,
return VA_STATUS_SUCCESS;
}
static void gen6_vme_pipeline_select(VADriverContextP ctx)
static void gen6_vme_pipeline_select(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
BEGIN_BATCH(batch, 1);
OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
ADVANCE_BATCH(batch);
}
static void gen6_vme_state_base_address(VADriverContextP ctx)
static void gen6_vme_state_base_address(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
BEGIN_BATCH(batch, 10);
......@@ -474,8 +472,7 @@ static void gen6_vme_state_base_address(VADriverContextP ctx)
static void gen6_vme_vfe_state(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context;
BEGIN_BATCH(batch, 8);
......@@ -498,8 +495,7 @@ static void gen6_vme_vfe_state(VADriverContextP ctx, struct gen6_encoder_context
static void gen6_vme_curbe_load(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context;
BEGIN_BATCH(batch, 4);
......@@ -515,8 +511,7 @@ static void gen6_vme_curbe_load(VADriverContextP ctx, struct gen6_encoder_contex
static void gen6_vme_idrt(VADriverContextP ctx, struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
struct gen6_vme_context *vme_context = &gen6_encoder_context->vme_context;
BEGIN_BATCH(batch, 4);
......@@ -532,11 +527,11 @@ static void gen6_vme_idrt(VADriverContextP ctx, struct gen6_encoder_context *gen
static int gen6_vme_media_object(VADriverContextP ctx,
struct encode_state *encode_state,
int mb_x, int mb_y,
int kernel)
int kernel,
struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
struct object_surface *obj_surface = SURFACE(encode_state->current_render_target);
int mb_width = ALIGN(obj_surface->orig_width, 16) / 16;
int len_in_dowrds = 6 + 1;
......@@ -617,8 +612,7 @@ static void gen6_vme_pipeline_programing(VADriverContextP ctx,
struct encode_state *encode_state,
struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
VAEncSliceParameterBuffer *pSliceParameter = (VAEncSliceParameterBuffer *)encode_state->slice_params[0]->buffer;
VAEncSequenceParameterBufferH264 *pSequenceParameter = (VAEncSequenceParameterBufferH264 *)encode_state->seq_param->buffer;
int is_intra = pSliceParameter->slice_flags.bits.is_intra;
......@@ -642,10 +636,10 @@ static void gen6_vme_pipeline_programing(VADriverContextP ctx,
ADVANCE_BATCH(batch);
/*Step2: State command PIPELINE_SELECT*/
gen6_vme_pipeline_select(ctx);
gen6_vme_pipeline_select(ctx, gen6_encoder_context);
/*Step3: State commands configuring pipeline states*/
gen6_vme_state_base_address(ctx);
gen6_vme_state_base_address(ctx, gen6_encoder_context);
gen6_vme_vfe_state(ctx, gen6_encoder_context);
gen6_vme_curbe_load(ctx, gen6_encoder_context);
gen6_vme_idrt(ctx, gen6_encoder_context);
......@@ -654,7 +648,7 @@ static void gen6_vme_pipeline_programing(VADriverContextP ctx,
}
/*Step4: Primitive commands*/
object_len_in_bytes = gen6_vme_media_object(ctx, encode_state, x, y, is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER);
object_len_in_bytes = gen6_vme_media_object(ctx, encode_state, x, y, is_intra ? VME_INTRA_SHADER : VME_INTER_SHADER, gen6_encoder_context);
if (intel_batchbuffer_check_free_space(batch, object_len_in_bytes) == 0) {
assert(0);
......@@ -693,8 +687,7 @@ static VAStatus gen6_vme_run(VADriverContextP ctx,
struct encode_state *encode_state,
struct gen6_encoder_context *gen6_encoder_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = gen6_encoder_context->base.batch;
intel_batchbuffer_flush(batch);
......
i965_drv_video/i965_avc_bsd.c
View file @ 3452cb67
......@@ -97,10 +97,13 @@ i965_avc_bsd_init_avc_bsd_surface(VADriverContextP ctx,
}
static void
i965_bsd_ind_obj_base_address(VADriverContextP ctx, struct decode_state *decode_state, int slice)
i965_bsd_ind_obj_base_address(VADriverContextP ctx,
struct decode_state *decode_state,
int slice,
struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = i965_h264_context->batch;
dri_bo *ind_bo = decode_state->slice_datas[slice]->bo;
......@@ -118,8 +121,7 @@ i965_avc_bsd_img_state(VADriverContextP ctx,
struct decode_state *decode_state,
struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = i965_h264_context->batch;
int qm_present_flag;
int img_struct;
int mbaff_frame_flag;
......@@ -209,10 +211,11 @@ i965_avc_bsd_img_state(VADriverContextP ctx,
}
static void
i965_avc_bsd_qm_state(VADriverContextP ctx, struct decode_state *decode_state)
i965_avc_bsd_qm_state(VADriverContextP ctx,
struct decode_state *decode_state,
struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = i965_h264_context->batch;
int cmd_len;
VAIQMatrixBufferH264 *iq_matrix;
VAPictureParameterBufferH264 *pic_param;
......@@ -256,8 +259,7 @@ i965_avc_bsd_slice_state(VADriverContextP ctx,
VASliceParameterBufferH264 *slice_param,
struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = i965_h264_context->batch;
int present_flag, cmd_len, list, j;
struct {
unsigned char bottom_idc:1;
......@@ -428,9 +430,8 @@ i965_avc_bsd_buf_base_state(VADriverContextP ctx,
VASliceParameterBufferH264 *slice_param,
struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965_h264_context->batch;
struct i965_avc_bsd_context *i965_avc_bsd_context;
int i, j;
VAPictureH264 *va_pic;
......@@ -608,8 +609,7 @@ g4x_avc_bsd_object(VADriverContextP ctx,
int slice_index,
struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = i965_h264_context->batch;
int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1;
int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */
......@@ -738,8 +738,7 @@ ironlake_avc_bsd_object(VADriverContextP ctx,
int slice_index,
struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = i965_h264_context->batch;
int width_in_mbs = pic_param->picture_width_in_mbs_minus1 + 1;
int height_in_mbs = pic_param->picture_height_in_mbs_minus1 + 1; /* frame height */
......@@ -1025,9 +1024,8 @@ i965_avc_bsd_frame_store_index(VADriverContextP ctx,
void
i965_avc_bsd_pipeline(VADriverContextP ctx, struct decode_state *decode_state, void *h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_h264_context *i965_h264_context = (struct i965_h264_context *)h264_context;
struct intel_batchbuffer *batch = i965_h264_context->batch;
VAPictureParameterBufferH264 *pic_param;
VASliceParameterBufferH264 *slice_param;
int i, j;
......@@ -1064,13 +1062,13 @@ i965_avc_bsd_pipeline(VADriverContextP ctx, struct decode_state *decode_state, v
intel_batchbuffer_start_atomic_bcs(batch, 0x1000);
i965_avc_bsd_img_state(ctx, decode_state, i965_h264_context);
i965_avc_bsd_qm_state(ctx, decode_state);
i965_avc_bsd_qm_state(ctx, decode_state, i965_h264_context);
for (j = 0; j < decode_state->num_slice_params; j++) {
assert(decode_state->slice_params && decode_state->slice_params[j]->buffer);
slice_param = (VASliceParameterBufferH264 *)decode_state->slice_params[j]->buffer;
i965_bsd_ind_obj_base_address(ctx, decode_state, j);
i965_bsd_ind_obj_base_address(ctx, decode_state, j, i965_h264_context);
assert(decode_state->slice_params[j]->num_elements == 1); /* FIXME */
for (i = 0; i < decode_state->slice_params[j]->num_elements; i++) {
......
i965_drv_video/i965_avc_hw_scoreboard.c
View file @ 3452cb67
......@@ -66,8 +66,9 @@ static unsigned int avc_hw_scoreboard_constants[] = {
};
static void
i965_avc_hw_scoreboard_surface_state(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
i965_avc_hw_scoreboard_surface_state(struct i965_h264_context *i965_h264_context)
{
struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context;
struct i965_surface_state *ss;
dri_bo *bo;
......@@ -90,8 +91,9 @@ i965_avc_hw_scoreboard_surface_state(struct i965_avc_hw_scoreboard_context *avc_
}
static void
i965_avc_hw_scoreboard_interface_descriptor_table(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
i965_avc_hw_scoreboard_interface_descriptor_table(struct i965_h264_context *i965_h264_context)
{
struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context;
struct i965_interface_descriptor *desc;
dri_bo *bo;
......@@ -125,8 +127,9 @@ i965_avc_hw_scoreboard_interface_descriptor_table(struct i965_avc_hw_scoreboard_
}
static void
i965_avc_hw_scoreboard_binding_table(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
i965_avc_hw_scoreboard_binding_table(struct i965_h264_context *i965_h264_context)
{
struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context;
unsigned int *binding_table;
dri_bo *bo = avc_hw_scoreboard_context->binding_table.bo;
......@@ -144,8 +147,9 @@ i965_avc_hw_scoreboard_binding_table(struct i965_avc_hw_scoreboard_context *avc_
}
static void
i965_avc_hw_scoreboard_vfe_state(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
i965_avc_hw_scoreboard_vfe_state(struct i965_h264_context *i965_h264_context)
{
struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context;
struct i965_vfe_state *vfe_state;
dri_bo *bo;
......@@ -170,8 +174,9 @@ i965_avc_hw_scoreboard_vfe_state(struct i965_avc_hw_scoreboard_context *avc_hw_s
}
static void
i965_avc_hw_scoreboard_upload_constants(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
i965_avc_hw_scoreboard_upload_constants(struct i965_h264_context *i965_h264_context)
{
struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context;
unsigned char *constant_buffer;
if (avc_hw_scoreboard_context->curbe.upload)
......@@ -186,20 +191,19 @@ i965_avc_hw_scoreboard_upload_constants(struct i965_avc_hw_scoreboard_context *a
}
static void
i965_avc_hw_scoreboard_states_setup(struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
i965_avc_hw_scoreboard_states_setup(struct i965_h264_context *i965_h264_context)
{
i965_avc_hw_scoreboard_surface_state(avc_hw_scoreboard_context);
i965_avc_hw_scoreboard_binding_table(avc_hw_scoreboard_context);
i965_avc_hw_scoreboard_interface_descriptor_table(avc_hw_scoreboard_context);
i965_avc_hw_scoreboard_vfe_state(avc_hw_scoreboard_context);
i965_avc_hw_scoreboard_upload_constants(avc_hw_scoreboard_context);
i965_avc_hw_scoreboard_surface_state(i965_h264_context);
i965_avc_hw_scoreboard_binding_table(i965_h264_context);
i965_avc_hw_scoreboard_interface_descriptor_table(i965_h264_context);
i965_avc_hw_scoreboard_vfe_state(i965_h264_context);
i965_avc_hw_scoreboard_upload_constants(i965_h264_context);
}
static void
i965_avc_hw_scoreboard_pipeline_select(VADriverContextP ctx)
i965_avc_hw_scoreboard_pipeline_select(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = i965_h264_context->batch;
BEGIN_BATCH(batch, 1);
OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
......@@ -207,11 +211,11 @@ i965_avc_hw_scoreboard_pipeline_select(VADriverContextP ctx)
}
static void
i965_avc_hw_scoreboard_urb_layout(VADriverContextP ctx, struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
i965_avc_hw_scoreboard_urb_layout(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965_h264_context->batch;
unsigned int vfe_fence, cs_fence;
vfe_fence = avc_hw_scoreboard_context->urb.cs_start;
......@@ -227,10 +231,9 @@ i965_avc_hw_scoreboard_urb_layout(VADriverContextP ctx, struct i965_avc_hw_score
}
static void
i965_avc_hw_scoreboard_state_base_address(VADriverContextP ctx)
i965_avc_hw_scoreboard_state_base_address(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = i965_h264_context->batch;
BEGIN_BATCH(batch, 8);
OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 6);
......@@ -245,10 +248,10 @@ i965_avc_hw_scoreboard_state_base_address(VADriverContextP ctx)
}
static void
i965_avc_hw_scoreboard_state_pointers(VADriverContextP ctx, struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
i965_avc_hw_scoreboard_state_pointers(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context;
struct intel_batchbuffer *batch = i965_h264_context->batch;
BEGIN_BATCH(batch, 3);
OUT_BATCH(batch, CMD_MEDIA_STATE_POINTERS | 1);
......@@ -258,10 +261,10 @@ i965_avc_hw_scoreboard_state_pointers(VADriverContextP ctx, struct i965_avc_hw_s
}
static void
i965_avc_hw_scoreboard_cs_urb_layout(VADriverContextP ctx, struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
i965_avc_hw_scoreboard_cs_urb_layout(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context;
struct intel_batchbuffer *batch = i965_h264_context->batch;
BEGIN_BATCH(batch, 2);
OUT_BATCH(batch, CMD_CS_URB_STATE | 0);
......@@ -272,10 +275,10 @@ i965_avc_hw_scoreboard_cs_urb_layout(VADriverContextP ctx, struct i965_avc_hw_sc
}
static void
i965_avc_hw_scoreboard_constant_buffer(VADriverContextP ctx, struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
i965_avc_hw_scoreboard_constant_buffer(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context;
struct intel_batchbuffer *batch = i965_h264_context->batch;
BEGIN_BATCH(batch, 2);
OUT_BATCH(batch, CMD_CONSTANT_BUFFER | (1 << 8) | (2 - 2));
......@@ -286,11 +289,10 @@ i965_avc_hw_scoreboard_constant_buffer(VADriverContextP ctx, struct i965_avc_hw_
}
static void
i965_avc_hw_scoreboard_objects(VADriverContextP ctx, struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
i965_avc_hw_scoreboard_objects(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context = &i965_h264_context->avc_hw_scoreboard_context;
struct intel_batchbuffer *batch = i965_h264_context->batch;
int number_mb_cmds = 512;
int starting_mb_number = avc_hw_scoreboard_context->inline_data.starting_mb_number;
int i;
......@@ -325,20 +327,19 @@ i965_avc_hw_scoreboard_objects(VADriverContextP ctx, struct i965_avc_hw_scoreboa
}
static void
i965_avc_hw_scoreboard_pipeline_setup(VADriverContextP ctx, struct i965_avc_hw_scoreboard_context *avc_hw_scoreboard_context)
i965_avc_hw_scoreboard_pipeline_setup(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = i965_h264_context->batch;
intel_batchbuffer_start_atomic(batch, 0x1000);
intel_batchbuffer_emit_mi_flush(batch);
i965_avc_hw_scoreboard_pipeline_select(ctx);
i965_avc_hw_scoreboard_state_base_address(ctx);
i965_avc_hw_scoreboard_state_pointers(ctx, avc_hw_scoreboard_context);
i965_avc_hw_scoreboard_urb_layout(ctx, avc_hw_scoreboard_context);
i965_avc_hw_scoreboard_cs_urb_layout(ctx, avc_hw_scoreboard_context);
i965_avc_hw_scoreboard_constant_buffer(ctx, avc_hw_scoreboard_context);
i965_avc_hw_scoreboard_objects(ctx, avc_hw_scoreboard_context);
i965_avc_hw_scoreboard_pipeline_select(ctx, i965_h264_context);
i965_avc_hw_scoreboard_state_base_address(ctx, i965_h264_context);
i965_avc_hw_scoreboard_state_pointers(ctx, i965_h264_context);
i965_avc_hw_scoreboard_urb_layout(ctx, i965_h264_context);
i965_avc_hw_scoreboard_cs_urb_layout(ctx, i965_h264_context);
i965_avc_hw_scoreboard_constant_buffer(ctx, i965_h264_context);
i965_avc_hw_scoreboard_objects(ctx, i965_h264_context);
intel_batchbuffer_end_atomic(batch);
}
......@@ -365,8 +366,8 @@ i965_avc_hw_scoreboard(VADriverContextP ctx, struct decode_state *decode_state,
else
avc_hw_scoreboard_context->hw_kernel.offset = avc_hw_scoreboard_kernel_offset[AVC_HW_SCOREBOARD];
i965_avc_hw_scoreboard_states_setup(avc_hw_scoreboard_context);
i965_avc_hw_scoreboard_pipeline_setup(ctx, avc_hw_scoreboard_context);
i965_avc_hw_scoreboard_states_setup(i965_h264_context);
i965_avc_hw_scoreboard_pipeline_setup(ctx, i965_h264_context);
}
}
......
i965_drv_video/i965_avc_ildb.c
View file @ 3452cb67
......@@ -396,10 +396,9 @@ i965_avc_ildb_states_setup(VADriverContextP ctx,
}
static void
i965_avc_ildb_pipeline_select(VADriverContextP ctx)
i965_avc_ildb_pipeline_select(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = i965_h264_context->batch;
BEGIN_BATCH(batch, 1);
OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
......@@ -409,11 +408,9 @@ i965_avc_ildb_pipeline_select(VADriverContextP ctx)
static void
i965_avc_ildb_urb_layout(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context;
struct intel_batchbuffer *batch = i965_h264_context->batch;
unsigned int vfe_fence, cs_fence;
vfe_fence = avc_ildb_context->urb.cs_start;
......@@ -429,11 +426,10 @@ i965_avc_ildb_urb_layout(VADriverContextP ctx, struct i965_h264_context *i965_h2
}
static void
i965_avc_ildb_state_base_address(VADriverContextP ctx)
i965_avc_ildb_state_base_address(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965_h264_context->batch;
if (IS_IRONLAKE(i965->intel.device_id)) {
BEGIN_BATCH(batch, 8);
......@@ -461,9 +457,8 @@ i965_avc_ildb_state_base_address(VADriverContextP ctx)
static void
i965_avc_ildb_state_pointers(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context;
struct intel_batchbuffer *batch = i965_h264_context->batch;
BEGIN_BATCH(batch, 3);
OUT_BATCH(batch, CMD_MEDIA_STATE_POINTERS | 1);
......@@ -475,9 +470,8 @@ i965_avc_ildb_state_pointers(VADriverContextP ctx, struct i965_h264_context *i96
static void
i965_avc_ildb_cs_urb_layout(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context;
struct intel_batchbuffer *batch = i965_h264_context->batch;
BEGIN_BATCH(batch, 2);
OUT_BATCH(batch, CMD_CS_URB_STATE | 0);
......@@ -490,9 +484,8 @@ i965_avc_ildb_cs_urb_layout(VADriverContextP ctx, struct i965_h264_context *i965
static void
i965_avc_ildb_constant_buffer(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context;
struct intel_batchbuffer *batch = i965_h264_context->batch;
BEGIN_BATCH(batch, 2);
OUT_BATCH(batch, CMD_CONSTANT_BUFFER | (1 << 8) | (2 - 2));
......@@ -505,9 +498,8 @@ i965_avc_ildb_constant_buffer(VADriverContextP ctx, struct i965_h264_context *i9
static void
i965_avc_ildb_objects(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_avc_ildb_context *avc_ildb_context = &i965_h264_context->avc_ildb_context;
struct intel_batchbuffer *batch = i965_h264_context->batch;
BEGIN_BATCH(batch, 6);
OUT_BATCH(batch, CMD_MEDIA_OBJECT | 4);
......@@ -541,12 +533,11 @@ i965_avc_ildb_objects(VADriverContextP ctx, struct i965_h264_context *i965_h264_
static void
i965_avc_ildb_pipeline_setup(VADriverContextP ctx, struct i965_h264_context *i965_h264_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = i965_h264_context->batch;
intel_batchbuffer_emit_mi_flush(batch);
i965_avc_ildb_pipeline_select(ctx);
i965_avc_ildb_state_base_address(ctx);
i965_avc_ildb_pipeline_select(ctx, i965_h264_context);
i965_avc_ildb_state_base_address(ctx, i965_h264_context);
i965_avc_ildb_state_pointers(ctx, i965_h264_context);
i965_avc_ildb_urb_layout(ctx, i965_h264_context);
i965_avc_ildb_cs_urb_layout(ctx, i965_h264_context);
......
i965_drv_video/i965_drv_video.c
View file @ 3452cb67
......@@ -1550,16 +1550,11 @@ i965_QuerySurfaceStatus(VADriverContextP ctx,
VASurfaceID render_target,
VASurfaceStatus *status) /* out */
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct object_surface *obj_surface = SURFACE(render_target);
assert(obj_surface);
/* Commit pending operations to the HW */
intel_batchbuffer_flush(batch);
/* Usually GEM will handle synchronization with the graphics hardware */
#if 0
if (obj_surface->bo) {
......@@ -1654,6 +1649,8 @@ i965_Init(VADriverContextP ctx)
if (i965_render_init(ctx) == False)
return VA_STATUS_ERROR_UNKNOWN;
i965->batch = intel_batchbuffer_new(&i965->intel, I915_EXEC_RENDER);
return VA_STATUS_SUCCESS;
}
......@@ -2136,8 +2133,6 @@ i965_GetImage(VADriverContextP ctx,
unsigned int height,
VAImageID image)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct i965_render_state *render_state = &i965->render_state;
......@@ -2158,9 +2153,6 @@ i965_GetImage(VADriverContextP ctx,
y + height > obj_image->image.height)
return VA_STATUS_ERROR_INVALID_PARAMETER;
/* Commit pending operations to the HW */
intel_batchbuffer_flush(batch);
VAStatus va_status;
void *image_data = NULL;
......@@ -2311,6 +2303,9 @@ i965_Terminate(VADriverContextP ctx)
{
struct i965_driver_data *i965 = i965_driver_data(ctx);
if (i965->batch)
intel_batchbuffer_free(i965->batch);
if (i965_render_terminate(ctx) == False)
return VA_STATUS_ERROR_UNKNOWN;
......
i965_drv_video/i965_drv_video.h
View file @ 3452cb67
......@@ -116,6 +116,7 @@ struct hw_context
union codec_state *codec_state,
struct hw_context *hw_context);
void (*destroy)(void *);
struct intel_batchbuffer *batch;
};
struct object_context
......@@ -214,8 +215,10 @@ struct i965_driver_data
struct object_heap buffer_heap;
struct object_heap image_heap;
struct object_heap subpic_heap;
struct i965_render_state render_state;
struct hw_codec_info *codec_info;
struct intel_batchbuffer *batch;
struct i965_render_state render_state;
void *pp_context;
};
......
i965_drv_video/i965_encoder.c
View file @ 3452cb67
......@@ -62,16 +62,20 @@ gen6_encoder_context_destroy(void *hw_context)
gen6_mfc_context_destroy(&gen6_encoder_context->mfc_context);
gen6_vme_context_destroy(&gen6_encoder_context->vme_context);
intel_batchbuffer_free(gen6_encoder_context->base.batch);
free(gen6_encoder_context);
}
struct hw_context *
gen6_enc_hw_context_init(VADriverContextP ctx, VAProfile profile)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct gen6_encoder_context *gen6_encoder_context = calloc(1, sizeof(struct gen6_encoder_context));
gen6_encoder_context->base.destroy = gen6_encoder_context_destroy;
gen6_encoder_context->base.run = gen6_encoder_end_picture;
gen6_encoder_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER);
gen6_vme_context_init(ctx, &gen6_encoder_context->vme_context);
gen6_mfc_context_init(ctx, &gen6_encoder_context->mfc_context);
......
i965_drv_video/i965_media.c
View file @ 3452cb67
......@@ -44,10 +44,9 @@
#include "i965_media_h264.h"
static void
i965_media_pipeline_select(VADriverContextP ctx)
i965_media_pipeline_select(VADriverContextP ctx, struct i965_media_context *media_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = media_context->base.batch;
BEGIN_BATCH(batch, 1);
OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
......@@ -57,10 +56,8 @@ i965_media_pipeline_select(VADriverContextP ctx)
static void
i965_media_urb_layout(VADriverContextP ctx, struct i965_media_context *media_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = media_context->base.batch;
unsigned int vfe_fence, cs_fence;
vfe_fence = media_context->urb.cs_start;
......@@ -78,9 +75,8 @@ i965_media_urb_layout(VADriverContextP ctx, struct i965_media_context *media_con
static void
i965_media_state_base_address(VADriverContextP ctx, struct i965_media_context *media_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = media_context->base.batch;
if (IS_IRONLAKE(i965->intel.device_id)) {
BEGIN_BATCH(batch, 8);
......@@ -122,8 +118,7 @@ i965_media_state_base_address(VADriverContextP ctx, struct i965_media_context *m
static void
i965_media_state_pointers(VADriverContextP ctx, struct i965_media_context *media_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = media_context->base.batch;
BEGIN_BATCH(batch, 3);
OUT_BATCH(batch, CMD_MEDIA_STATE_POINTERS | 1);
......@@ -140,8 +135,7 @@ i965_media_state_pointers(VADriverContextP ctx, struct i965_media_context *media
static void
i965_media_cs_urb_layout(VADriverContextP ctx, struct i965_media_context *media_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = media_context->base.batch;
BEGIN_BATCH(batch, 2);
OUT_BATCH(batch, CMD_CS_URB_STATE | 0);
......@@ -162,8 +156,7 @@ i965_media_pipeline_state(VADriverContextP ctx, struct i965_media_context *media
static void
i965_media_constant_buffer(VADriverContextP ctx, struct decode_state *decode_state, struct i965_media_context *media_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = media_context->base.batch;
BEGIN_BATCH(batch, 2);
OUT_BATCH(batch, CMD_CONSTANT_BUFFER | (1 << 8) | (2 - 2));
......@@ -174,10 +167,9 @@ i965_media_constant_buffer(VADriverContextP ctx, struct decode_state *decode_sta
}
static void
i965_media_depth_buffer(VADriverContextP ctx)
i965_media_depth_buffer(VADriverContextP ctx, struct i965_media_context *media_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = media_context->base.batch;
BEGIN_BATCH(batch, 6);
OUT_BATCH(batch, CMD_DEPTH_BUFFER | 4);
......@@ -195,13 +187,12 @@ i965_media_pipeline_setup(VADriverContextP ctx,
struct decode_state *decode_state,
struct i965_media_context *media_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = media_context->base.batch;
intel_batchbuffer_start_atomic(batch, 0x1000);
intel_batchbuffer_emit_mi_flush(batch); /* step 1 */
i965_media_depth_buffer(ctx);
i965_media_pipeline_select(ctx); /* step 2 */
i965_media_depth_buffer(ctx, media_context);
i965_media_pipeline_select(ctx, media_context); /* step 2 */
i965_media_urb_layout(ctx, media_context); /* step 3 */
i965_media_pipeline_state(ctx, media_context); /* step 4 */
i965_media_constant_buffer(ctx, decode_state, media_context); /* step 5 */
......@@ -292,6 +283,7 @@ i965_media_decode_picture(VADriverContextP ctx,
assert(media_context->media_states_setup);
media_context->media_states_setup(ctx, decode_state, media_context);
i965_media_pipeline_setup(ctx, decode_state, media_context);
intel_batchbuffer_flush(hw_context->batch);
}
static void
......@@ -326,16 +318,19 @@ i965_media_context_destroy(void *hw_context)
dri_bo_unreference(media_context->indirect_object.bo);
media_context->indirect_object.bo = NULL;
intel_batchbuffer_free(media_context->base.batch);
free(media_context);
}
struct hw_context *
g4x_dec_hw_context_init(VADriverContextP ctx, VAProfile profile)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct i965_media_context *media_context = calloc(1, sizeof(struct i965_media_context));
media_context->base.destroy = i965_media_context_destroy;
media_context->base.run = i965_media_decode_picture;
media_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER);
switch (profile) {
case VAProfileMPEG2Simple:
......@@ -360,10 +355,12 @@ g4x_dec_hw_context_init(VADriverContextP ctx, VAProfile profile)
struct hw_context *
ironlake_dec_hw_context_init(VADriverContextP ctx, VAProfile profile)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct i965_media_context *media_context = calloc(1, sizeof(struct i965_media_context));
media_context->base.destroy = i965_media_context_destroy;
media_context->base.run = i965_media_decode_picture;
media_context->base.batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER);
switch (profile) {
case VAProfileMPEG2Simple:
......
i965_drv_video/i965_media_h264.c
View file @ 3452cb67
......@@ -710,8 +710,7 @@ i965_media_h264_objects(VADriverContextP ctx,
struct decode_state *decode_state,
struct i965_media_context *media_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct intel_batchbuffer *batch = media_context->base.batch;
struct i965_h264_context *i965_h264_context;
unsigned int *object_command;
......@@ -883,6 +882,8 @@ i965_media_h264_dec_context_init(VADriverContextP ctx, struct i965_media_context
i965_h264_context->fsid_list[i].frame_store_id = -1;
}
i965_h264_context->batch = media_context->base.batch;
media_context->private_context = i965_h264_context;
media_context->free_private_context = i965_media_h264_free_private_context;
......
i965_drv_video/i965_media_h264.h
View file @ 3452cb67
......@@ -66,6 +66,7 @@ struct i965_h264_context
} fsid_list[16];
struct i965_kernel avc_kernels[NUM_H264_AVC_KERNELS];
struct intel_batchbuffer *batch;
};
void i965_media_h264_decode_init(VADriverContextP ctx, struct decode_state *decode_state, struct i965_media_context *media_context);
......
i965_drv_video/i965_media_mpeg2.c
View file @ 3452cb67
......@@ -882,10 +882,9 @@ i965_media_mpeg2_objects(VADriverContextP ctx,
struct decode_state *decode_state,
struct i965_media_context *media_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
int i, j;
struct intel_batchbuffer *batch = media_context->base.batch;
VASliceParameterBufferMPEG2 *slice_param;
int i, j;
for (j = 0; j < decode_state->num_slice_params; j++) {
assert(decode_state->slice_params[j] && decode_state->slice_params[j]->buffer);
......
i965_drv_video/i965_post_processing.c
View file @ 3452cb67
......@@ -399,8 +399,8 @@ ironlake_pp_states_setup(VADriverContextP ctx)
static void
ironlake_pp_pipeline_select(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 1);
OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
......@@ -410,8 +410,8 @@ ironlake_pp_pipeline_select(VADriverContextP ctx)
static void
ironlake_pp_urb_layout(VADriverContextP ctx, struct i965_post_processing_context *pp_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
unsigned int vfe_fence, cs_fence;
vfe_fence = pp_context->urb.cs_start;
......@@ -429,8 +429,8 @@ ironlake_pp_urb_layout(VADriverContextP ctx, struct i965_post_processing_context
static void
ironlake_pp_state_base_address(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 8);
OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | 6);
......@@ -447,8 +447,8 @@ ironlake_pp_state_base_address(VADriverContextP ctx)
static void
ironlake_pp_state_pointers(VADriverContextP ctx, struct i965_post_processing_context *pp_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 3);
OUT_BATCH(batch, CMD_MEDIA_STATE_POINTERS | 1);
......@@ -460,8 +460,8 @@ ironlake_pp_state_pointers(VADriverContextP ctx, struct i965_post_processing_con
static void
ironlake_pp_cs_urb_layout(VADriverContextP ctx, struct i965_post_processing_context *pp_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 2);
OUT_BATCH(batch, CMD_CS_URB_STATE | 0);
......@@ -474,8 +474,8 @@ ironlake_pp_cs_urb_layout(VADriverContextP ctx, struct i965_post_processing_cont
static void
ironlake_pp_constant_buffer(VADriverContextP ctx, struct i965_post_processing_context *pp_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 2);
OUT_BATCH(batch, CMD_CONSTANT_BUFFER | (1 << 8) | (2 - 2));
......@@ -488,8 +488,8 @@ ironlake_pp_constant_buffer(VADriverContextP ctx, struct i965_post_processing_co
static void
ironlake_pp_object_walker(VADriverContextP ctx, struct i965_post_processing_context *pp_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
int x, x_steps, y, y_steps;
x_steps = pp_context->pp_x_steps(&pp_context->private_context);
......@@ -517,9 +517,8 @@ ironlake_pp_object_walker(VADriverContextP ctx, struct i965_post_processing_cont
static void
ironlake_pp_pipeline_setup(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_post_processing_context *pp_context = i965->pp_context;
intel_batchbuffer_start_atomic(batch, 0x1000);
......@@ -2068,8 +2067,8 @@ gen6_pp_states_setup(VADriverContextP ctx)
static void
gen6_pp_pipeline_select(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 1);
OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
......@@ -2079,8 +2078,8 @@ gen6_pp_pipeline_select(VADriverContextP ctx)
static void
gen6_pp_state_base_address(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 10);
OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (10 - 2));
......@@ -2099,8 +2098,8 @@ gen6_pp_state_base_address(VADriverContextP ctx)
static void
gen6_pp_vfe_state(VADriverContextP ctx, struct i965_post_processing_context *pp_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 8);
OUT_BATCH(batch, CMD_MEDIA_VFE_STATE | (8 - 2));
......@@ -2121,8 +2120,8 @@ gen6_pp_vfe_state(VADriverContextP ctx, struct i965_post_processing_context *pp_
static void
gen6_pp_curbe_load(VADriverContextP ctx, struct i965_post_processing_context *pp_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
assert(pp_context->urb.size_cs_entry * pp_context->urb.num_cs_entries * 512 <= pp_context->curbe.bo->size);
......@@ -2141,8 +2140,8 @@ gen6_pp_curbe_load(VADriverContextP ctx, struct i965_post_processing_context *pp
static void
gen6_interface_descriptor_load(VADriverContextP ctx, struct i965_post_processing_context *pp_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 4);
OUT_BATCH(batch, CMD_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2));
......@@ -2159,8 +2158,8 @@ gen6_interface_descriptor_load(VADriverContextP ctx, struct i965_post_processing
static void
gen6_pp_object_walker(VADriverContextP ctx, struct i965_post_processing_context *pp_context)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
int x, x_steps, y, y_steps;
x_steps = pp_context->pp_x_steps(&pp_context->private_context);
......@@ -2190,9 +2189,8 @@ gen6_pp_object_walker(VADriverContextP ctx, struct i965_post_processing_context
static void
gen6_pp_pipeline_setup(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_post_processing_context *pp_context = i965->pp_context;
intel_batchbuffer_start_atomic(batch, 0x1000);
......
i965_drv_video/i965_render.c
View file @ 3452cb67
......@@ -968,8 +968,8 @@ i965_subpic_render_state_setup(VADriverContextP ctx,
static void
i965_render_pipeline_select(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 1);
OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_3D);
......@@ -979,8 +979,8 @@ i965_render_pipeline_select(VADriverContextP ctx)
static void
i965_render_state_sip(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 2);
OUT_BATCH(batch, CMD_STATE_SIP | 0);
......@@ -991,9 +991,8 @@ i965_render_state_sip(VADriverContextP ctx)
static void
i965_render_state_base_address(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_render_state *render_state = &i965->render_state;
if (IS_IRONLAKE(i965->intel.device_id)) {
......@@ -1022,8 +1021,8 @@ i965_render_state_base_address(VADriverContextP ctx)
static void
i965_render_binding_table_pointers(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 6);
OUT_BATCH(batch, CMD_BINDING_TABLE_POINTERS | 4);
......@@ -1038,8 +1037,8 @@ i965_render_binding_table_pointers(VADriverContextP ctx)
static void
i965_render_constant_color(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 5);
OUT_BATCH(batch, CMD_CONSTANT_COLOR | 3);
......@@ -1053,9 +1052,8 @@ i965_render_constant_color(VADriverContextP ctx)
static void
i965_render_pipelined_pointers(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_render_state *render_state = &i965->render_state;
BEGIN_BATCH(batch, 7);
......@@ -1072,8 +1070,8 @@ i965_render_pipelined_pointers(VADriverContextP ctx)
static void
i965_render_urb_layout(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
int urb_vs_start, urb_vs_size;
int urb_gs_start, urb_gs_size;
int urb_clip_start, urb_clip_size;
......@@ -1113,8 +1111,8 @@ i965_render_urb_layout(VADriverContextP ctx)
static void
i965_render_cs_urb_layout(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
BEGIN_BATCH(batch, 2);
OUT_BATCH(batch, CMD_CS_URB_STATE | 0);
......@@ -1127,9 +1125,8 @@ i965_render_cs_urb_layout(VADriverContextP ctx)
static void
i965_render_constant_buffer(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_render_state *render_state = &i965->render_state;
BEGIN_BATCH(batch, 2);
......@@ -1143,9 +1140,8 @@ i965_render_constant_buffer(VADriverContextP ctx)
static void
i965_render_drawing_rectangle(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_render_state *render_state = &i965->render_state;
struct intel_region *dest_region = render_state->draw_region;
......@@ -1160,9 +1156,8 @@ i965_render_drawing_rectangle(VADriverContextP ctx)
static void
i965_render_vertex_elements(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
if (IS_IRONLAKE(i965->intel.device_id)) {
BEGIN_BATCH(batch, 5);
......@@ -1220,9 +1215,8 @@ i965_render_upload_image_palette(
unsigned int alpha
)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
unsigned int i;
struct object_image *obj_image = IMAGE(image_id);
......@@ -1243,9 +1237,8 @@ i965_render_upload_image_palette(
static void
i965_render_startup(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_render_state *render_state = &i965->render_state;
BEGIN_BATCH(batch, 11);
......@@ -1280,9 +1273,8 @@ i965_render_startup(VADriverContextP ctx)
static void
i965_clear_dest_region(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_render_state *render_state = &i965->render_state;
struct intel_region *dest_region = render_state->draw_region;
unsigned int blt_cmd, br13;
......@@ -1331,8 +1323,8 @@ i965_clear_dest_region(VADriverContextP ctx)
static void
i965_surface_render_pipeline_setup(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
i965_clear_dest_region(ctx);
intel_batchbuffer_start_atomic(batch, 0x1000);
......@@ -1355,8 +1347,8 @@ i965_surface_render_pipeline_setup(VADriverContextP ctx)
static void
i965_subpic_render_pipeline_setup(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
intel_batchbuffer_start_atomic(batch, 0x1000);
intel_batchbuffer_emit_mi_flush(batch);
......@@ -1468,8 +1460,8 @@ i965_render_put_surface(VADriverContextP ctx,
unsigned short desth,
unsigned int flag)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
i965_render_initialize(ctx);
i965_surface_render_state_setup(ctx, surface,
......@@ -1491,9 +1483,8 @@ i965_render_put_subpicture(VADriverContextP ctx,
unsigned short destw,
unsigned short desth)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct object_surface *obj_surface = SURFACE(surface);
struct object_subpic *obj_subpic = SUBPIC(obj_surface->subpic);
......@@ -1658,8 +1649,8 @@ gen6_render_setup_states(VADriverContextP ctx,
static void
gen6_emit_invarient_states(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
OUT_BATCH(batch, CMD_PIPELINE_SELECT | PIPELINE_SELECT_3D);
......@@ -1679,9 +1670,8 @@ gen6_emit_invarient_states(VADriverContextP ctx)
static void
gen6_emit_state_base_address(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_render_state *render_state = &i965->render_state;
OUT_BATCH(batch, CMD_STATE_BASE_ADDRESS | (10 - 2));
......@@ -1699,9 +1689,8 @@ gen6_emit_state_base_address(VADriverContextP ctx)
static void
gen6_emit_viewport_state_pointers(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_render_state *render_state = &i965->render_state;
OUT_BATCH(batch, GEN6_3DSTATE_VIEWPORT_STATE_POINTERS |
......@@ -1715,8 +1704,8 @@ gen6_emit_viewport_state_pointers(VADriverContextP ctx)
static void
gen6_emit_urb(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
OUT_BATCH(batch, GEN6_3DSTATE_URB | (3 - 2));
OUT_BATCH(batch, ((1 - 1) << GEN6_3DSTATE_URB_VS_SIZE_SHIFT) |
......@@ -1728,9 +1717,8 @@ gen6_emit_urb(VADriverContextP ctx)
static void
gen6_emit_cc_state_pointers(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_render_state *render_state = &i965->render_state;
OUT_BATCH(batch, GEN6_3DSTATE_CC_STATE_POINTERS | (4 - 2));
......@@ -1742,9 +1730,8 @@ gen6_emit_cc_state_pointers(VADriverContextP ctx)
static void
gen6_emit_sampler_state_pointers(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_render_state *render_state = &i965->render_state;
OUT_BATCH(batch, GEN6_3DSTATE_SAMPLER_STATE_POINTERS |
......@@ -1758,8 +1745,8 @@ gen6_emit_sampler_state_pointers(VADriverContextP ctx)
static void
gen6_emit_binding_table(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
/* Binding table pointers */
OUT_BATCH(batch, CMD_BINDING_TABLE_POINTERS |
......@@ -1774,8 +1761,8 @@ gen6_emit_binding_table(VADriverContextP ctx)
static void
gen6_emit_depth_buffer_state(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
OUT_BATCH(batch, CMD_DEPTH_BUFFER | (7 - 2));
OUT_BATCH(batch, (I965_SURFACE_NULL << CMD_DEPTH_BUFFER_TYPE_SHIFT) |
......@@ -1799,8 +1786,8 @@ gen6_emit_drawing_rectangle(VADriverContextP ctx)
static void
gen6_emit_vs_state(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
/* disable VS constant buffer */
OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_VS | (5 - 2));
......@@ -1820,8 +1807,8 @@ gen6_emit_vs_state(VADriverContextP ctx)
static void
gen6_emit_gs_state(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
/* disable GS constant buffer */
OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_GS | (5 - 2));
......@@ -1842,8 +1829,8 @@ gen6_emit_gs_state(VADriverContextP ctx)
static void
gen6_emit_clip_state(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
OUT_BATCH(batch, GEN6_3DSTATE_CLIP | (4 - 2));
OUT_BATCH(batch, 0);
......@@ -1854,8 +1841,8 @@ gen6_emit_clip_state(VADriverContextP ctx)
static void
gen6_emit_sf_state(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
OUT_BATCH(batch, GEN6_3DSTATE_SF | (20 - 2));
OUT_BATCH(batch, (1 << GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT) |
......@@ -1884,9 +1871,8 @@ gen6_emit_sf_state(VADriverContextP ctx)
static void
gen6_emit_wm_state(VADriverContextP ctx, int kernel)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_render_state *render_state = &i965->render_state;
OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_PS |
......@@ -1920,8 +1906,8 @@ gen6_emit_wm_state(VADriverContextP ctx, int kernel)
static void
gen6_emit_vertex_element_state(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
/* Set up our vertex elements, sourced from the single vertex buffer. */
OUT_BATCH(batch, CMD_VERTEX_ELEMENTS | (5 - 2));
......@@ -1948,9 +1934,8 @@ gen6_emit_vertex_element_state(VADriverContextP ctx)
static void
gen6_emit_vertices(VADriverContextP ctx)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct i965_render_state *render_state = &i965->render_state;
BEGIN_BATCH(batch, 11);
......@@ -1980,8 +1965,8 @@ gen6_emit_vertices(VADriverContextP ctx)
static void
gen6_render_emit_states(VADriverContextP ctx, int kernel)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
intel_batchbuffer_start_atomic(batch, 0x1000);
intel_batchbuffer_emit_mi_flush(batch);
......@@ -2017,8 +2002,8 @@ gen6_render_put_surface(VADriverContextP ctx,
unsigned short desth,
unsigned int flag)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
gen6_render_initialize(ctx);
gen6_render_setup_states(ctx, surface,
......@@ -2092,9 +2077,8 @@ gen6_render_put_subpicture(VADriverContextP ctx,
unsigned short destw,
unsigned short desth)
{
struct intel_driver_data *intel = intel_driver_data(ctx);
struct intel_batchbuffer *batch = intel->batch;
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct intel_batchbuffer *batch = i965->batch;
struct object_surface *obj_surface = SURFACE(surface);
struct object_subpic *obj_subpic = SUBPIC(obj_surface->subpic);
......
i965_drv_video/intel_driver.c
View file @ 3452cb67
......@@ -81,7 +81,6 @@ intel_driver_init(VADriverContextP ctx)
intel->has_blt = has_blt;
intel_memman_init(intel);
intel->batch = intel_batchbuffer_new(intel, I915_EXEC_RENDER);
return True;
}
......@@ -91,7 +90,6 @@ intel_driver_terminate(VADriverContextP ctx)
struct intel_driver_data *intel = intel_driver_data(ctx);
intel_memman_terminate(intel);
intel_batchbuffer_free(intel->batch);
pthread_mutex_destroy(&intel->ctxmutex);
return True;
......
i965_drv_video/intel_driver.h
View file @ 3452cb67
......@@ -105,7 +105,6 @@ struct intel_driver_data
pthread_mutex_t ctxmutex;
int locked;
struct intel_batchbuffer *batch;
dri_bufmgr *bufmgr;
unsigned int has_exec2 : 1; /* Flag: has execbuffer2? */
......
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