Commit 64e3d8c4 authored by michael's avatar michael

one bugfix and a few gcc4 bug workaorunds by (Gianluigi Tiesi: mplayer, netfarm it)


git-svn-id: file:///var/local/repositories/mplayer/trunk/postproc@15618 b3059339-0415-0410-9bf9-f77b7e298cf2
parent b95efc1f
...@@ -2129,6 +2129,7 @@ static inline void RENAME(hScale)(int16_t *dst, int dstW, uint8_t *src, int srcW ...@@ -2129,6 +2129,7 @@ static inline void RENAME(hScale)(int16_t *dst, int dstW, uint8_t *src, int srcW
} }
else else
{ {
uint8_t *offset = src+filterSize;
long counter= -2*dstW; long counter= -2*dstW;
// filter-= counter*filterSize/2; // filter-= counter*filterSize/2;
filterPos-= counter/2; filterPos-= counter/2;
...@@ -2171,7 +2172,7 @@ static inline void RENAME(hScale)(int16_t *dst, int dstW, uint8_t *src, int srcW ...@@ -2171,7 +2172,7 @@ static inline void RENAME(hScale)(int16_t *dst, int dstW, uint8_t *src, int srcW
" jnc 1b \n\t" " jnc 1b \n\t"
: "+r" (counter), "+r" (filter) : "+r" (counter), "+r" (filter)
: "m" (filterPos), "m" (dst), "m"(src+filterSize), : "m" (filterPos), "m" (dst), "m"(offset),
"m" (src), "r" ((long)filterSize*2) "m" (src), "r" ((long)filterSize*2)
: "%"REG_b, "%"REG_a, "%"REG_c : "%"REG_b, "%"REG_a, "%"REG_c
); );
...@@ -2313,6 +2314,8 @@ FUNNY_Y_CODE ...@@ -2313,6 +2314,8 @@ FUNNY_Y_CODE
else else
{ {
#endif #endif
int xInc_shr16 = xInc >> 16;
int xInc_mask = xInc & 0xffff;
//NO MMX just normal asm ... //NO MMX just normal asm ...
asm volatile( asm volatile(
"xor %%"REG_a", %%"REG_a" \n\t" // i "xor %%"REG_a", %%"REG_a" \n\t" // i
...@@ -2350,7 +2353,7 @@ FUNNY_Y_CODE ...@@ -2350,7 +2353,7 @@ FUNNY_Y_CODE
" jb 1b \n\t" " jb 1b \n\t"
:: "r" (src), "m" (dst), "m" (dstWidth), "m" (xInc>>16), "m" (xInc&0xFFFF) :: "r" (src), "m" (dst), "m" (dstWidth), "m" (xInc_shr16), "m" (xInc_mask)
: "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi" : "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi"
); );
#ifdef HAVE_MMX2 #ifdef HAVE_MMX2
...@@ -2509,6 +2512,8 @@ FUNNY_UV_CODE ...@@ -2509,6 +2512,8 @@ FUNNY_UV_CODE
else else
{ {
#endif #endif
long xInc_shr16 = (long) (xInc >> 16);
int xInc_mask = xInc & 0xffff;
asm volatile( asm volatile(
"xor %%"REG_a", %%"REG_a" \n\t" // i "xor %%"REG_a", %%"REG_a" \n\t" // i
"xor %%"REG_b", %%"REG_b" \n\t" // xx "xor %%"REG_b", %%"REG_b" \n\t" // xx
...@@ -2542,7 +2547,7 @@ FUNNY_UV_CODE ...@@ -2542,7 +2547,7 @@ FUNNY_UV_CODE
"cmp %2, %%"REG_a" \n\t" "cmp %2, %%"REG_a" \n\t"
" jb 1b \n\t" " jb 1b \n\t"
:: "m" (src1), "m" (dst), "m" ((long)dstWidth), "m" ((long)(xInc>>16)), "m" ((xInc&0xFFFF)), :: "m" (src1), "m" (dst), "m" ((long)dstWidth), "m" (xInc_shr16), "m" (xInc_mask),
"r" (src2) "r" (src2)
: "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi" : "%"REG_a, "%"REG_b, "%ecx", "%"REG_D, "%esi"
); );
......
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