Commit f8e5e1a4 authored by Syed Mohammed, Khasim's avatar Syed Mohammed, Khasim Committed by Tony Lindgren

ARM: OMAP: Clock updates for OMAP3430

Signed-off-by: default avatarSyed Mohammed Khasim  <x0khasim@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent f3848cb1
...@@ -58,11 +58,15 @@ static u8 cpu_mask; ...@@ -58,11 +58,15 @@ static u8 cpu_mask;
/* Recalculate SYST_CLK */ /* Recalculate SYST_CLK */
static void omap2_sys_clk_recalc(struct clk * clk) static void omap2_sys_clk_recalc(struct clk * clk)
{ {
u32 div = prm_read_reg(OMAP24XX_PRCM_CLKSRC_CTRL); u32 div;
if (!cpu_is_omap34xx()) {
div = prm_read_reg(OMAP24XX_PRCM_CLKSRC_CTRL);
/* Test if ext clk divided by 1 or 2 */ /* Test if ext clk divided by 1 or 2 */
div &= (0x3 << OMAP_SYSCLKDIV_SHIFT); div &= (0x3 << OMAP_SYSCLKDIV_SHIFT);
div >>= clk->rate_offset; div >>= clk->rate_offset;
clk->rate = (clk->parent->rate / div); clk->rate = (clk->parent->rate / div);
}
propagate_rate(clk); propagate_rate(clk);
} }
...@@ -1181,7 +1185,7 @@ int __init omap2_clk_init(void) ...@@ -1181,7 +1185,7 @@ int __init omap2_clk_init(void)
continue; continue;
} }
if ((*clkp)->flags & CLOCK_IN_OMAP243X && cpu_is_omap2430()) { if ((*clkp)->flags & CLOCK_IN_OMAP243X && (cpu_is_omap2430() || cpu_is_omap34xx())) {
clk_register(*clkp); clk_register(*clkp);
continue; continue;
} }
......
...@@ -39,6 +39,7 @@ static u32 omap2_clksel_get_divisor(struct clk *clk); ...@@ -39,6 +39,7 @@ static u32 omap2_clksel_get_divisor(struct clk *clk);
#define RATE_IN_242X (1 << 0) #define RATE_IN_242X (1 << 0)
#define RATE_IN_243X (1 << 1) #define RATE_IN_243X (1 << 1)
#define RATE_IN_343X (1 << 2)
/* Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated. /* Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated.
* xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,CM_CLKSEL_DSP * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,CM_CLKSEL_DSP
......
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