Commit e88be4f3 authored by David Singleton's avatar David Singleton Committed by Tony Lindgren

ARM: OMAP: Mux update

Sync with linux-omap tree. Improves the locking for pin multiplexing.
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 1f20ff63
...@@ -55,17 +55,11 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) ...@@ -55,17 +55,11 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
cfg = &reg_cfg_table[reg_cfg]; cfg = &reg_cfg_table[reg_cfg];
/*
* We do a pretty long section here with lock on, but pin muxing
* should only happen on driver init for each driver, so it's not time
* critical.
*/
spin_lock_irqsave(&mux_spin_lock, flags);
/* Check the mux register in question */ /* Check the mux register in question */
if (cfg->mux_reg) { if (cfg->mux_reg) {
unsigned tmp1, tmp2; unsigned tmp1, tmp2;
spin_lock_irqsave(&mux_spin_lock, flags);
reg_orig = omap_readl(cfg->mux_reg); reg_orig = omap_readl(cfg->mux_reg);
/* The mux registers always seem to be 3 bits long */ /* The mux registers always seem to be 3 bits long */
...@@ -80,11 +74,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) ...@@ -80,11 +74,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
warn = 1; warn = 1;
omap_writel(reg, cfg->mux_reg); omap_writel(reg, cfg->mux_reg);
spin_unlock_irqrestore(&mux_spin_lock, flags);
} }
/* Check for pull up or pull down selection on 1610 */ /* Check for pull up or pull down selection on 1610 */
if (!cpu_is_omap1510()) { if (!cpu_is_omap1510()) {
if (cfg->pu_pd_reg && cfg->pull_val) { if (cfg->pu_pd_reg && cfg->pull_val) {
spin_lock_irqsave(&mux_spin_lock, flags);
pu_pd_orig = omap_readl(cfg->pu_pd_reg); pu_pd_orig = omap_readl(cfg->pu_pd_reg);
mask = 1 << cfg->pull_bit; mask = 1 << cfg->pull_bit;
...@@ -100,11 +96,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) ...@@ -100,11 +96,13 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
pu_pd = pu_pd_orig & ~mask; pu_pd = pu_pd_orig & ~mask;
} }
omap_writel(pu_pd, cfg->pu_pd_reg); omap_writel(pu_pd, cfg->pu_pd_reg);
spin_unlock_irqrestore(&mux_spin_lock, flags);
} }
} }
/* Check for an associated pull down register */ /* Check for an associated pull down register */
if (cfg->pull_reg) { if (cfg->pull_reg) {
spin_lock_irqsave(&mux_spin_lock, flags);
pull_orig = omap_readl(cfg->pull_reg); pull_orig = omap_readl(cfg->pull_reg);
mask = 1 << cfg->pull_bit; mask = 1 << cfg->pull_bit;
...@@ -121,6 +119,7 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) ...@@ -121,6 +119,7 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
} }
omap_writel(pull, cfg->pull_reg); omap_writel(pull, cfg->pull_reg);
spin_unlock_irqrestore(&mux_spin_lock, flags);
} }
if (warn) { if (warn) {
...@@ -149,8 +148,6 @@ omap_cfg_reg(const reg_cfg_t reg_cfg) ...@@ -149,8 +148,6 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
} }
#endif #endif
spin_unlock_irqrestore(&mux_spin_lock, flags);
#ifdef CONFIG_OMAP_MUX_ERRORS #ifdef CONFIG_OMAP_MUX_ERRORS
return warn ? -ETXTBSY : 0; return warn ? -ETXTBSY : 0;
#else #else
......
...@@ -332,7 +332,7 @@ typedef enum { ...@@ -332,7 +332,7 @@ typedef enum {
* Table of various FUNC_MUX and PULL_DWN combinations for each device. * Table of various FUNC_MUX and PULL_DWN combinations for each device.
* See also reg_cfg_t above for the lookup table. * See also reg_cfg_t above for the lookup table.
*/ */
static reg_cfg_set __initdata_or_module static const reg_cfg_set __initdata_or_module
reg_cfg_table[] = { reg_cfg_table[] = {
/* /*
* description mux mode mux pull pull pull pu_pd pu dbg * description mux mode mux pull pull pull pu_pd pu dbg
...@@ -503,7 +503,7 @@ MUX_CFG("Y10_USB0_SUSP", B, 3, 5, 2, 17, 0, 2, 0, 1) ...@@ -503,7 +503,7 @@ MUX_CFG("Y10_USB0_SUSP", B, 3, 5, 2, 17, 0, 2, 0, 1)
MUX_CFG("W9_USB2_TXEN", B, 9, 1, NA, 0, 0, NA, 0, 1) MUX_CFG("W9_USB2_TXEN", B, 9, 1, NA, 0, 0, NA, 0, 1)
MUX_CFG("AA9_USB2_VP", B, 6, 1, NA, 0, 0, NA, 0, 1) MUX_CFG("AA9_USB2_VP", B, 6, 1, NA, 0, 0, NA, 0, 1)
MUX_CFG("Y5_USB2_RCV", C, 21, 1, NA, 0, 0, NA, 0, 1) MUX_CFG("Y5_USB2_RCV", C, 21, 1, NA, 0, 0, NA, 0, 1)
MUX_CFG("R8_USB2_VM", C, 18, 1, NA, 0, 0, NA, 0, 1) MUX_CFG("R9_USB2_VM", C, 18, 1, NA, 0, 0, NA, 0, 1)
MUX_CFG("V6_USB2_TXD", C, 27, 2, NA, 0, 0, NA, 0, 1) MUX_CFG("V6_USB2_TXD", C, 27, 2, NA, 0, 0, NA, 0, 1)
MUX_CFG("W5_USB2_SE0", C, 24, 2, NA, 0, 0, NA, 0, 1) MUX_CFG("W5_USB2_SE0", C, 24, 2, NA, 0, 0, NA, 0, 1)
......
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