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linux-davinci
Commit e1947516 authored by Kevin Hilman's avatar Kevin Hilman
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DaVinci: rework how and where base addresses are defined 

The goal here is to git rid of a single global location
for defining base addresses.  These only need to be known
to chip/board specific code and are then passed into drivers
using platform_data.  Therefore, move the defines closer
to the code where they are used.
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent 4ff6f1a7
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Inline Side-by-side
Showing with 36 additions and 54 deletions
arch/arm/mach-davinci/board-evm.c
View file @ e1947516
......@@ -33,7 +33,7 @@
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <mach/hardware.h>
#include <mach/dm644x.h>
#include <mach/common.h>
#include <mach/board.h>
#include <mach/emac.h>
......@@ -45,6 +45,13 @@ void __init davinci_irq_init(void);
void __init davinci_map_common_io(void);
void __init davinci_init_common_hw(void);
#define DAVINCI_CFC_ATA_BASE 0x01C66000
#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
#if defined(CONFIG_MTD_PHYSMAP) || \
defined(CONFIG_MTD_PHYSMAP_MODULE)
......
arch/arm/mach-davinci/clock.c
View file @ e1947516
......@@ -24,6 +24,8 @@
#include <mach/cpu.h>
#include "clock.h"
#define DAVINCI_PLL_CNTRL0_BASE 0x01C40800
/* PLL/Reset register offsets */
#define PLLM 0x110
......
arch/arm/mach-davinci/devices.c
View file @ e1947516
......@@ -27,6 +27,10 @@
#include <mach/i2c.h>
#include <mach/cpu.h>
#define DAVINCI_I2C_BASE 0x01C21000
#define DAVINCI_EMAC_CNTRL_REGS_BASE 0x01C80000
#define DAVINCI_MMC_SD_BASE 0x01E10000
static struct resource i2c_resources[] = {
{
.start = DAVINCI_I2C_BASE,
......
arch/arm/mach-davinci/dma.c
View file @ e1947516
......@@ -37,6 +37,8 @@
#include <mach/edma.h>
#define DAVINCI_DMA_3PCC_BASE 0x01C00000
static spinlock_t dma_chan_lock;
static struct device_driver edma_driver;
static struct platform_device edma_dev;
......@@ -49,11 +51,9 @@ typedef void (*intr_callback) (void);
static int register_dma_interrupts(intr_callback, intr_callback, intr_callback,
intr_callback);
#define DAVINCI_DMA_REGISTER_BASE DAVINCI_DMA_3PCC_BASE
static edmacc_regs *get_edma_base(void)
{
return ((edmacc_regs *) IO_ADDRESS(DAVINCI_DMA_REGISTER_BASE));
return (edmacc_regs *) IO_ADDRESS(DAVINCI_DMA_3PCC_BASE);
}
static intr_callback cb[4];
......
arch/arm/mach-davinci/include/mach/dm644x.h
View file @ e1947516
/*
* arch/arm/mach-davinci/include/mach/dm644x.h
*
* This file contains the processor specific definitions
* of the TI DM644x.
*
......@@ -24,42 +22,6 @@
#ifndef __ASM_ARCH_DM644X_H
#define __ASM_ARCH_DM644X_H
/*
* Base register addresses
*/
#define DAVINCI_DMA_3PCC_BASE (0x01C00000)
#define DAVINCI_DMA_3PTC0_BASE (0x01C10000)
#define DAVINCI_DMA_3PTC1_BASE (0x01C10400)
#define DAVINCI_I2C_BASE (0x01C21000)
#define DAVINCI_PWM0_BASE (0x01C22000)
#define DAVINCI_PWM1_BASE (0x01C22400)
#define DAVINCI_PWM2_BASE (0x01C22800)
#define DAVINCI_SYSTEM_MODULE_BASE (0x01C40000)
#define DAVINCI_PLL_CNTRL0_BASE (0x01C40800)
#define DAVINCI_PLL_CNTRL1_BASE (0x01C40C00)
#define DAVINCI_PWR_SLEEP_CNTRL_BASE (0x01C41000)
#define DAVINCI_SYSTEM_DFT_BASE (0x01C42000)
#define DAVINCI_IEEE1394_BASE (0x01C60000)
#define DAVINCI_USB_OTG_BASE (0x01C64000)
#define DAVINCI_CFC_ATA_BASE (0x01C66000)
#define DAVINCI_SPI_BASE (0x01C66800)
#define DAVINCI_GPIO_BASE (0x01C67000)
#define DAVINCI_UHPI_BASE (0x01C67800)
#define DAVINCI_VPSS_REGS_BASE (0x01C70000)
#define DAVINCI_EMAC_CNTRL_REGS_BASE (0x01C80000)
#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE (0x01C81000)
#define DAVINCI_EMAC_WRAPPER_RAM_BASE (0x01C82000)
#define DAVINCI_MDIO_CNTRL_REGS_BASE (0x01C84000)
#define DAVINCI_IMCOP_BASE (0x01CC0000)
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE (0x01E00000)
#define DAVINCI_VLYNQ_BASE (0x01E01000)
#define DAVINCI_MCBSP_BASE (0x01E02000)
#define DAVINCI_MMC_SD_BASE (0x01E10000)
#define DAVINCI_MS_BASE (0x01E20000)
#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE (0x02000000)
#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE (0x04000000)
#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE (0x06000000)
#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE (0x08000000)
#define DAVINCI_VLYNQ_REMOTE_BASE (0x0C000000)
#include <mach/hardware.h>
#endif /* __ASM_ARCH_DM644X_H */
arch/arm/mach-davinci/include/mach/gpio.h
View file @ e1947516
......@@ -15,7 +15,8 @@
#include <linux/io.h>
#include <asm-generic/gpio.h>
#include <mach/hardware.h>
#define DAVINCI_GPIO_BASE 0x01C67000
/*
* basic gpio routines
......
arch/arm/mach-davinci/include/mach/hardware.h
View file @ e1947516
/*
* Common hardware definitions
* Hardware definitions common to all DaVinci family processors
*
* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
* Author: Kevin Hilman, Deep Root Systems, LLC
*
* 2007 (c) MontaVista Software, Inc. This file is licensed under
* 2007 (c) Deep Root Systems, LLC. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
......@@ -12,11 +12,13 @@
#define __ASM_ARCH_HARDWARE_H
/*
* ---------------------------------------------------------------------------
* Processor specific defines
* ---------------------------------------------------------------------------
* Before you add anything to ths file:
*
* This header is for defines common to ALL DaVinci family chips.
* Anything that is chip specific should go in <chipname>.h,
* and the chip/board init code should then explicitly include
* <chipname>.h
*/
#include "dm644x.h"
#define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000
#endif /* __ASM_ARCH_HARDWARE_H */
arch/arm/mach-davinci/include/mach/mcbsp.h
View file @ e1947516
......@@ -30,9 +30,9 @@
#ifndef __ASM_ARCH_DAVINCI_MCBSP_H
#define __ASM_ARCH_DAVINCI_MCBSP_H
#include <mach/hardware.h>
#include <mach/irqs.h>
#define DAVINCI_MCBSP_BASE 0x01E02000
#define DAVINCI_MCBSP1_BASE DAVINCI_MCBSP_BASE
#define DAVINCI_DMA_MCBSP1_RX 3
#define DAVINCI_DMA_MCBSP1_TX 2
......
arch/arm/mach-davinci/psc.c
View file @ e1947516
......@@ -27,6 +27,8 @@
#include <mach/psc.h>
#include <mach/mux.h>
#define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01C41000
/* PSC register offsets */
#define EPCPR 0x070
#define PTCMD 0x120
......
arch/arm/mach-davinci/usb.c
View file @ e1947516
......@@ -13,6 +13,8 @@
#include <mach/common.h>
#include <mach/hardware.h>
#define DAVINCI_USB_OTG_BASE 0x01C64000
#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
static struct musb_hdrc_eps_bits musb_eps[] = {
{ "ep1_tx", 8, },
......
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