Commit df6d3916 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (77 commits)
  [POWERPC] Abolish powerpc_flash_init()
  [POWERPC] Early serial debug support for PPC44x
  [POWERPC] Support for the Ebony 440GP reference board in arch/powerpc
  [POWERPC] Add device tree for Ebony
  [POWERPC] Add powerpc/platforms/44x, disable platforms/4xx for now
  [POWERPC] MPIC U3/U4 MSI backend
  [POWERPC] MPIC MSI allocator
  [POWERPC] Enable MSI mappings for MPIC
  [POWERPC] Tell Phyp we support MSI
  [POWERPC] RTAS MSI implementation
  [POWERPC] PowerPC MSI infrastructure
  [POWERPC] Rip out the existing powerpc msi stubs
  [POWERPC] Remove use of 4level-fixup.h for ppc32
  [POWERPC] Add powerpc PCI-E reset API implementation
  [POWERPC] Holly bootwrapper
  [POWERPC] Holly DTS
  [POWERPC] Holly defconfig
  [POWERPC] Add support for 750CL Holly board
  [POWERPC] Generalize tsi108 PCI setup
  [POWERPC] Generalize tsi108 PHY types
  ...

Fixed conflict in include/asm-powerpc/kdebug.h manually
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parents 74add80c 197686df
......@@ -1560,6 +1560,9 @@ platforms are moved over to use the flattened-device-tree model.
network device. This is used by the bootwrapper to interpret
MAC addresses passed by the firmware when no information other
than indices is available to associate an address with a device.
- phy-connection-type : a string naming the controller/PHY interface type,
i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "tbi",
or "rtbi".
Example:
ucc@2000 {
......@@ -1574,6 +1577,7 @@ platforms are moved over to use the flattened-device-tree model.
rx-clock = "none";
tx-clock = "clk9";
phy-handle = <212000>;
phy-connection-type = "gmii";
pio-handle = <140001>;
};
......
......@@ -117,6 +117,9 @@ config GENERIC_BUG
default y
depends on BUG
config SYS_SUPPORTS_APM_EMULATION
bool
#
# Powerpc uses the slab allocator to manage its ptes and the
# page structs of ptes are used for splitting the page table
......@@ -136,6 +139,11 @@ config DEFAULT_UIMAGE
Used to allow a board to specify it wants a uImage built by default
default n
config PPC64_SWSUSP
bool
depends on PPC64 && (BROKEN || (PPC_PMAC64 && EXPERIMENTAL))
default y
menu "Processor support"
choice
prompt "Processor Type"
......@@ -206,6 +214,7 @@ config 40x
config 44x
bool "AMCC 44x"
select PPC_DCR_NATIVE
select WANT_DEVICE_TREE
config E200
bool "Freescale e200"
......@@ -270,9 +279,14 @@ config PPC_OF_PLATFORM_PCI
depends on PPC64 # not supported on 32 bits yet
default n
config 4xx
bool
depends on 40x || 44x
default y
config BOOKE
bool
depends on E200 || E500
depends on E200 || E500 || 44x
default y
config FSL_BOOKE
......@@ -669,11 +683,12 @@ config MCA
config PCI
bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx \
|| PPC_MPC52xx || (EMBEDDED && (PPC_PSERIES || PPC_ISERIES)) \
|| MPC7448HPC2 || PPC_PS3
|| MPC7448HPC2 || PPC_PS3 || PPC_HOLLY
default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx \
&& !PPC_85xx && !PPC_86xx
default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS
default PCI_QSPAN if !4xx && !CPM2 && 8xx
select ARCH_SUPPORTS_MSI
help
Find out whether your system includes a PCI bus. PCI is the name of
a bus system, i.e. the way the CPU talks to the other stuff inside
......
......@@ -139,10 +139,6 @@ config BOOTX_TEXT
Say Y here to see progress messages from the boot firmware in text
mode. Requires either BootX or Open Firmware.
config SERIAL_TEXT_DEBUG
bool "Support for early boot texts over serial port"
depends on 4xx
config PPC_EARLY_DEBUG
bool "Early debugging (dangerous)"
......@@ -207,6 +203,24 @@ config PPC_EARLY_DEBUG_BEAT
help
Select this to enable early debugging for Celleb with Beat.
config PPC_EARLY_DEBUG_44x
bool "Early serial debugging for IBM/AMCC 44x CPUs"
depends on 44x
select PPC_UDBG_16550
help
Select this to enable early debugging for IBM 44x chips via the
inbuilt serial port.
endchoice
config PPC_EARLY_DEBUG_44x_PHYSLOW
hex "Low 32 bits of early debug UART physical address"
depends PPC_EARLY_DEBUG_44x
default "0x40000200"
config PPC_EARLY_DEBUG_44x_PHYSHIGH
hex "EPRN of early debug UART physical address"
depends PPC_EARLY_DEBUG_44x
default "0x1"
endmenu
......@@ -148,7 +148,7 @@ all: $(KBUILD_IMAGE)
CPPFLAGS_vmlinux.lds := -Upowerpc
BOOT_TARGETS = zImage zImage.initrd uImage cuImage
BOOT_TARGETS = zImage zImage.initrd uImage
PHONY += $(BOOT_TARGETS)
......
/*
* Copyright 2007 David Gibson, IBM Corporation.
*
* Based on earlier code:
* Matt Porter <mporter@kernel.crashing.org>
* Copyright 2002-2005 MontaVista Software Inc.
*
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
* Copyright (c) 2003, 2004 Zultys Technologies
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <stddef.h>
#include "types.h"
#include "string.h"
#include "stdio.h"
#include "ops.h"
#include "reg.h"
#include "dcr.h"
/* Read the 44x memory controller to get size of system memory. */
void ibm44x_fixup_memsize(void)
{
int i;
unsigned long memsize, bank_config;
memsize = 0;
for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) {
mtdcr(DCRN_SDRAM0_CFGADDR, sdram_bxcr[i]);
bank_config = mfdcr(DCRN_SDRAM0_CFGDATA);
if (bank_config & SDRAM_CONFIG_BANK_ENABLE)
memsize += SDRAM_CONFIG_BANK_SIZE(bank_config);
}
dt_fixup_memory(0, memsize);
}
/*
* PowerPC 44x related functions
*
* Copyright 2007 David Gibson, IBM Corporation.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef _PPC_BOOT_44X_H_
#define _PPC_BOOT_44X_H_
void ibm44x_fixup_memsize(void);
void ebony_init(void *mac0, void *mac1);
#endif /* _PPC_BOOT_44X_H_ */
......@@ -37,13 +37,15 @@ zlib := inffast.c inflate.c inftrees.c
zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h
zliblinuxheader := zlib.h zconf.h zutil.h
$(addprefix $(obj)/,$(zlib) main.o): $(addprefix $(obj)/,$(zliblinuxheader)) \
$(addprefix $(obj)/,$(zlibheader))
$(addprefix $(obj)/,$(zlib) gunzip_util.o main.o): \
$(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader))
src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
ns16550.c serial.c simple_alloc.c div64.S util.S \
gunzip_util.c elf_util.c $(zlib) devtree.c
src-plat := of.c cuboot-83xx.c cuboot-85xx.c
gunzip_util.c elf_util.c $(zlib) devtree.c \
44x.c ebony.c
src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
cuboot-ebony.c treeboot-ebony.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
......@@ -129,7 +131,14 @@ image-$(CONFIG_PPC_CELLEB) += zImage.pseries
image-$(CONFIG_PPC_CHRP) += zImage.chrp
image-$(CONFIG_PPC_EFIKA) += zImage.chrp
image-$(CONFIG_PPC_PMAC) += zImage.pmac
image-$(CONFIG_DEFAULT_UIMAGE) += uImage cuImage
image-$(CONFIG_PPC_HOLLY) += zImage.holly-elf
image-$(CONFIG_DEFAULT_UIMAGE) += uImage
ifneq ($(CONFIG_DEVICE_TREE),"")
image-$(CONFIG_PPC_83xx) += cuImage.83xx
image-$(CONFIG_PPC_85xx) += cuImage.85xx
image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
endif
# For 32-bit powermacs, build the COFF and miboot images
# as well as the ELF images.
......@@ -138,7 +147,8 @@ image-$(CONFIG_PPC_PMAC) += zImage.coff zImage.miboot
endif
initrd- := $(patsubst zImage%, zImage.initrd%, $(image-n) $(image-))
initrd-y := $(patsubst zImage%, zImage.initrd%, $(image-y))
initrd-y := $(patsubst zImage%, zImage.initrd%, \
$(patsubst treeImage%, treeImage.initrd%, $(image-y)))
initrd-y := $(filter-out $(image-y), $(initrd-y))
targets += $(image-y) $(initrd-y)
......@@ -159,18 +169,27 @@ $(obj)/zImage.ps3: vmlinux
$(obj)/zImage.initrd.ps3: vmlinux
@echo " WARNING zImage.initrd.ps3 not supported (yet)"
$(obj)/zImage.holly-elf: vmlinux $(wrapperbits)
$(call if_changed,wrap,holly,$(obj)/dts/holly.dts,,)
$(obj)/zImage.initrd.holly-elf: vmlinux $(wrapperbits) $(obj)/ramdisk.image.gz
$(call if_changed,wrap,holly,$(obj)/dts/holly.dts,,$(obj)/ramdisk.image.gz)
$(obj)/uImage: vmlinux $(wrapperbits)
$(call if_changed,wrap,uboot)
cuboot-plat-$(CONFIG_83xx) += 83xx
cuboot-plat-$(CONFIG_85xx) += 85xx
cuboot-plat-y += unknown-platform
# CONFIG_DEVICE_TREE will have "" around it, make sure to strip them
dts = $(if $(shell echo $(CONFIG_DEVICE_TREE) | grep '^/'),\
,$(srctree)/$(src)/dts/)$(CONFIG_DEVICE_TREE)
,$(srctree)/$(src)/dts/)$(CONFIG_DEVICE_TREE:"%"=%)
$(obj)/cuImage.%: vmlinux $(dts) $(wrapperbits)
$(call if_changed,wrap,cuboot-$*,$(dts))
$(obj)/treeImage.%: vmlinux $(dts) $(wrapperbits)
$(call if_changed,wrap,treeboot-$*,$(dts))
$(obj)/cuImage: vmlinux $(wrapperbits)
$(call if_changed,wrap,cuboot-$(word 1,$(cuboot-plat-y)),$(dts))
$(obj)/treeImage.initrd.%: vmlinux $(dts) $(wrapperbits)
$(call if_changed,wrap,treeboot-$*,$(dts),,$(obj)/ramdisk.image.gz)
$(obj)/zImage: $(addprefix $(obj)/, $(image-y))
@rm -f $@; ln $< $@
......@@ -181,8 +200,8 @@ install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
sh -x $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" vmlinux System.map "$(INSTALL_PATH)" $<
# anything not in $(targets)
clean-files += $(image-) $(initrd-) zImage zImage.initrd \
cuImage.elf cuImage.bin.gz
clean-files += $(image-) $(initrd-) zImage zImage.initrd cuImage.* \
treeImage.*
# clean up files cached by wrapper
clean-kernel := vmlinux.strip vmlinux.bin
......
/*
* Old U-boot compatibility for Ebony
*
* Author: David Gibson <david@gibson.dropbear.id.au>
*
* Copyright 2007 David Gibson, IBM Corporatio.
* Based on cuboot-83xx.c, which is:
* Copyright (c) 2007 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ops.h"
#include "stdio.h"
#include "44x.h"
#define TARGET_44x
#include "ppcboot.h"
static bd_t bd;
extern char _end[];
BSS_STACK(4096);
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
unsigned long end_of_ram = bd.bi_memstart + bd.bi_memsize;
unsigned long avail_ram = end_of_ram - (unsigned long)_end;
memcpy(&bd, (bd_t *)r3, sizeof(bd));
loader_info.initrd_addr = r4;
loader_info.initrd_size = r4 ? r5 : 0;
loader_info.cmdline = (char *)r6;
loader_info.cmdline_len = r7 - r6;
simple_alloc_init(_end, avail_ram, 32, 64);
ebony_init(&bd.bi_enetaddr, &bd.bi_enet1addr);
}
#ifndef _PPC_BOOT_DCR_H_
#define _PPC_BOOT_DCR_H_
#define mfdcr(rn) \
({ \
unsigned long rval; \
asm volatile("mfdcr %0,%1" : "=r"(rval) : "i"(rn)); \
rval; \
})
#define mtdcr(rn, val) \
asm volatile("mtdcr %0,%1" : : "i"(rn), "r"(val))
/* 440GP/440GX SDRAM controller DCRs */
#define DCRN_SDRAM0_CFGADDR 0x010
#define DCRN_SDRAM0_CFGDATA 0x011
#define SDRAM0_B0CR 0x40
#define SDRAM0_B1CR 0x44
#define SDRAM0_B2CR 0x48
#define SDRAM0_B3CR 0x4c
static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2CR, SDRAM0_B3CR };
#define SDRAM_CONFIG_BANK_ENABLE 0x00000001
#define SDRAM_CONFIG_SIZE_MASK 0x000e0000
#define SDRAM_CONFIG_BANK_SIZE(reg) \
(0x00400000 << ((reg & SDRAM_CONFIG_SIZE_MASK) >> 17))
/* 440GP Clock, PM, chip control */
#define DCRN_CPC0_SR 0x0b0
#define DCRN_CPC0_ER 0x0b1
#define DCRN_CPC0_FR 0x0b2
#define DCRN_CPC0_SYS0 0x0e0
#define CPC0_SYS0_TUNE 0xffc00000
#define CPC0_SYS0_FBDV_MASK 0x003c0000
#define CPC0_SYS0_FWDVA_MASK 0x00038000
#define CPC0_SYS0_FWDVB_MASK 0x00007000
#define CPC0_SYS0_OPDV_MASK 0x00000c00
#define CPC0_SYS0_EPDV_MASK 0x00000300
/* Helper macros to compute the actual clock divider values from the
* encodings in the CPC0 register */
#define CPC0_SYS0_FBDV(reg) \
((((((reg) & CPC0_SYS0_FBDV_MASK) >> 18) - 1) & 0xf) + 1)
#define CPC0_SYS0_FWDVA(reg) \
(8 - (((reg) & CPC0_SYS0_FWDVA_MASK) >> 15))
#define CPC0_SYS0_FWDVB(reg) \
(8 - (((reg) & CPC0_SYS0_FWDVB_MASK) >> 12))
#define CPC0_SYS0_OPDV(reg) \
((((reg) & CPC0_SYS0_OPDV_MASK) >> 10) + 1)
#define CPC0_SYS0_EPDV(reg) \
((((reg) & CPC0_SYS0_EPDV_MASK) >> 8) + 1)
#define CPC0_SYS0_EXTSL 0x00000080
#define CPC0_SYS0_RW_MASK 0x00000060
#define CPC0_SYS0_RL 0x00000010
#define CPC0_SYS0_ZMIISL_MASK 0x0000000c
#define CPC0_SYS0_BYPASS 0x00000002
#define CPC0_SYS0_NTO1 0x00000001
#define DCRN_CPC0_SYS1 0x0e1
#define DCRN_CPC0_CUST0 0x0e2
#define DCRN_CPC0_CUST1 0x0e3
#define DCRN_CPC0_STRP0 0x0e4
#define DCRN_CPC0_STRP1 0x0e5
#define DCRN_CPC0_STRP2 0x0e6
#define DCRN_CPC0_STRP3 0x0e7
#define DCRN_CPC0_GPIO 0x0e8
#define DCRN_CPC0_PLB 0x0e9
#define DCRN_CPC0_CR1 0x0ea
#define DCRN_CPC0_CR0 0x0eb
#define CPC0_CR0_SWE 0x80000000
#define CPC0_CR0_CETE 0x40000000
#define CPC0_CR0_U1FCS 0x20000000
#define CPC0_CR0_U0DTE 0x10000000
#define CPC0_CR0_U0DRE 0x08000000
#define CPC0_CR0_U0DC 0x04000000
#define CPC0_CR0_U1DTE 0x02000000
#define CPC0_CR0_U1DRE 0x01000000
#define CPC0_CR0_U1DC 0x00800000
#define CPC0_CR0_U0EC 0x00400000
#define CPC0_CR0_U1EC 0x00200000
#define CPC0_CR0_UDIV_MASK 0x001f0000
#define CPC0_CR0_UDIV(reg) \
((((reg) & CPC0_CR0_UDIV_MASK) >> 16) + 1)
#define DCRN_CPC0_MIRQ0 0x0ec
#define DCRN_CPC0_MIRQ1 0x0ed
#define DCRN_CPC0_JTAGID 0x0ef
#endif /* _PPC_BOOT_DCR_H_ */
/*
* Device Tree Source for IBM Ebony
*
* Copyright (c) 2006, 2007 IBM Corp.
* Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
*
* FIXME: Draft only!
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*
* To build:
* dtc -I dts -O asm -o ebony.S -b 0 ebony.dts
* dtc -I dts -O dtb -o ebony.dtb -b 0 ebony.dts
*/
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "ibm,ebony";
compatible = "ibm,ebony";
dcr-parent = <&/cpus/PowerPC,440GP@0>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
PowerPC,440GP@0 {
device_type = "cpu";
reg = <0>;
clock-frequency = <0>; // Filled in by zImage
timebase-frequency = <0>; // Filled in by zImage
i-cache-line-size = <32>;
d-cache-line-size = <32>;
i-cache-size = <0>;
d-cache-size = <0>;
dcr-controller;
dcr-access-method = "native";
};
};
memory {
device_type = "memory";
reg = <0 0 0>; // Filled in by zImage
};
UIC0: interrupt-controller0 {
device_type = "ibm,uic";
compatible = "ibm,uic-440gp", "ibm,uic";
interrupt-controller;
cell-index = <0>;
dcr-reg = <0c0 009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
};
UIC1: interrupt-controller1 {
device_type = "ibm,uic";
compatible = "ibm,uic-440gp", "ibm,uic";
interrupt-controller;
cell-index = <1>;
dcr-reg = <0d0 009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <1e 4 1f 4>; /* cascade */
interrupt-parent = <&UIC0>;
};
CPC0: cpc {
device_type = "ibm,cpc";
compatible = "ibm,cpc-440gp";
dcr-reg = <0b0 003 0e0 010>;
// FIXME: anything else?
};
plb {
device_type = "ibm,plb";
compatible = "ibm,plb-440gp", "ibm,plb4";
#address-cells = <2>;
#size-cells = <1>;
ranges;
clock-frequency = <0>; // Filled in by zImage
SDRAM0: sdram {
device_type = "memory-controller";
compatible = "ibm,sdram-440gp", "ibm,sdram";
dcr-reg = <010 2>;
// FIXME: anything else?
};
DMA0: dma {
// FIXME: ???
device_type = "ibm,dma-4xx";
compatible = "ibm,dma-440gp", "ibm,dma-4xx";
dcr-reg = <100 027>;
};
MAL0: mcmal {
device_type = "mcmal-dma";
compatible = "ibm,mcmal-440gp", "ibm,mcmal";
dcr-reg = <180 62>;
num-tx-chans = <4>;
num-rx-chans = <4>;
interrupt-parent = <&MAL0>;
interrupts = <0 1 2 3 4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
/*RXEOB*/ 1 &UIC0 b 4
/*SERR*/ 2 &UIC1 0 4
/*TXDE*/ 3 &UIC1 1 4
/*RXDE*/ 4 &UIC1 2 4>;
interrupt-map-mask = <ffffffff>;
};
POB0: opb {
device_type = "ibm,opb";
compatible = "ibm,opb-440gp", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
/* Wish there was a nicer way of specifying a full 32-bit
range */
ranges = <00000000 1 00000000 80000000
80000000 1 80000000 80000000>;
dcr-reg = <090 00b>;
interrupt-parent = <&UIC1>;
interrupts = <7 4>;
clock-frequency = <0>; // Filled in by zImage
EBC0: ebc {
device_type = "ibm,ebc";
compatible = "ibm,ebc-440gp";
dcr-reg = <012 2>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; // Filled in by zImage
ranges = <0 00000000 fff00000 100000
1 00000000 48000000 100000
2 00000000 ff800000 400000
3 00000000 48200000 100000
7 00000000 48300000 100000>;
interrupts = <5 4>;
interrupt-parent = <&UIC1>;
small-flash@0,0 {
device_type = "rom";
compatible = "direct-mapped";
probe-type = "JEDEC";
bank-width = <1>;
partitions = <0 80000>;
partition-names = "OpenBIOS";
reg = <0 80000 80000>;
};
ds1743@1,0 {
/* NVRAM & RTC */
device_type = "nvram";
compatible = "ds1743";
reg = <1 0 2000>;
};
large-flash@2,0 {
device_type = "rom";
compatible = "direct-mapped";
probe-type = "JEDEC";
bank-width = <1>;
partitions = <0 380000
280000 80000>;
partition-names = "fs", "firmware";
reg = <2 0 400000>;
};
ir@3,0 {
reg = <3 0 10>;
};
fpga@7,0 {
compatible = "Ebony-FPGA";
reg = <7 0 10>;
};
};
UART0: serial@40000200 {
device_type = "serial";
compatible = "ns16550";
reg = <40000200 8>;
virtual-reg = <e0000200>;
clock-frequency = <A8C000>;
current-speed = <2580>;
interrupt-parent = <&UIC0>;
interrupts = <0 4>;
};
UART1: serial@40000300 {
device_type = "serial";
compatible = "ns16550";
reg = <40000300 8>;
virtual-reg = <e0000300>;
clock-frequency = <A8C000>;
current-speed = <2580>;
interrupt-parent = <&UIC0>;
interrupts = <1 4>;
};
IIC0: i2c@40000400 {
/* FIXME */
device_type = "i2c";
compatible = "ibm,iic-440gp", "ibm,iic";
reg = <40000400 14>;
interrupt-parent = <&UIC0>;
interrupts = <2 4>;
};
IIC1: i2c@40000500 {
/* FIXME */
device_type = "i2c";
compatible = "ibm,iic-440gp", "ibm,iic";
reg = <40000500 14>;
interrupt-parent = <&UIC0>;
interrupts = <3 4>;
};
GPIO0: gpio@40000700 {
/* FIXME */
device_type = "gpio";
compatible = "ibm,gpio-440gp";
reg = <40000700 20>;
};
ZMII0: emac-zmii@40000780 {
device_type = "emac-zmii";
compatible = "ibm,zmii-440gp", "ibm,zmii";
reg = <40000780 c>;
};
EMAC0: ethernet@40000800 {
linux,network-index = <0>;
device_type = "network";
compatible = "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
interrupts = <1c 4 1d 4>;
reg = <40000800 70>;
local-mac-address = [000000000000]; // Filled in by zImage
mal-device = <&MAL0>;
mal-tx-channel = <0 1>;
mal-rx-channel = <0>;
cell-index = <0>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rmii";
phy-map = <00000001>;
zmii-device = <&ZMII0>;
zmii-channel = <0>;
};
EMAC1: ethernet@40000900 {
linux,network-index = <1>;
device_type = "network";
compatible = "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
interrupts = <1e 4 1f 4>;
reg = <40000900 70>;
local-mac-address = [000000000000]; // Filled in by zImage
mal-device = <&MAL0>;
mal-tx-channel = <2 3>;
mal-rx-channel = <1>;
cell-index = <1>;
max-frame-size = <5dc>;
rx-fifo-size = <1000>;
tx-fifo-size = <800>;
phy-mode = "rmii";
phy-map = <00000001>;
zmii-device = <&ZMII0>;
zmii-channel = <1>;
};
GPT0: gpt@40000a00 {
/* FIXME */
reg = <40000a00 d4>;
interrupt-parent = <&UIC0>;
interrupts = <12 4 13 4 14 4 15 4 16 4>;
};
};
PCIX0: pci@1234 {
device_type = "pci";
/* FIXME */
reg = <2 0ec00000 8
2 0ec80000 f0
2 0ec80100 fc>;
};
};
chosen {
linux,stdout-path = "/plb/opb/serial@40000200";
// linux,initrd-start = <0>; /* FIXME */
// linux,initrd-end = <0>;
// bootargs = "";
};
};
/*
* Device Tree Source for IBM Holly (PPC 750CL with TSI controller)
* Copyright 2007, IBM Corporation
*
* Stephen Winiecki <stevewin@us.ibm.com>
* Josh Boyer <jwboyer@linux.vnet.ibm.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without
* any warranty of any kind, whether express or implied.
*
* To build:
* dtc -I dts -O asm -o holly.S -b 0 holly.dts
* dtc -I dts -O dtb -o holly.dtb -b 0 holly.dts
*/
/ {
model = "41K7339";
compatible = "ibm,holly";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells =<0>;
PowerPC,750CL@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>;
i-cache-line-size = <20>;
d-cache-size = <8000>;
i-cache-size = <8000>;
d-cache-sets = <80>;
i-cache-sets = <80>;
timebase-frequency = <2faf080>;
clock-frequency = <23c34600>;
bus-frequency = <bebc200>;
32-bit;
};
};
memory@0 {
device_type = "memory";
reg = <00000000 20000000>;
};
tsi109@c0000000 {
device_type = "tsi-bridge";
compatible = "tsi-bridge";
#address-cells = <1>;
#size-cells = <1>;
ranges = <00000000 c0000000 00010000>;
reg = <c0000000 00010000>;
i2c@7000 {
device_type = "i2c";
compatible = "tsi-i2c";
interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
interrupts = <e 2>;
reg = <7000 400>;
};
mdio@6000 {
device_type = "mdio";
compatible = "tsi-ethernet";
PHY1: ethernet-phy@6000 {
device_type = "ethernet-phy";
compatible = "bcm54xx";
reg = <6000 50>;
phy-id = <1>;
};
PHY2: ethernet-phy@6400 {
device_type = "ethernet-phy";
compatible = "bcm54xx";
reg = <6000 50>;
phy-id = <2>;
};
};
ethernet@6200 {
device_type = "network";
compatible = "tsi-ethernet";
#address-cells = <1>;
#size-cells = <0>;
reg = <6000 200>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
interrupts = <10 2>;
phy-handle = <&PHY1>;
};
ethernet@6600 {
device_type = "network";
compatible = "tsi-ethernet";
#address-cells = <1>;
#size-cells = <0>;
reg = <6400 200>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
interrupts = <11 2>;
phy-handle = <&PHY2>;
};
serial@7808 {
device_type = "serial";
compatible = "ns16550";
reg = <7808 200>;
virtual-reg = <c0007808>;
clock-frequency = <3F9C6000>;
current-speed = <1c200>;
interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
interrupts = <c 2>;
};
serial@7c08 {
device_type = "serial";
compatible = "ns16550";
reg = <7c08 200>;
virtual-reg = <c0007c08>;
clock-frequency = <3F9C6000>;
current-speed = <1c200>;
interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
interrupts = <d 2>;
};
MPIC: pic@7400 {
device_type = "open-pic";
compatible = "chrp,open-pic";
interrupt-controller;
#interrupt-cells = <2>;
reg = <7400 400>;
big-endian;
};
pci@1000 {
device_type = "pci";
compatible = "tsi109";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <1000 1000>;
bus-range = <0 0>;
/*----------------------------------------------------+
| PCI memory range.
| 01 denotes I/O space
| 02 denotes 32-bit memory space
+----------------------------------------------------*/
ranges = <02000000 0 40000000 40000000 0 10000000
01000000 0 00000000 7e000000 0 00010000>;
clock-frequency = <7f28154>;
interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
interrupts = <17 2>;
interrupt-map-mask = <f800 0 0 7>;
/*----------------------------------------------------+
| The INTA, INTB, INTC, INTD are shared.
+----------------------------------------------------*/
interrupt-map = <
0800 0 0 1 &RT0 24 0
0800 0 0 2 &RT0 25 0
0800 0 0 3 &RT0 26 0
0800 0 0 4 &RT0 27 0
1000 0 0 1 &RT0 25 0
1000 0 0 2 &RT0 26 0
1000 0 0 3 &RT0 27 0
1000 0 0 4 &RT0 24 0
1800 0 0 1 &RT0 26 0
1800 0 0 2 &RT0 27 0
1800 0 0 3 &RT0 24 0
1800 0 0 4 &RT0 25 0
2000 0 0 1 &RT0 27 0
2000 0 0 2 &RT0 24 0
2000 0 0 3 &RT0 25 0
2000 0 0 4 &RT0 26 0
>;
RT0: router@1180 {
device_type = "pic-router";
interrupt-controller;
big-endian;
clock-frequency = <0>;
#address-cells = <0>;
#interrupt-cells = <2>;
interrupts = <17 2>;
interrupt-parent = < &/tsi109@c0000000/pic@7400 >;
};
};
};
chosen {
linux,stdout-path = "/tsi109@c0000000/serial@7808";
bootargs = "console=ttyS0,115200";
};
};
......@@ -48,6 +48,7 @@
soc5200@f0000000 {
model = "fsl,mpc5200";
compatible = "mpc5200";
revision = "" // from bootloader
#interrupt-cells = <3>;
device_type = "soc";
......@@ -166,7 +167,7 @@
device_type = "mscan";
compatible = "mpc5200-mscan";
cell-index = <1>;
interrupts = <1 12 0>;
interrupts = <2 12 0>;
interrupt-parent = <500>;
reg = <980 80>;
};
......@@ -178,7 +179,7 @@
interrupt-parent = <500>;
};
gpio-wkup@b00 {
gpio-wkup@c00 {
compatible = "mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
......@@ -317,20 +318,22 @@
i2c@3d00 {
device_type = "i2c";
compatible = "mpc5200-i2c";
compatible = "mpc5200-i2c\0fsl-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
interrupt-parent = <500>;
fsl5200-clocking;
};
i2c@3d40 {
device_type = "i2c";
compatible = "mpc5200-i2c";
compatible = "mpc5200-i2c\0fsl-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <500>;
fsl5200-clocking;
};
sram@8000 {
device_type = "sram";
......
......@@ -48,6 +48,7 @@
soc5200@f0000000 {
model = "fsl,mpc5200b";
compatible = "mpc5200";
revision = ""; // from bootloader
#interrupt-cells = <3>;
device_type = "soc";
......@@ -166,7 +167,7 @@
device_type = "mscan";
compatible = "mpc5200b-mscan\0mpc5200-mscan";
cell-index = <1>;
interrupts = <1 12 0>;
interrupts = <2 12 0>;
interrupt-parent = <500>;
reg = <980 80>;
};
......@@ -178,7 +179,7 @@
interrupt-parent = <500>;
};
gpio-wkup@b00 {
gpio-wkup@c00 {
compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
......@@ -322,20 +323,22 @@
i2c@3d00 {
device_type = "i2c";
compatible = "mpc5200b-i2c\0mpc5200-i2c";
compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
interrupt-parent = <500>;
fsl5200-clocking;
};
i2c@3d40 {
device_type = "i2c";
compatible = "mpc5200b-i2c\0mpc5200-i2c";
compatible = "mpc5200b-i2c\0mpc5200-i2c\0fsl-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <500>;
fsl5200-clocking;
};
sram@8000 {
device_type = "sram";
......
......@@ -306,14 +306,12 @@
interrupts = <11 8>;
reg = <3>;
device_type = "ethernet-phy";
interface = <3>; //ENET_100_MII
};
phy4: ethernet-phy@04 {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <4>;
device_type = "ethernet-phy";
interface = <3>;
};
};
......
......@@ -265,14 +265,12 @@
interrupts = <0>;
reg = <0>;
device_type = "ethernet-phy";
interface = <3>; //ENET_100_MII
};
phy04:ethernet-phy@04 {
interrupt-parent = <&pic>;
interrupts = <0>;
reg = <4>;
device_type = "ethernet-phy";
interface = <3>;
};
};
......
......@@ -305,6 +305,7 @@
rx-clock = <0>;
tx-clock = <19>;
phy-handle = < &phy0 >;
phy-connection-type = "rgmii-id";
pio-handle = < &pio1 >;
};
......@@ -320,6 +321,7 @@
rx-clock = <0>;
tx-clock = <14>;
phy-handle = < &phy1 >;
phy-connection-type = "rgmii-id";
pio-handle = < &pio2 >;
};
......@@ -335,14 +337,12 @@
interrupts = <11 8>;
reg = <0>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
phy1: ethernet-phy@01 {
interrupt-parent = < &ipic >;
interrupts = <12 8>;
reg = <1>;
device_type = "ethernet-phy";
interface = <6>;
};
};
......
......@@ -288,6 +288,7 @@
rx-clock = <0>;
tx-clock = <19>;
phy-handle = <&qe_phy0>;
phy-connection-type = "gmii";
pio-handle = <&pio1>;
};
......@@ -303,6 +304,7 @@
rx-clock = <0>;
tx-clock = <14>;
phy-handle = <&qe_phy1>;
phy-connection-type = "gmii";
pio-handle = <&pio2>;
};
......@@ -320,28 +322,24 @@
interrupts = <31 1>;
reg = <0>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
qe_phy1: ethernet-phy@01 {
interrupt-parent = <&mpic>;
interrupts = <32 1>;
reg = <1>;
device_type = "ethernet-phy";
interface = <6>;
};
qe_phy2: ethernet-phy@02 {
interrupt-parent = <&mpic>;
interrupts = <31 1>;
reg = <2>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
qe_phy3: ethernet-phy@03 {
interrupt-parent = <&mpic>;
interrupts = <32 1>;
reg = <3>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
};
......
/*
* Copyright 2007 David Gibson, IBM Corporation.
*
* Based on earlier code:
* Copyright (C) Paul Mackerras 1997.
*
* Matt Porter <mporter@kernel.crashing.org>
* Copyright 2002-2005 MontaVista Software Inc.
*
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
* Copyright (c) 2003, 2004 Zultys Technologies
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <stdarg.h>
#include <stddef.h>
#include "types.h"
#include "elf.h"
#include "string.h"
#include "stdio.h"
#include "page.h"
#include "ops.h"
#include "reg.h"
#include "dcr.h"
#include "44x.h"
extern char _dtb_start[];
extern char _dtb_end[];
static u8 *ebony_mac0, *ebony_mac1;
/* Calculate 440GP clocks */
void ibm440gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
{
u32 sys0 = mfdcr(DCRN_CPC0_SYS0);
u32 cr0 = mfdcr(DCRN_CPC0_CR0);
u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
u32 opdv = CPC0_SYS0_OPDV(sys0);
u32 epdv = CPC0_SYS0_EPDV(sys0);
if (sys0 & CPC0_SYS0_BYPASS) {
/* Bypass system PLL */
cpu = plb = sysclk;
} else {
if (sys0 & CPC0_SYS0_EXTSL)
/* PerClk */
m = CPC0_SYS0_FWDVB(sys0) * opdv * epdv;
else
/* CPU clock */
m = CPC0_SYS0_FBDV(sys0) * CPC0_SYS0_FWDVA(sys0);
cpu = sysclk * m / CPC0_SYS0_FWDVA(sys0);
plb = sysclk * m / CPC0_SYS0_FWDVB(sys0);
}
opb = plb / opdv;
ebc = opb / epdv;
/* FIXME: Check if this is for all 440GP, or just Ebony */
if ((mfpvr() & 0xf0000fff) == 0x40000440)
/* Rev. B 440GP, use external system clock */
tb = sysclk;
else
/* Rev. C 440GP, errata force us to use internal clock */
tb = cpu;
if (cr0 & CPC0_CR0_U0EC)
/* External UART clock */
uart0 = ser_clk;
else
/* Internal UART clock */
uart0 = plb / CPC0_CR0_UDIV(cr0);
if (cr0 & CPC0_CR0_U1EC)
/* External UART clock */
uart1 = ser_clk;
else
/* Internal UART clock */
uart1 = plb / CPC0_CR0_UDIV(cr0);
printf("PPC440GP: SysClk = %dMHz (%x)\n\r",
(sysclk + 500000) / 1000000, sysclk);
dt_fixup_cpu_clocks(cpu, tb, 0);
dt_fixup_clock("/plb", plb);
dt_fixup_clock("/plb/opb", opb);
dt_fixup_clock("/plb/opb/ebc", ebc);
dt_fixup_clock("/plb/opb/serial@40000200", uart0);
dt_fixup_clock("/plb/opb/serial@40000300", uart1);
}
static void ebony_fixups(void)
{
// FIXME: sysclk should be derived by reading the FPGA registers
unsigned long sysclk = 33000000;
ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
ibm44x_fixup_memsize();
dt_fixup_mac_addresses(ebony_mac0, ebony_mac1);
}
#define SPRN_DBCR0 0x134
#define DBCR0_RST_SYSTEM 0x30000000
static void ebony_exit(void)
{
unsigned long tmp;
asm volatile (
"mfspr %0,%1\n"
"oris %0,%0,%2@h\n"
"mtspr %1,%0"
: "=&r"(tmp) : "i"(SPRN_DBCR0), "i"(DBCR0_RST_SYSTEM)
);
}
void ebony_init(void *mac0, void *mac1)
{
platform_ops.fixups = ebony_fixups;
platform_ops.exit = ebony_exit;
ebony_mac0 = mac0;
ebony_mac1 = mac1;
ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
serial_console_init();
}
/*
* Copyright 2007 IBM Corporation
*
* Stephen Winiecki <stevewin@us.ibm.com>
* Josh Boyer <jwboyer@linux.vnet.ibm.com>
*
* Based on earlier code:
* Copyright (C) Paul Mackerras 1997.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*/
#include <stdarg.h>
#include <stddef.h>
#include "types.h"
#include "elf.h"
#include "string.h"
#include "stdio.h"
#include "page.h"
#include "ops.h"
#include "io.h"
extern char _start[];
extern char _end[];
extern char _dtb_start[];
extern char _dtb_end[];
BSS_STACK(4096);
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5)
{
u32 heapsize = 0x8000000 - (u32)_end; /* 128M */
simple_alloc_init(_end, heapsize, 32, 64);
ft_init(_dtb_start, 0, 4);
serial_console_init();
}
......@@ -46,8 +46,8 @@ int main(int argc, char *argv[])
struct stat st;
boot_block_t bt;
if (argc < 3) {
fprintf(stderr, "usage: %s <zImage-file> <boot-image> [entry-point]\n",argv[0]);
if (argc < 5) {
fprintf(stderr, "usage: %s <zImage-file> <boot-image> <load address> <entry point>\n",argv[0]);
exit(1);
}
......@@ -61,10 +61,8 @@ int main(int argc, char *argv[])
bt.bb_magic = htonl(0x0052504F);
/* If we have the optional entry point parameter, use it */
if (argc == 4)
bt.bb_dest = bt.bb_entry_point = htonl(strtoul(argv[3], NULL, 0));
else
bt.bb_dest = bt.bb_entry_point = htonl(0x500000);
bt.bb_dest = htonl(strtoul(argv[3], NULL, 0));
bt.bb_entry_point = htonl(strtoul(argv[4], NULL, 0));
/* We know these from the linker command.
* ...and then move it up into memory a little more so the
......
/*
* Old U-boot compatibility for Ebony
*
* Author: David Gibson <david@gibson.dropbear.id.au>
*
* Copyright 2007 David Gibson, IBM Corporatio.
* Based on cuboot-83xx.c, which is:
* Copyright (c) 2007 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ops.h"
#include "stdio.h"
#include "44x.h"
extern char _end[];
BSS_STACK(4096);
#define OPENBIOS_MAC_BASE 0xfffffe0c
#define OPENBIOS_MAC_OFFSET 0xc
void platform_init(void)
{
unsigned long end_of_ram = 0x8000000;
unsigned long avail_ram = end_of_ram - (unsigned long)_end;
simple_alloc_init(_end, avail_ram, 32, 64);
ebony_init((u8 *)OPENBIOS_MAC_BASE,
(u8 *)(OPENBIOS_MAC_BASE + OPENBIOS_MAC_OFFSET));
}
......@@ -163,20 +163,19 @@ fi
vmz="$vmz$gzip"
case "$platform" in
uboot|cuboot*)
version=`${CROSS}strings "$kernel" | grep '^Linux version [-0-9.]' | \
# Extract kernel version information, some platforms want to include
# it in the image header
version=`${CROSS}strings "$kernel" | grep '^Linux version [-0-9.]' | \
cut -d' ' -f3`
if [ -n "$version" ]; then
version="-n Linux-$version"
fi
esac
if [ -n "$version" ]; then
uboot_version="-n Linux-$version"
fi
case "$platform" in
uboot)
rm -f "$ofile"
mkimage -A ppc -O linux -T kernel -C gzip -a 00000000 -e 00000000 \
$version -d "$vmz" "$ofile"
$uboot_version -d "$vmz" "$ofile"
if [ -z "$cacheit" ]; then
rm -f "$vmz"
fi
......@@ -212,25 +211,32 @@ if [ "$platform" != "miboot" ]; then
rm $tmp
fi
# Some platforms need the zImage's entry point and base address
base=0x`${CROSS}nm "$ofile" | grep ' _start$' | cut -d' ' -f1`
entry=`${CROSS}objdump -f "$ofile" | grep '^start address ' | cut -d' ' -f3`
# post-processing needed for some platforms
case "$platform" in
pseries|chrp)
$object/addnote "$ofile"
;;
pmaccoff)
entry=`objdump -f "$ofile" | grep '^start address ' | \
cut -d' ' -f3`
${CROSS}objcopy -O aixcoff-rs6000 --set-start "$entry" "$ofile"
$object/hack-coff "$ofile"
;;
cuboot*)
base=`${CROSS}nm "$ofile" | grep ' _start$' | cut -d' ' -f1`
entry=`${CROSS}objdump -f "$ofile" | grep '^start address ' | \
cut -d' ' -f3`
mv "$ofile" "$ofile".elf
${CROSS}objcopy -O binary "$ofile".elf "$ofile".bin
gzip -f -9 "$ofile".bin
mkimage -A ppc -O linux -T kernel -C gzip -a "$base" -e "$entry" \
$version -d "$ofile".bin.gz "$ofile"
$uboot_version -d "$ofile".bin.gz "$ofile"
;;
treeboot*)
mv "$ofile" "$ofile.elf"
$object/mktree "$ofile.elf" "$ofile" "$base" "$entry"
if [ -z "$cacheit" ]; then
rm -f "$ofile.elf"
fi
exit 0
;;
esac
This diff is collapsed.
This diff is collapsed.
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20-rc5
# Tue Jan 30 14:27:25 2007
# Linux kernel version: 2.6.21-rc5
# Mon Apr 9 16:09:16 2007
#
# CONFIG_PPC64 is not set
CONFIG_PPC32=y
......@@ -34,9 +34,9 @@ CONFIG_DEFAULT_UIMAGE=y
CONFIG_PPC_83xx=y
# CONFIG_PPC_85xx is not set
# CONFIG_PPC_86xx is not set
# CONFIG_PPC_8xx is not set
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_8xx is not set
# CONFIG_E200 is not set
CONFIG_6xx=y
CONFIG_83xx=y
......@@ -63,6 +63,7 @@ CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
......@@ -71,6 +72,7 @@ CONFIG_SYSVIPC=y
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
......@@ -123,16 +125,17 @@ CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
CONFIG_QUICC_ENGINE=y
CONFIG_PPC_GEN550=y
# CONFIG_WANT_EARLY_SERIAL is not set
#
# Platform support
#
# CONFIG_MPC8313_RDB is not set
CONFIG_MPC832x_MDS=y
# CONFIG_MPC834x_SYS is not set
# CONFIG_MPC832x_RDB is not set
# CONFIG_MPC834x_MDS is not set
# CONFIG_MPC834x_ITX is not set
# CONFIG_MPC8360E_PB is not set
# CONFIG_MPC836x_MDS is not set
CONFIG_PPC_MPC832x=y
# CONFIG_MPIC is not set
......@@ -163,6 +166,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_PROC_DEVICETREE=y
# CONFIG_CMDLINE_BOOL is not set
# CONFIG_PM is not set
......@@ -172,6 +176,7 @@ CONFIG_ISA_DMA_API=y
#
# Bus options
#
CONFIG_ZONE_DMA=y
CONFIG_GENERIC_ISA_DMA=y
# CONFIG_MPIC_WEIRD is not set
# CONFIG_PPC_I8259 is not set
......@@ -220,6 +225,7 @@ CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
......@@ -324,6 +330,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Plug and Play support
#
# CONFIG_PNPACPI is not set
#
# Block devices
......@@ -342,7 +349,6 @@ CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=32768
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
......@@ -482,7 +488,21 @@ CONFIG_NETDEVICES=y
#
# PHY device support
#
# CONFIG_PHYLIB is not set
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
# CONFIG_MARVELL_PHY is not set
CONFIG_DAVICOM_PHY=y
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_ICPLUS_PHY is not set
# CONFIG_FIXED_PHY is not set
#
# Ethernet (10 or 100Mbit)
......@@ -524,11 +544,13 @@ CONFIG_UCC_GETH=y
# CONFIG_UGETH_FILTERING is not set
# CONFIG_UGETH_TX_ON_DEMOND is not set
# CONFIG_QLA3XXX is not set
# CONFIG_ATL1 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_CHELSIO_T1 is not set
# CONFIG_CHELSIO_T3 is not set
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
......@@ -621,6 +643,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
# CONFIG_SERIAL_OF_PLATFORM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
......@@ -691,6 +714,7 @@ CONFIG_I2C_MPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_OCORES is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PASEMI is not set
# CONFIG_I2C_PROSAVAGE is not set
# CONFIG_I2C_SAVAGE4 is not set
# CONFIG_I2C_SIS5595 is not set
......@@ -738,6 +762,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1029 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ASB100 is not set
......@@ -778,6 +803,11 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
......@@ -791,10 +821,9 @@ CONFIG_HWMON=y
#
# Graphics support
#
CONFIG_FIRMWARE_EDID=y
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_FB is not set
# CONFIG_FB_IBM_GXT4500 is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
......@@ -805,6 +834,7 @@ CONFIG_FIRMWARE_EDID=y
# HID Devices
#
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
#
# USB support
......@@ -868,6 +898,10 @@ CONFIG_USB_ARCH_HAS_EHCI=y
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
#
......@@ -995,11 +1029,7 @@ CONFIG_PARTITION_ADVANCED=y
# Distributed Lock Manager
#
# CONFIG_DLM is not set
#
# QE Options
#
CONFIG_UCC_SLOW=y
# CONFIG_UCC_SLOW is not set
CONFIG_UCC_FAST=y
CONFIG_UCC=y
......@@ -1012,7 +1042,8 @@ CONFIG_BITREVERSE=y
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_IOMAP_COPY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
#
# Instrumentation Support
......@@ -1032,7 +1063,6 @@ CONFIG_ENABLE_MUST_CHECK=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_BOOTX_TEXT is not set
# CONFIG_SERIAL_TEXT_DEBUG is not set
# CONFIG_PPC_EARLY_DEBUG is not set
#
......@@ -1061,8 +1091,10 @@ CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_LRW is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
......@@ -1076,6 +1108,7 @@ CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_TEST is not set
#
......
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.21-rc3
# Mon Mar 12 17:32:19 2007
# Linux kernel version: 2.6.21-rc5
# Mon Apr 9 16:12:43 2007
#
# CONFIG_PPC64 is not set
CONFIG_PPC32=y
......@@ -125,7 +125,6 @@ CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
CONFIG_QUICC_ENGINE=y
CONFIG_PPC_GEN550=y
# CONFIG_WANT_EARLY_SERIAL is not set
#
......@@ -490,7 +489,21 @@ CONFIG_NETDEVICES=y
#
# PHY device support
#
# CONFIG_PHYLIB is not set
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
# CONFIG_MARVELL_PHY is not set
# CONFIG_DAVICOM_PHY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
CONFIG_ICPLUS_PHY=y
# CONFIG_FIXED_PHY is not set
#
# Ethernet (10 or 100Mbit)
......@@ -1200,11 +1213,7 @@ CONFIG_NLS_ISO8859_1=y
# Distributed Lock Manager
#
# CONFIG_DLM is not set
#
# QE Options
#
CONFIG_UCC_SLOW=y
# CONFIG_UCC_SLOW is not set
CONFIG_UCC_FAST=y
CONFIG_UCC=y
......@@ -1238,7 +1247,6 @@ CONFIG_ENABLE_MUST_CHECK=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_BOOTX_TEXT is not set
# CONFIG_SERIAL_TEXT_DEBUG is not set
# CONFIG_PPC_EARLY_DEBUG is not set
#
......
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20
# Sat Feb 17 10:09:26 2007
# Linux kernel version: 2.6.21-rc5
# Mon Apr 9 16:14:05 2007
#
# CONFIG_PPC64 is not set
CONFIG_PPC32=y
......@@ -72,6 +72,7 @@ CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
......@@ -124,7 +125,6 @@ CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
CONFIG_QUICC_ENGINE=y
CONFIG_PPC_GEN550=y
# CONFIG_WANT_EARLY_SERIAL is not set
#
......@@ -132,6 +132,7 @@ CONFIG_PPC_GEN550=y
#
# CONFIG_MPC8313_RDB is not set
# CONFIG_MPC832x_MDS is not set
# CONFIG_MPC832x_RDB is not set
# CONFIG_MPC834x_MDS is not set
# CONFIG_MPC834x_ITX is not set
CONFIG_MPC836x_MDS=y
......@@ -328,6 +329,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# Plug and Play support
#
# CONFIG_PNPACPI is not set
#
# Block devices
......@@ -346,7 +348,6 @@ CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=32768
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
......@@ -486,7 +487,21 @@ CONFIG_NETDEVICES=y
#
# PHY device support
#
# CONFIG_PHYLIB is not set
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
CONFIG_MARVELL_PHY=y
# CONFIG_DAVICOM_PHY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_ICPLUS_PHY is not set
# CONFIG_FIXED_PHY is not set
#
# Ethernet (10 or 100Mbit)
......@@ -528,6 +543,7 @@ CONFIG_UCC_GETH=y
# CONFIG_UGETH_FILTERING is not set
# CONFIG_UGETH_TX_ON_DEMOND is not set
# CONFIG_QLA3XXX is not set
# CONFIG_ATL1 is not set
#
# Ethernet (10000 Mbit)
......@@ -745,6 +761,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1029 is not set
# CONFIG_SENSORS_ADM1031 is not set
# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ASB100 is not set
......@@ -785,6 +802,11 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_W83627EHF is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
......@@ -798,10 +820,9 @@ CONFIG_HWMON=y
#
# Graphics support
#
CONFIG_FIRMWARE_EDID=y
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_FB is not set
# CONFIG_FB_IBM_GXT4500 is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
......@@ -1007,11 +1028,7 @@ CONFIG_PARTITION_ADVANCED=y
# Distributed Lock Manager
#
# CONFIG_DLM is not set
#
# QE Options
#
CONFIG_UCC_SLOW=y
# CONFIG_UCC_SLOW is not set
CONFIG_UCC_FAST=y
CONFIG_UCC=y
......@@ -1045,7 +1062,6 @@ CONFIG_ENABLE_MUST_CHECK=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_BOOTX_TEXT is not set
# CONFIG_SERIAL_TEXT_DEBUG is not set
# CONFIG_PPC_EARLY_DEBUG is not set
#
......
This diff is collapsed.
......@@ -36,8 +36,9 @@ obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o
obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
obj-$(CONFIG_TAU) += tau_6xx.o
obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o suspend.o
obj32-$(CONFIG_SOFTWARE_SUSPEND) += swsusp_32.o
obj-$(CONFIG_SOFTWARE_SUSPEND) += suspend.o
obj64-$(CONFIG_SOFTWARE_SUSPEND) += swsusp_64.o swsusp_asm64.o
obj32-$(CONFIG_MODULES) += module_32.o
ifeq ($(CONFIG_PPC_MERGE),y)
......@@ -67,6 +68,7 @@ obj-$(CONFIG_MODULES) += $(module-y)
pci64-$(CONFIG_PPC64) += pci_64.o pci_dn.o
pci32-$(CONFIG_PPC32) := pci_32.o
obj-$(CONFIG_PCI) += $(pci64-y) $(pci32-y)
obj-$(CONFIG_PCI_MSI) += msi.o
kexec-$(CONFIG_PPC64) := machine_kexec_64.o
kexec-$(CONFIG_PPC32) := machine_kexec_32.o
obj-$(CONFIG_KEXEC) += machine_kexec.o crash.o $(kexec-y)
......
......@@ -21,12 +21,12 @@
#include <linux/types.h>
#include <linux/mman.h>
#include <linux/mm.h>
#include <linux/suspend.h>
#ifdef CONFIG_PPC64
#include <linux/time.h>
#include <linux/hardirq.h>
#else
#include <linux/ptrace.h>
#include <linux/suspend.h>
#endif
#include <asm/io.h>
......@@ -257,11 +257,11 @@ int main(void)
DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
#ifndef CONFIG_PPC64
DEFINE(pbe_address, offsetof(struct pbe, address));
DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
DEFINE(pbe_next, offsetof(struct pbe, next));
#ifndef CONFIG_PPC64
DEFINE(TASK_SIZE, TASK_SIZE);
DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
#endif /* ! CONFIG_PPC64 */
......
......@@ -120,8 +120,8 @@ skpinv: addi r4,r4,1 /* Increment */
* Configure and load pinned entry into TLB slot 63.
*/
lis r3,KERNELBASE@h /* Load the kernel virtual address */
ori r3,r3,KERNELBASE@l
lis r3,PAGE_OFFSET@h
ori r3,r3,PAGE_OFFSET@l
/* Kernel is at the base of RAM */
li r4, 0 /* Load the kernel physical address */
......@@ -172,36 +172,28 @@ skpinv: addi r4,r4,1 /* Increment */
isync
4:
#ifdef CONFIG_SERIAL_TEXT_DEBUG
/*
* Add temporary UART mapping for early debug.
* We can map UART registers wherever we want as long as they don't
* interfere with other system mappings (e.g. with pinned entries).
* For an example of how we handle this - see ocotea.h. --ebs
*/
#ifdef CONFIG_PPC_EARLY_DEBUG_44x
/* Add UART mapping for early debug. */
/* pageid fields */
lis r3,UART0_IO_BASE@h
ori r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_4K
lis r3,PPC44x_EARLY_DEBUG_VIRTADDR@h
ori r3,r3,PPC44x_TLB_VALID|PPC44x_TLB_TS|PPC44x_TLB_64K
/* xlat fields */
lis r4,UART0_PHYS_IO_BASE@h /* RPN depends on SoC */
#ifndef CONFIG_440EP
ori r4,r4,0x0001 /* ERPN is 1 for second 4GB page */
#endif
lis r4,CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW@h
ori r4,r4,CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH
/* attrib fields */
li r5,0
ori r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_I | PPC44x_TLB_G)
li r5,(PPC44x_TLB_SW|PPC44x_TLB_SR|PPC44x_TLB_I|PPC44x_TLB_G)
li r0,62 /* TLB slot 0 */
li r0,0 /* TLB slot 0 */
tlbwe r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */
tlbwe r4,r0,PPC44x_TLB_XLAT /* Load the translation fields */
tlbwe r5,r0,PPC44x_TLB_ATTRIB /* Load the attrib/access fields */
tlbwe r3,r0,PPC44x_TLB_PAGEID
tlbwe r4,r0,PPC44x_TLB_XLAT
tlbwe r5,r0,PPC44x_TLB_ATTRIB
/* Force context change */
isync
#endif /* CONFIG_SERIAL_TEXT_DEBUG */
#endif /* CONFIG_PPC_EARLY_DEBUG_44x */
/* Establish the interrupt vector offsets */
SET_IVOR(0, CriticalInput);
......@@ -709,16 +701,6 @@ _GLOBAL(giveup_fpu)
blr
#endif
/*
* extern void abort(void)
*
* At present, this routine just applies a system reset.
*/
_GLOBAL(abort)
mfspr r13,SPRN_DBCR0
oris r13,r13,DBCR0_RST_SYSTEM@h
mtspr SPRN_DBCR0,r13
_GLOBAL(set_context)
#ifdef CONFIG_BDI_SWITCH
......
......@@ -33,8 +33,11 @@
#include <asm/smp.h>
#ifdef CONFIG_HOTPLUG_CPU
/* this is used for software suspend, and that shuts down
* CPUs even while the system is still booting... */
#define cpu_should_die() (cpu_is_offline(smp_processor_id()) && \
system_state == SYSTEM_RUNNING)
(system_state == SYSTEM_RUNNING \
|| system_state == SYSTEM_BOOTING))
#else
#define cpu_should_die() 0
#endif
......
......@@ -53,3 +53,24 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
isync
b 1b
_GLOBAL(power4_cpu_offline_powersave)
/* Go to NAP now */
mfmsr r7
rldicl r0,r7,48,1
rotldi r0,r0,16
mtmsrd r0,1 /* hard-disable interrupts */
li r0,1
li r6,0
stb r0,PACAHARDIRQEN(r13) /* we'll hard-enable shortly */
stb r6,PACASOFTIRQEN(r13) /* soft-disable irqs */
BEGIN_FTR_SECTION
DSSALL
sync
END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
ori r7,r7,MSR_EE
oris r7,r7,MSR_POW@h
sync
isync
mtmsrd r7
isync
blr
......@@ -67,6 +67,7 @@
#ifdef CONFIG_PPC64
#include <asm/paca.h>
#include <asm/firmware.h>
#include <asm/lv1call.h>
#endif
int __irq_offset_value;
......@@ -162,6 +163,16 @@ void local_irq_restore(unsigned long en)
local_paca->hard_enabled = en;
if ((int)mfspr(SPRN_DEC) < 0)
mtspr(SPRN_DEC, 1);
/*
* Force the delivery of pending soft-disabled interrupts on PS3.
* Any HV call will have this side effect.
*/
if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
u64 tmp;
lv1_get_version_info(&tmp);
}
hard_irq_enable();
}
#endif /* CONFIG_PPC64 */
......@@ -947,33 +958,6 @@ arch_initcall(irq_late_init);
#endif /* CONFIG_PPC_MERGE */
#ifdef CONFIG_PCI_MSI
int pci_enable_msi(struct pci_dev * pdev)
{
if (ppc_md.enable_msi)
return ppc_md.enable_msi(pdev);
else
return -1;
}
EXPORT_SYMBOL(pci_enable_msi);
void pci_disable_msi(struct pci_dev * pdev)
{
if (ppc_md.disable_msi)
ppc_md.disable_msi(pdev);
}
EXPORT_SYMBOL(pci_disable_msi);
void pci_scan_msi_device(struct pci_dev *dev) {}
int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) {return -1;}
void pci_disable_msix(struct pci_dev *dev) {}
void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
void pci_no_msi(void) {}
EXPORT_SYMBOL(pci_enable_msix);
EXPORT_SYMBOL(pci_disable_msix);
#endif
#ifdef CONFIG_PPC64
static int __init setup_noirqdistrib(char *str)
{
......
......@@ -401,7 +401,7 @@ out:
return 1;
}
static int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
{
struct kprobe *cur = kprobe_running();
struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
......@@ -486,14 +486,6 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
if (post_kprobe_handler(args->regs))
ret = NOTIFY_STOP;
break;
case DIE_PAGE_FAULT:
/* kprobe_running() needs smp_processor_id() */
preempt_disable();
if (kprobe_running() &&
kprobe_fault_handler(args->regs, args->trapnr))
ret = NOTIFY_STOP;
preempt_enable();
break;
default:
break;
}
......
......@@ -244,9 +244,9 @@ static int __init add_legacy_pci_port(struct device_node *np,
* doesn't work for these settings, you'll have to add your own special
* cases here
*/
if (device_is_compatible(pci_dev, "pci13a8,152") ||
device_is_compatible(pci_dev, "pci13a8,154") ||
device_is_compatible(pci_dev, "pci13a8,158")) {
if (of_device_is_compatible(pci_dev, "pci13a8,152") ||
of_device_is_compatible(pci_dev, "pci13a8,154") ||
of_device_is_compatible(pci_dev, "pci13a8,158")) {
addr += 0x200 * lindex;
base += 0x200 * lindex;
} else {
......@@ -365,11 +365,11 @@ void __init find_legacy_serial_ports(void)
/* Check for known pciclass, and also check wether we have
* a device with child nodes for ports or not
*/
if (device_is_compatible(np, "pciclass,0700") ||
device_is_compatible(np, "pciclass,070002"))
if (of_device_is_compatible(np, "pciclass,0700") ||
of_device_is_compatible(np, "pciclass,070002"))
pci = np;
else if (device_is_compatible(parent, "pciclass,0700") ||
device_is_compatible(parent, "pciclass,070002"))
else if (of_device_is_compatible(parent, "pciclass,0700") ||
of_device_is_compatible(parent, "pciclass,070002"))
pci = parent;
else {
of_node_put(parent);
......
/*
* Copyright 2006-2007, Michael Ellerman, IBM Corporation.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/msi.h>
#include <asm/machdep.h>
int arch_msi_check_device(struct pci_dev* dev, int nvec, int type)
{
if (!ppc_md.setup_msi_irqs || !ppc_md.teardown_msi_irqs) {
pr_debug("msi: Platform doesn't provide MSI callbacks.\n");
return -ENOSYS;
}
if (ppc_md.msi_check_device) {
pr_debug("msi: Using platform check routine.\n");
return ppc_md.msi_check_device(dev, nvec, type);
}
return 0;
}
int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
return ppc_md.setup_msi_irqs(dev, nvec, type);
}
void arch_teardown_msi_irqs(struct pci_dev *dev)
{
return ppc_md.teardown_msi_irqs(dev);
}
......@@ -27,7 +27,7 @@ const struct of_device_id *of_match_node(const struct of_device_id *matches,
match &= node->type
&& !strcmp(matches->type, node->type);
if (matches->compatible[0])
match &= device_is_compatible(node,
match &= of_device_is_compatible(node,
matches->compatible);
if (match)
return matches;
......@@ -120,7 +120,7 @@ void of_device_unregister(struct of_device *ofdev)
}
static ssize_t of_device_get_modalias(struct of_device *ofdev,
ssize_t of_device_get_modalias(struct of_device *ofdev,
char *str, ssize_t len)
{
const char *compat;
......@@ -239,3 +239,4 @@ EXPORT_SYMBOL(of_dev_get);
EXPORT_SYMBOL(of_dev_put);
EXPORT_SYMBOL(of_release_dev);
EXPORT_SYMBOL(of_device_uevent);
EXPORT_SYMBOL(of_device_get_modalias);
......@@ -29,7 +29,6 @@
#include <asm/ppc-pci.h>
#include <asm/atomic.h>
/*
* The list of OF IDs below is used for matching bus types in the
* system whose devices are to be exposed as of_platform_devices.
......
......@@ -1658,7 +1658,7 @@ pgprot_t pci_phys_mem_access_prot(struct file *file,
int i;
if (page_is_ram(pfn))
return prot;
return __pgprot(prot);
prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
......
......@@ -1006,8 +1006,9 @@ void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
switch ((pci_space >> 24) & 0x3) {
case 1: /* I/O space */
hose->io_base_phys = cpu_phys_addr;
hose->pci_io_size = size;
hose->io_base_phys = cpu_phys_addr - pci_addr;
/* handle from 0 to top of I/O window */
hose->pci_io_size = pci_addr + size;
res = &hose->io_resource;
res->flags = IORESOURCE_IO;
......@@ -1117,8 +1118,8 @@ static int get_bus_io_range(struct pci_bus *bus, unsigned long *start_phys,
} else {
/* Root Bus */
res = &hose->io_resource;
*start_phys = hose->io_base_phys;
*start_virt = (unsigned long) hose->io_base_virt;
*start_phys = hose->io_base_phys + res->start;
*start_virt = (unsigned long) hose->io_base_virt + res->start;
if (res->end > res->start)
*size = res->end - res->start + 1;
else {
......
......@@ -66,7 +66,6 @@ EXPORT_SYMBOL(clear_pages);
EXPORT_SYMBOL(ISA_DMA_THRESHOLD);
EXPORT_SYMBOL(DMA_MODE_READ);
EXPORT_SYMBOL(DMA_MODE_WRITE);
EXPORT_SYMBOL(__div64_32);
EXPORT_SYMBOL(do_signal);
EXPORT_SYMBOL(transfer_to_handler);
......
......@@ -635,6 +635,12 @@ static void __init early_cmdline_parse(void)
/* ibm,dynamic-reconfiguration-memory property supported */
#define OV5_DRCONF_MEMORY 0x20
#define OV5_LARGE_PAGES 0x10 /* large pages supported */
/* PCIe/MSI support. Without MSI full PCIe is not supported */
#ifdef CONFIG_PCI_MSI
#define OV5_MSI 0x01 /* PCIe/MSI support */
#else
#define OV5_MSI 0x00
#endif /* CONFIG_PCI_MSI */
/*
* The architecture vector has an array of PVR mask/value pairs,
......@@ -679,7 +685,7 @@ static unsigned char ibm_architecture_vec[] = {
/* option vector 5: PAPR/OF options */
3 - 2, /* length */
0, /* don't ignore, don't halt */
OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY,
OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY | OV5_MSI,
};
/* Old method - ELF header with PT_NOTE sections */
......@@ -967,7 +973,7 @@ static unsigned long __init prom_next_cell(int s, cell_t **cellp)
* If problems seem to show up, it would be a good start to track
* them down.
*/
static void reserve_mem(u64 base, u64 size)
static void __init reserve_mem(u64 base, u64 size)
{
u64 top = base + size;
unsigned long cnt = RELOC(mem_reserve_cnt);
......@@ -2153,7 +2159,7 @@ static void __init fixup_device_tree_efika(void)
3,12,0, 3,13,0, 3,14,0, 3,15,0 };
struct subst_entry efika_subst_table[] = {
{ "/", "device_type", prop_cstr("efika") },
{ "/builtin", "compatible", prop_cstr("soc") },
{ "/builtin", "device_type", prop_cstr("soc") },
{ "/builtin/ata", "compatible", prop_cstr("mpc5200b-ata\0mpc5200-ata"), },
{ "/builtin/bestcomm", "compatible", prop_cstr("mpc5200b-bestcomm\0mpc5200-bestcomm") },
{ "/builtin/bestcomm", "interrupts", prop_bcomm_irq, sizeof(prop_bcomm_irq) },
......
......@@ -1042,3 +1042,28 @@ const void *of_get_mac_address(struct device_node *np)
}
EXPORT_SYMBOL(of_get_mac_address);
int of_irq_to_resource(struct device_node *dev, int index, struct resource *r)
{
int irq = irq_of_parse_and_map(dev, index);
/* Only dereference the resource if both the
* resource and the irq are valid. */
if (r && irq != NO_IRQ) {
r->start = r->end = irq;
r->flags = IORESOURCE_IRQ;
}
return irq;
}
EXPORT_SYMBOL_GPL(of_irq_to_resource);
void __iomem *of_iomap(struct device_node *np, int index)
{
struct resource res;
if (of_address_to_resource(np, index, &res))
return NULL;
return ioremap(res.start, 1 + res.end - res.start);
}
EXPORT_SYMBOL(of_iomap);
......@@ -176,10 +176,10 @@ static struct call_data_struct {
#define SMP_CALL_TIMEOUT 8
/*
* This function sends a 'generic call function' IPI to all other CPUs
* in the system.
* These functions send a 'generic call function' IPI to other online
* CPUS in the system.
*
* [SUMMARY] Run a function on all other CPUs.
* [SUMMARY] Run a function on other CPUs.
* <func> The function to run. This must be fast and non-blocking.
* <info> An arbitrary pointer to pass to the function.
* <nonatomic> currently unused.
......@@ -190,18 +190,26 @@ static struct call_data_struct {
* You must not call this function with disabled interrupts or from a
* hardware interrupt handler or from a bottom half handler.
*/
int smp_call_function (void (*func) (void *info), void *info, int nonatomic,
int wait)
int smp_call_function_map(void (*func) (void *info), void *info, int nonatomic,
int wait, cpumask_t map)
{
struct call_data_struct data;
int ret = -1, cpus;
int ret = -1, num_cpus;
int cpu;
u64 timeout;
/* Can deadlock when called with interrupts disabled */
WARN_ON(irqs_disabled());
/* remove 'self' from the map */
if (cpu_isset(smp_processor_id(), map))
cpu_clear(smp_processor_id(), map);
/* sanity check the map, remove any non-online processors. */
cpus_and(map, map, cpu_online_map);
if (unlikely(smp_ops == NULL))
return -1;
return ret;
data.func = func;
data.info = info;
......@@ -213,21 +221,22 @@ int smp_call_function (void (*func) (void *info), void *info, int nonatomic,
spin_lock(&call_lock);
/* Must grab online cpu count with preempt disabled, otherwise
* it can change. */
cpus = num_online_cpus() - 1;
if (!cpus) {
num_cpus = num_online_cpus() - 1;
if (!num_cpus || cpus_empty(map)) {
ret = 0;
goto out;
}
call_data = &data;
smp_wmb();
/* Send a message to all other CPUs and wait for them to respond */
smp_ops->message_pass(MSG_ALL_BUT_SELF, PPC_MSG_CALL_FUNCTION);
/* Send a message to all CPUs in the map */
for_each_cpu_mask(cpu, map)
smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNCTION);
timeout = get_tb() + (u64) SMP_CALL_TIMEOUT * tb_ticks_per_sec;
/* Wait for response */
while (atomic_read(&data.started) != cpus) {
/* Wait for indication that they have received the message */
while (atomic_read(&data.started) != num_cpus) {
HMT_low();
if (get_tb() >= timeout) {
printk("smp_call_function on cpu %d: other cpus not "
......@@ -238,8 +247,9 @@ int smp_call_function (void (*func) (void *info), void *info, int nonatomic,
}
}
/* optionally wait for the CPUs to complete */
if (wait) {
while (atomic_read(&data.finished) != cpus) {
while (atomic_read(&data.finished) != num_cpus) {
HMT_low();
if (get_tb() >= timeout) {
printk("smp_call_function on cpu %d: other "
......@@ -262,8 +272,29 @@ int smp_call_function (void (*func) (void *info), void *info, int nonatomic,
return ret;
}
int smp_call_function(void (*func) (void *info), void *info, int nonatomic,
int wait)
{
return smp_call_function_map(func,info,nonatomic,wait,cpu_online_map);
}
EXPORT_SYMBOL(smp_call_function);
int smp_call_function_single(int cpu, void (*func) (void *info), void *info, int nonatomic,
int wait)
{
cpumask_t map=CPU_MASK_NONE;
if (!cpu_online(cpu))
return -EINVAL;
if (cpu == smp_processor_id())
return -EBUSY;
cpu_set(cpu, map);
return smp_call_function_map(func,info,nonatomic,wait,map);
}
EXPORT_SYMBOL(smp_call_function_single);
void smp_call_function_interrupt(void)
{
void (*func) (void *info);
......
/*
* Common powerpc suspend code for 32 and 64 bits
*
* Copyright 2007 Johannes Berg <johannes@sipsolutions.net>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/sched.h>
#include <asm/suspend.h>
#include <asm/system.h>
#include <asm/current.h>
#include <asm/mmu_context.h>
void save_processor_state(void)
{
/*
* flush out all the special registers so we don't need
* to save them in the snapshot
*/
flush_fp_to_thread(current);
flush_altivec_to_thread(current);
flush_spe_to_thread(current);
#ifdef CONFIG_PPC64
hard_irq_disable();
#endif
}
void restore_processor_state(void)
{
#ifdef CONFIG_PPC32
set_context(current->active_mm->context.id, current->active_mm->pgd);
#endif
#ifdef CONFIG_PPC64
hard_irq_enable();
#endif
}
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......@@ -499,4 +499,4 @@ static int __init topology_init(void)
return 0;
}
__initcall(topology_init);
subsys_initcall(topology_init);
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obj-$(CONFIG_44x) := misc_44x.o
obj-$(CONFIG_EBONY) += ebony.o
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