Commit dc6056cd authored by Kevin Hilman's avatar Kevin Hilman Committed by James Toy

The 3430SDP uses the same panel as the 2430SDP. The main difference are

in the GPIO lines used for panel enable and backlight, and the VAUX
register/commands sent to the TWL4030 power subsystem.

Also, some misc. whitespace cleanups.
Fixed-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarKevin Hilman <khilman@mvsita.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarImre Deak <imre.deak@nokia.com>
Acked-by: default avatarKrzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
parent 7d40bfb0
...@@ -1313,8 +1313,33 @@ CONFIG_DVB_ISL6421=m ...@@ -1313,8 +1313,33 @@ CONFIG_DVB_ISL6421=m
# Graphics support # Graphics support
# #
# CONFIG_VGASTATE is not set # CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set CONFIG_FB=y
# CONFIG_FB is not set # CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB_DDC is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_COPYAREA is not set
# CONFIG_FB_SYS_IMAGEBLIT is not set
# CONFIG_FB_FOREIGN_ENDIAN is not set
# CONFIG_FB_SYS_FOPS is not set
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
#
# Frame buffer hardware drivers
#
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_VIRTUAL is not set
CONFIG_FB_OMAP=y
# CONFIG_FB_OMAP_LCDC_EXTERNAL is not set
# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set
CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# #
...@@ -1331,6 +1356,16 @@ CONFIG_DISPLAY_SUPPORT=y ...@@ -1331,6 +1356,16 @@ CONFIG_DISPLAY_SUPPORT=y
# #
# CONFIG_VGA_CONSOLE is not set # CONFIG_VGA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y CONFIG_DUMMY_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
# CONFIG_FONTS is not set
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_MONO=y
CONFIG_LOGO_LINUX_VGA16=y
CONFIG_LOGO_LINUX_CLUT224=y
CONFIG_SOUND=y CONFIG_SOUND=y
CONFIG_SOUND_OSS_CORE=y CONFIG_SOUND_OSS_CORE=y
CONFIG_SND=y CONFIG_SND=y
......
...@@ -8,6 +8,7 @@ objs-yy := omapfb_main.o ...@@ -8,6 +8,7 @@ objs-yy := omapfb_main.o
objs-y$(CONFIG_ARCH_OMAP1) += lcdc.o objs-y$(CONFIG_ARCH_OMAP1) += lcdc.o
objs-y$(CONFIG_ARCH_OMAP2) += dispc.o objs-y$(CONFIG_ARCH_OMAP2) += dispc.o
objs-y$(CONFIG_ARCH_OMAP3) += dispc.o
objs-$(CONFIG_ARCH_OMAP1)$(CONFIG_FB_OMAP_LCDC_EXTERNAL) += sossi.o objs-$(CONFIG_ARCH_OMAP1)$(CONFIG_FB_OMAP_LCDC_EXTERNAL) += sossi.o
objs-$(CONFIG_ARCH_OMAP2)$(CONFIG_FB_OMAP_LCDC_EXTERNAL) += rfbi.o objs-$(CONFIG_ARCH_OMAP2)$(CONFIG_FB_OMAP_LCDC_EXTERNAL) += rfbi.o
...@@ -27,6 +28,7 @@ objs-y$(CONFIG_MACH_OMAP_OSK) += lcd_osk.o ...@@ -27,6 +28,7 @@ objs-y$(CONFIG_MACH_OMAP_OSK) += lcd_osk.o
objs-y$(CONFIG_MACH_OMAP_APOLLON) += lcd_apollon.o objs-y$(CONFIG_MACH_OMAP_APOLLON) += lcd_apollon.o
objs-y$(CONFIG_MACH_OMAP_2430SDP) += lcd_2430sdp.o objs-y$(CONFIG_MACH_OMAP_2430SDP) += lcd_2430sdp.o
objs-y$(CONFIG_MACH_OMAP_3430SDP) += lcd_2430sdp.o
objs-y$(CONFIG_MACH_OMAP2EVM) += lcd_omap2evm.o objs-y$(CONFIG_MACH_OMAP2EVM) += lcd_omap2evm.o
objs-y$(CONFIG_FB_OMAP_LCD_MIPID) += lcd_mipid.o objs-y$(CONFIG_FB_OMAP_LCD_MIPID) += lcd_mipid.o
......
...@@ -39,13 +39,17 @@ ...@@ -39,13 +39,17 @@
static unsigned backlight_gpio; static unsigned backlight_gpio;
static unsigned enable_gpio; static unsigned enable_gpio;
#define LCD_PANEL_BACKLIGHT_GPIO 91
#define LCD_PANEL_ENABLE_GPIO 154
#define LCD_PIXCLOCK_MAX 5400 /* freq 5.4 MHz */ #define LCD_PIXCLOCK_MAX 5400 /* freq 5.4 MHz */
#define PM_RECEIVER TWL4030_MODULE_PM_RECEIVER #define PM_RECEIVER TWL4030_MODULE_PM_RECEIVER
#define ENABLE_VAUX2_DEDICATED 0x09 #define ENABLE_VAUX2_DEDICATED 0x09
#define ENABLE_VAUX2_DEV_GRP 0x20 #define ENABLE_VAUX2_DEV_GRP 0x20
#define ENABLE_VAUX3_DEDICATED 0x03
#define ENABLE_VAUX3_DEV_GRP 0x20
#define ENABLE_VPLL2_DEDICATED 0x05
#define ENABLE_VPLL2_DEV_GRP 0xE0
#define TWL4030_VPLL2_DEV_GRP 0x33
#define TWL4030_VPLL2_DEDICATED 0x36
#define t2_out(c, r, v) twl4030_i2c_write_u8(c, r, v) #define t2_out(c, r, v) twl4030_i2c_write_u8(c, r, v)
......
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