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linux
linux-davinci
Commits
d7487421
Commit
d7487421
authored
Dec 11, 2006
by
Francois Romieu
Committed by
Jeff Garzik
Feb 05, 2007
Browse files
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Plain Diff
chelsio: useless curly braces
Signed-off-by:
Francois Romieu
<
romieu@fr.zoreil.com
>
parent
356bd146
Changes
4
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4 changed files
with
5 additions
and
8 deletions
+5
-8
drivers/net/chelsio/cxgb2.c
drivers/net/chelsio/cxgb2.c
+1
-2
drivers/net/chelsio/mv88e1xxx.c
drivers/net/chelsio/mv88e1xxx.c
+2
-2
drivers/net/chelsio/sge.c
drivers/net/chelsio/sge.c
+1
-2
drivers/net/chelsio/vsc7326.c
drivers/net/chelsio/vsc7326.c
+1
-2
No files found.
drivers/net/chelsio/cxgb2.c
View file @
d7487421
...
...
@@ -1292,9 +1292,8 @@ static int t1_clock(struct adapter *adapter, int mode)
if
(
!
t1_is_T1B
(
adapter
))
return
-
ENODEV
;
/* Can't re-clock this chip. */
if
(
mode
&
2
)
{
if
(
mode
&
2
)
return
0
;
/* show current mode. */
}
if
((
adapter
->
t1powersave
&
1
)
==
(
mode
&
1
))
return
-
EALREADY
;
/* ASIC already running in mode. */
...
...
drivers/net/chelsio/mv88e1xxx.c
View file @
d7487421
...
...
@@ -312,9 +312,9 @@ static int mv88e1xxx_interrupt_handler(struct cphy *cphy)
(
void
)
simple_mdio_read
(
cphy
,
MV88E1XXX_SPECIFIC_STATUS_REGISTER
,
&
status
);
if
(
status
&
MV88E1XXX_INTR_LINK_CHNG
)
{
if
(
status
&
MV88E1XXX_INTR_LINK_CHNG
)
cphy
->
state
|=
PHY_LINK_UP
;
}
else
{
else
{
cphy
->
state
&=
~
PHY_LINK_UP
;
if
(
cphy
->
state
&
PHY_AUTONEG_EN
)
cphy
->
state
&=
~
PHY_AUTONEG_RDY
;
...
...
drivers/net/chelsio/sge.c
View file @
d7487421
...
...
@@ -2195,9 +2195,8 @@ struct sge * __devinit t1_sge_create(struct adapter *adapter,
if
(
adapter
->
params
.
nports
>
1
)
{
tx_sched_init
(
sge
);
sge
->
espibug_timer
.
function
=
espibug_workaround_t204
;
}
else
{
}
else
sge
->
espibug_timer
.
function
=
espibug_workaround
;
}
sge
->
espibug_timer
.
data
=
(
unsigned
long
)
sge
->
adapter
;
sge
->
espibug_timeout
=
1
;
...
...
drivers/net/chelsio/vsc7326.c
View file @
d7487421
...
...
@@ -226,10 +226,9 @@ static void run_table(adapter_t *adapter, struct init_table *ib, int len)
if
(
ib
[
i
].
addr
==
INITBLOCK_SLEEP
)
{
udelay
(
ib
[
i
].
data
);
CH_ERR
(
"sleep %d us
\n
"
,
ib
[
i
].
data
);
}
else
{
}
else
vsc_write
(
adapter
,
ib
[
i
].
addr
,
ib
[
i
].
data
);
}
}
}
static
int
bist_rd
(
adapter_t
*
adapter
,
int
moduleid
,
int
address
)
...
...
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