Staging: sep: Upstream revision 3 of the security processor kernel driver

Upstream revision 3 of the security processor kernel driver;
now located in drivers/staging

This revision adds an initial TODO file

This driver no longer requires to have the firmware compiled in
it with the CONFIG_EXTRA_FIRMWARE configuration option.

Furthermore, we now have the right to distribute the firmware
binaries.

This is the Linux kernel driver for the Security Processor, which is
a hardware device the provides cryptographic, secure storage, and
key management services.

Please be aware that this patch does not contain any encryption
algorithm. It only transports data to and from user space
applications to the security processor.
Signed-off-by: Mark Allyn <mark.a.allyn@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

drivers/staging/Kconfig

@@ -135,5 +135,7 @@ source "drivers/staging/hv/Kconfig"
 
 source "drivers/staging/vme/Kconfig"
 
+source "drivers/staging/sep/Kconfig"
+
 endif # !STAGING_EXCLUDE_BUILD
 endif # STAGING

drivers/staging/Makefile

@@ -49,3 +49,4 @@ obj-$(CONFIG_USB_CPC)		+= cpc-usb/
 obj-$(CONFIG_FB_UDL)		+= udlfb/
 obj-$(CONFIG_HYPERV)		+= hv/
 obj-$(CONFIG_VME_BUS)		+= vme/
+obj-$(CONFIG_DX_SEP)		+= sep/

drivers/staging/sep/Kconfig

+config DX_SEP
+	tristate "Discretix SEP driver"
+	depends on MRST
+	default y
+	help
+	  Discretix SEP driver
+
+	  If unsure say M. The compiled module will be
+	  called sep_driver.ko

drivers/staging/sep/Makefile

+EXTRA_CFLAGS += -DLITTLE__ENDIAN -DDX_CC5_SEP_PLAT -DCRYS_NO_EXT_IF_MODE_SUPPORT
+obj-$(CONFIG_DX_SEP) := sep_driver.o
+sep_driver-objs := sep_main_mod.o sep_ext_with_pci_driver.o

drivers/staging/sep/TODO

+Todo's so far (from Alan Cox)
+- Fix firmware loading
+- Get firmware into firmware git tree
+- Review and tidy each algorithm function
+- Check whether it can be plugged into any of the kernel crypto API
+  interfaces
+- Do something about the magic shared memory interface and replace it
+  with something saner (in Linux terms)

drivers/staging/sep/sep_driver_api.h

+/*
+ *
+ *  sep_driver_api.h - Security Processor Driver api definitions
+ *
+ *  Copyright(c) 2009 Intel Corporation. All rights reserved.
+ *  Copyright(c) 2009 Discretix. All rights reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the Free
+ *  Software Foundation; either version 2 of the License, or (at your option)
+ *  any later version.
+ *
+ *  This program is distributed in the hope that it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ *  more details.
+ *
+ *  You should have received a copy of the GNU General Public License along with
+ *  this program; if not, write to the Free Software Foundation, Inc., 59
+ *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ *
+ *  CONTACTS:
+ *
+ *  Mark Allyn		mark.a.allyn@intel.com
+ *
+ *  CHANGES:
+ *
+ *  2009.06.26	Initial publish
+ *
+ */
+
+#ifndef __SEP_DRIVER_API_H__
+#define __SEP_DRIVER_API_H__
+
+
+
+/*----------------------------------------------------------------
+  IOCTL command defines
+  -----------------------------------------------------------------*/
+
+/* magic number 1 of the sep IOCTL command */
+#define SEP_IOC_MAGIC_NUMBER                           's'
+
+/* sends interrupt to sep that message is ready */
+#define SEP_IOCSENDSEPCOMMAND                 _IO(SEP_IOC_MAGIC_NUMBER , 0)
+
+/* sends interrupt to sep that message is ready */
+#define SEP_IOCSENDSEPRPLYCOMMAND             _IO(SEP_IOC_MAGIC_NUMBER , 1)
+
+/* allocate memory in data pool */
+#define SEP_IOCALLOCDATAPOLL                  _IO(SEP_IOC_MAGIC_NUMBER , 2)
+
+/* write to pre-allocated  memory in data pool */
+#define SEP_IOCWRITEDATAPOLL                  _IO(SEP_IOC_MAGIC_NUMBER , 3)
+
+/* read from  pre-allocated  memory in data pool */
+#define SEP_IOCREADDATAPOLL                   _IO(SEP_IOC_MAGIC_NUMBER , 4)
+
+/* create sym dma lli tables */
+#define SEP_IOCCREATESYMDMATABLE              _IO(SEP_IOC_MAGIC_NUMBER , 5)
+
+/* create flow dma lli tables */
+#define SEP_IOCCREATEFLOWDMATABLE             _IO(SEP_IOC_MAGIC_NUMBER , 6)
+
+/* free dynamic data aalocated during table creation */
+#define SEP_IOCFREEDMATABLEDATA                _IO(SEP_IOC_MAGIC_NUMBER , 7)
+
+/* get the static pool area addersses (physical and virtual) */
+#define SEP_IOCGETSTATICPOOLADDR               _IO(SEP_IOC_MAGIC_NUMBER , 8)
+
+/* set flow id command */
+#define SEP_IOCSETFLOWID                       _IO(SEP_IOC_MAGIC_NUMBER , 9)
+
+/* add tables to the dynamic flow */
+#define SEP_IOCADDFLOWTABLE                    _IO(SEP_IOC_MAGIC_NUMBER , 10)
+
+/* add flow add tables message */
+#define SEP_IOCADDFLOWMESSAGE                  _IO(SEP_IOC_MAGIC_NUMBER , 11)
+
+/* start sep command */
+#define SEP_IOCSEPSTART                        _IO(SEP_IOC_MAGIC_NUMBER , 12)
+
+/* init sep command */
+#define SEP_IOCSEPINIT                         _IO(SEP_IOC_MAGIC_NUMBER , 13)
+
+/* set non blocking mode */
+#define SEP_IOCSETAPIMODE                      _IO(SEP_IOC_MAGIC_NUMBER , 14)
+
+/* end transaction command */
+#define SEP_IOCENDTRANSACTION                  _IO(SEP_IOC_MAGIC_NUMBER , 15)
+
+/* reallocate cache and resident */
+#define SEP_IOCREALLOCCACHERES                 _IO(SEP_IOC_MAGIC_NUMBER , 16)
+
+/* get the offset of the address starting from the beginnnig of the map area */
+#define SEP_IOCGETMAPPEDADDROFFSET             _IO(SEP_IOC_MAGIC_NUMBER , 17)
+
+/* get time address and value */
+#define SEP_IOCGETIME                          _IO(SEP_IOC_MAGIC_NUMBER , 19)
+
+/*-------------------------------------------
+    TYPEDEFS
+----------------------------------------------*/
+
+/*
+  init command struct
+*/
+struct sep_driver_init_t {
+  /* start of the 1G of the host memory address that SEP can access */
+  unsigned long   message_addr;
+
+  /* start address of resident */
+  unsigned long   message_size_in_words;
+
+};
+
+
+/*
+  realloc cache resident command
+*/
+struct sep_driver_realloc_cache_resident_t {
+  /* base address */
+  unsigned long   base_addr;
+
+  /* current cache address */
+  unsigned long   cache_addr;
+
+  /* cache size in bytes*/
+  unsigned long   cache_size_in_bytes;
+
+  /* current resident address */
+  unsigned long   resident_addr;
+
+  /* resident size in bytes*/
+  unsigned long   resident_size_in_bytes;
+
+  /* new cache address */
+  unsigned long   new_cache_addr;
+
+  /* new resident address */
+  unsigned long   new_resident_addr;
+
+  /* new resident address */
+  unsigned long   new_shared_area_addr;
+
+  /* new base address */
+  unsigned long   new_base_addr;
+};
+
+/*
+  set api mode command struct
+*/
+struct sep_driver_set_api_mode_t {
+  /* mode to set - 1 - blocking, 0 - non-blocking */
+  unsigned long   mode;
+};
+
+struct sep_driver_alloc_t {
+  /* virtual address of allocated space */
+  unsigned long offset;
+
+  /* physical address of allocated space */
+  unsigned long phys_address;
+
+  /* number of bytes to allocate */
+  unsigned long num_bytes;
+};
+
+/*
+ */
+struct sep_driver_write_t {
+  /* application space address */
+  unsigned long app_address;
+
+  /* address of the data pool */
+  unsigned long datapool_address;
+
+  /* number of bytes to write */
+  unsigned long num_bytes;
+};
+
+/*
+ */
+struct sep_driver_read_t {
+  /* application space address */
+  unsigned long app_address;
+
+  /* address of the data pool */
+  unsigned long datapool_address;
+
+  /* number of bytes to read */
+  unsigned long num_bytes;
+};
+
+/*
+*/
+struct sep_driver_build_sync_table_t {
+  /* address value of the data in */
+  unsigned long  app_in_address;
+
+  /* size of data in */
+  unsigned long  data_in_size;
+
+  /* address of the data out */
+  unsigned long  app_out_address;
+
+  /* the size of the block of the operation - if needed,
+  every table will be modulo this parameter */
+  unsigned long  block_size;
+
+  /* the physical address of the first input DMA table */
+  unsigned long  in_table_address;
+
+  /* number of entries in the first input DMA table */
+  unsigned long  in_table_num_entries;
+
+  /* the physical address of the first output DMA table */
+  unsigned long  out_table_address;
+
+  /* number of entries in the first output DMA table */
+  unsigned long  out_table_num_entries;
+
+  /* data in the first input table */
+  unsigned long  table_data_size;
+
+  /* distinct user/kernel layout */
+  bool isKernelVirtualAddress;
+
+};
+
+/*
+*/
+struct sep_driver_build_flow_table_t {
+  /* flow type */
+  unsigned long  flow_type;
+
+  /* flag for input output */
+  unsigned long  input_output_flag;
+
+  /* address value of the data in */
+  unsigned long  virt_buff_data_addr;
+
+  /* size of data in */
+  unsigned long  num_virtual_buffers;
+
+  /* the physical address of the first input DMA table */
+  unsigned long  first_table_addr;
+
+  /* number of entries in the first input DMA table */
+  unsigned long  first_table_num_entries;
+
+  /* data in the first input table */
+  unsigned long  first_table_data_size;
+
+  /* distinct user/kernel layout */
+  bool isKernelVirtualAddress;
+};
+
+
+struct sep_driver_add_flow_table_t {
+  /* flow id  */
+  unsigned long  flow_id;
+
+  /* flag for input output */
+  unsigned long  inputOutputFlag;
+
+  /* address value of the data in */
+  unsigned long  virt_buff_data_addr;
+
+  /* size of data in */
+  unsigned long  num_virtual_buffers;
+
+  /* address of the first table */
+  unsigned long  first_table_addr;
+
+  /* number of entries in the first table */
+  unsigned long  first_table_num_entries;
+
+  /* data size of the first table */
+  unsigned long  first_table_data_size;
+
+  /* distinct user/kernel layout */
+  bool isKernelVirtualAddress;
+
+};
+
+/*
+  command struct for set flow id
+*/
+struct sep_driver_set_flow_id_t {
+  /* flow id to set */
+  unsigned long  flow_id;
+};
+
+
+/* command struct for add tables message */
+struct sep_driver_add_message_t {
+  /* flow id to set */
+  unsigned long   flow_id;
+
+  /* message size in bytes */
+  unsigned long   message_size_in_bytes;
+
+  /* address of the message */
+  unsigned long   message_address;
+};
+
+/* command struct for static pool addresses  */
+struct sep_driver_static_pool_addr_t {
+  /* physical address of the static pool */
+  unsigned long   physical_static_address;
+
+  /* virtual address of the static pool */
+  unsigned long   virtual_static_address;
+};
+
+/* command struct for getiing offset of the physical address from
+	the start of the mapped area  */
+struct sep_driver_get_mapped_offset_t {
+  /* physical address of the static pool */
+  unsigned long   physical_address;
+
+  /* virtual address of the static pool */
+  unsigned long   offset;
+};
+
+/* command struct for getting time value and address */
+struct sep_driver_get_time_t {
+  /* physical address of stored time */
+  unsigned long   time_physical_address;
+
+  /* value of the stored time */
+  unsigned long   time_value;
+};
+
+
+/*
+  structure that represent one entry in the DMA LLI table
+*/
+struct sep_lli_entry_t {
+  /* physical address */
+  unsigned long  physical_address;
+
+  /* block size */
+  unsigned long  block_size;
+};
+
+/*
+  structure that reperesents data needed for lli table construction
+*/
+struct sep_lli_prepare_table_data_t {
+  /* pointer to the memory where the first lli entry to be built */
+  struct sep_lli_entry_t  *lli_entry_ptr;
+
+  /* pointer to the array of lli entries from which the table is to be built */
+  struct sep_lli_entry_t  *lli_array_ptr;
+
+  /* number of elements in lli array */
+  int               lli_array_size;
+
+  /* number of entries in the created table */
+  int               num_table_entries;
+
+  /* number of array entries processed during table creation */
+  int               num_array_entries_processed;
+
+  /* the totatl data size in the created table */
+  int               lli_table_total_data_size;
+};
+
+/*
+  structure that represent tone table - it is not used in code, jkust
+  to show what table looks like
+*/
+struct sep_lli_table_t {
+  /* number of pages mapped in this tables. If 0 - means that the table
+  is not defined (used as a valid flag)*/
+  unsigned long num_pages;
+  /*
+    pointer to array of page pointers that represent the mapping of the
+    virtual buffer defined by the table to the physical memory. If this
+    pointer is NULL, it means that the table is not defined
+    (used as a valid flag)
+  */
+  struct page  **table_page_array_ptr;
+
+  /* maximum flow entries in table */
+  struct sep_lli_entry_t lli_entries[SEP_DRIVER_MAX_FLOW_NUM_ENTRIES_IN_TABLE];
+};
+
+
+/*
+  structure for keeping the mapping of the virtual buffer into physical pages
+*/
+struct sep_flow_buffer_data {
+  /* pointer to the array of page structs pointers to the pages of the
+	virtual buffer */
+  struct page   **page_array_ptr;
+
+  /* number of pages taken by the virtual buffer */
+  unsigned long   num_pages;
+
+  /* this flag signals if this page_array is the last one among many that were
+	sent in one setting to SEP */
+  unsigned long   last_page_array_flag;
+};
+
+/*
+  struct that keeps all the data for one flow
+*/
+struct sep_flow_context_t {
+  /*
+	work struct for handling the flow done interrupt in the workqueue
+	this structure must be in the first place, since it will be used
+	forcasting to the containing flow context
+  */
+  struct work_struct      flow_wq;
+
+  /* flow id */
+  unsigned long           flow_id;
+
+  /* additional input tables exists */
+  unsigned long           input_tables_flag;
+
+  /* additional output tables exists */
+  unsigned long           output_tables_flag;
+
+  /*  data of the first input file */
+  struct sep_lli_entry_t         first_input_table;
+
+  /* data of the first output table */
+  struct sep_lli_entry_t         first_output_table;
+
+  /* last input table data */
+  struct sep_lli_entry_t         last_input_table;
+
+  /* last output table data */
+  struct sep_lli_entry_t         last_output_table;
+
+  /* first list of table */
+  struct sep_lli_entry_t         input_tables_in_process;
+
+  /* output table in process (in sep) */
+  struct sep_lli_entry_t         output_tables_in_process;
+
+  /* size of messages in bytes */
+  unsigned long           message_size_in_bytes;
+
+  /* message */
+  unsigned char           message[SEP_MAX_ADD_MESSAGE_LENGTH_IN_BYTES];
+};
+
+
+
+/*
+  this function locks SEP by locking the semaphore
+*/
+int sep_lock(void);
+
+/*
+  this function unlocks SEP
+*/
+void sep_unlock(void);
+
+/*
+	this function returns the address of the message shared area
+*/
+void sep_map_shared_area(unsigned long *mappedAddr_ptr);
+
+
+/*
+	this function returns the address of the message shared area
+*/
+void sep_send_msg_rdy_cmd(void);
+
+
+/*
+	This function releases all the application virtual
+	buffer physical pages, that were previously locked
+*/
+int sep_free_dma_pages(struct page **page_array_ptr,
+			unsigned long num_pages,
+			unsigned long dirtyFlag);
+
+/*
+	This function creates the input and output dma tables for
+	symmetric operations (AES/DES) according to the block size
+	from LLI arays
+*/
+int sep_construct_dma_tables_from_lli(
+					struct sep_lli_entry_t *lli_in_array,
+					unsigned long     sep_in_lli_entries,
+					struct sep_lli_entry_t *lli_out_array,
+					unsigned long     sep_out_lli_entries,
+					unsigned long     block_size,
+					unsigned long    *lli_table_in_ptr,
+					unsigned long    *lli_table_out_ptr,
+					unsigned long    *in_num_entries_ptr,
+					unsigned long    *out_num_entries_ptr,
+					unsigned long    *table_data_size_ptr);
+
+/*
+	This function builds input and output DMA tables for synhronic symmetric
+	operations (AES, DES) It also checks that each table is of the modular
+	block size
+*/
+int sep_prepare_input_output_dma_table(unsigned long   app_virt_in_addr,
+				unsigned long   app_virt_out_addr,
+				unsigned long   data_size,
+				unsigned long   block_size,
+				unsigned long  *lli_table_in_ptr,
+				unsigned long  *lli_table_out_ptr,
+				unsigned long  *in_num_entries_ptr,
+				unsigned long  *out_num_entries_ptr,
+				unsigned long  *table_data_size_ptr,
+				bool            isKernelVirtualAddress);
+
+/*
+	This function prepares only input DMA table for synhronic symmetric
+	operations (HASH)
+*/
+int sep_prepare_input_dma_table(unsigned long   app_virt_addr,
+				unsigned long   data_size,
+				unsigned long   block_size,
+				unsigned long  *lli_table_ptr,
+				unsigned long  *num_entries_ptr,
+				unsigned long  *table_data_size_ptr,
+				bool            isKernelVirtualAddress);
+
+/* this functions frees all the resources that were allocated for the building
+	of the LLI DMA tables */
+void sep_free_dma_resources(void);
+
+
+/* poll(suspend) , until reply from sep */
+void sep_driver_poll(void);
+
+/*
+	this function handles the request for freeing dma table for
+	synhronic actions
+*/
+int sep_free_dma_table_data_handler(void);
+
+
+#endif

drivers/staging/sep/sep_driver_config.h

+/*
+ *
+ *  sep_driver_config.h - Security Processor Driver configuration
+ *
+ *  Copyright(c) 2009 Intel Corporation. All rights reserved.
+ *  Copyright(c) 2009 Discretix. All rights reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the Free
+ *  Software Foundation; either version 2 of the License, or (at your option)
+ *  any later version.
+ *
+ *  This program is distributed in the hope that it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ *  more details.
+ *
+ *  You should have received a copy of the GNU General Public License along with
+ *  this program; if not, write to the Free Software Foundation, Inc., 59
+ *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ *
+ *  CONTACTS:
+ *
+ *  Mark Allyn		mark.a.allyn@intel.com
+ *
+ *  CHANGES:
+ *
+ *  2009.06.26	Initial publish
+ *
+ */
+
+#ifndef __SEP_DRIVER_CONFIG_H__
+#define __SEP_DRIVER_CONFIG_H__
+
+
+/*--------------------------------------
+  DRIVER CONFIGURATION FLAGS
+  -------------------------------------*/
+
+/* if flag is on , then the driver is running in polling and
+	not interrupt mode */
+#define SEP_DRIVER_POLLING_MODE                         1
+
+/* flag which defines if the shared area address should be
+	reconfiged (send to SEP anew) during init of the driver */
+#define SEP_DRIVER_RECONFIG_MESSAGE_AREA                0
+
+/* the mode for running on the ARM1172 Evaluation platform (flag is 1) */
+#define SEP_DRIVER_ARM_DEBUG_MODE                       0
+
+/*-------------------------------------------
+	INTERNAL DATA CONFIGURATION
+	-------------------------------------------*/
+
+/* flag for the input array */
+#define SEP_DRIVER_IN_FLAG                              0
+
+/* flag for output array */
+#define SEP_DRIVER_OUT_FLAG                             1
+
+/* maximum number of entries in one LLI tables */
+#define SEP_DRIVER_ENTRIES_PER_TABLE_IN_SEP             8
+
+
+/*--------------------------------------------------------
+	SHARED AREA  memory total size is 36K
+	it is divided is following:
+
+	SHARED_MESSAGE_AREA                     8K         }
+									}
+	STATIC_POOL_AREA                        4K         } MAPPED AREA ( 24 K)
+									}
+	DATA_POOL_AREA                          12K        }
+
+	SYNCHRONIC_DMA_TABLES_AREA              5K
+
+	FLOW_DMA_TABLES_AREA                    4K
+
+	SYSTEM_MEMORY_AREA                      3k
+
+	SYSTEM_MEMORY total size is 3k
+	it is divided as following:
+
+	TIME_MEMORY_AREA                     8B
+-----------------------------------------------------------*/
+
+
+
+/*
+	the maximum length of the message - the rest of the message shared
+	area will be dedicated to the dma lli tables
+*/
+#define SEP_DRIVER_MAX_MESSAGE_SIZE_IN_BYTES                  (8 * 1024)
+
+/* the size of the message shared area in pages */
+#define SEP_DRIVER_MESSAGE_SHARED_AREA_SIZE_IN_BYTES          (8 * 1024)
+
+/* the size of the data pool static area in pages */
+#define SEP_DRIVER_STATIC_AREA_SIZE_IN_BYTES                  (4 * 1024)
+
+/* the size of the data pool shared area size in pages */
+#define SEP_DRIVER_DATA_POOL_SHARED_AREA_SIZE_IN_BYTES        (12 * 1024)
+
+/* the size of the message shared area in pages */
+#define SEP_DRIVER_SYNCHRONIC_DMA_TABLES_AREA_SIZE_IN_BYTES   (1024 * 5)
+
+
+/* the size of the data pool shared area size in pages */
+#define SEP_DRIVER_FLOW_DMA_TABLES_AREA_SIZE_IN_BYTES         (1024 * 4)
+
+/* system data (time, caller id etc') pool */
+#define SEP_DRIVER_SYSTEM_DATA_MEMORY_SIZE_IN_BYTES           100
+
+
+/* area size that is mapped  - we map the MESSAGE AREA, STATIC POOL and
+	DATA POOL areas. area must be module 4k */
+#define SEP_DRIVER_MMMAP_AREA_SIZE                            (1024 * 24)
+
+
+/*-----------------------------------------------
+	offsets of the areas starting from the shared area start address
+*/
+
+/* message area offset */
+#define SEP_DRIVER_MESSAGE_AREA_OFFSET_IN_BYTES               0
+
+/* static pool area offset */
+#define SEP_DRIVER_STATIC_AREA_OFFSET_IN_BYTES \
+		(SEP_DRIVER_MESSAGE_SHARED_AREA_SIZE_IN_BYTES)
+
+/* data pool area offset */
+#define SEP_DRIVER_DATA_POOL_AREA_OFFSET_IN_BYTES \
+	(SEP_DRIVER_STATIC_AREA_OFFSET_IN_BYTES + \
+	SEP_DRIVER_STATIC_AREA_SIZE_IN_BYTES)
+
+/* synhronic dma tables area offset */
+#define SEP_DRIVER_SYNCHRONIC_DMA_TABLES_AREA_OFFSET_IN_BYTES \
+	(SEP_DRIVER_DATA_POOL_AREA_OFFSET_IN_BYTES + \
+	SEP_DRIVER_DATA_POOL_SHARED_AREA_SIZE_IN_BYTES)
+
+/* sep driver flow dma tables area offset */
+#define SEP_DRIVER_FLOW_DMA_TABLES_AREA_OFFSET_IN_BYTES \
+	(SEP_DRIVER_SYNCHRONIC_DMA_TABLES_AREA_OFFSET_IN_BYTES + \
+	SEP_DRIVER_SYNCHRONIC_DMA_TABLES_AREA_SIZE_IN_BYTES)
+
+/* system memory offset in bytes */
+#define SEP_DRIVER_SYSTEM_DATA_MEMORY_OFFSET_IN_BYTES \
+	(SEP_DRIVER_FLOW_DMA_TABLES_AREA_OFFSET_IN_BYTES + \
+	SEP_DRIVER_FLOW_DMA_TABLES_AREA_SIZE_IN_BYTES)
+
+/* offset of the time area */
+#define SEP_DRIVER_SYSTEM_TIME_MEMORY_OFFSET_IN_BYTES \
+	(SEP_DRIVER_SYSTEM_DATA_MEMORY_OFFSET_IN_BYTES)
+
+
+
+/* start physical address of the SEP registers memory in HOST */
+#define SEP_IO_MEM_REGION_START_ADDRESS                       0x80000000
+
+/* size of the SEP registers memory region  in HOST (for now 100 registers) */
+#define SEP_IO_MEM_REGION_SIZE                                (2 * 0x100000)
+
+/* define the number of IRQ for SEP interrupts */
+#define SEP_DIRVER_IRQ_NUM                                    1
+
+/* maximum number of add buffers */
+#define SEP_MAX_NUM_ADD_BUFFERS                               100
+
+/* number of flows */
+#define SEP_DRIVER_NUM_FLOWS                                  4
+
+/* maximum number of entries in flow table */
+#define SEP_DRIVER_MAX_FLOW_NUM_ENTRIES_IN_TABLE              25
+
+/* offset of the num entries in the block length entry of the LLI */
+#define SEP_NUM_ENTRIES_OFFSET_IN_BITS                        24
+
+/* offset of the interrupt flag in the block length entry of the LLI */
+#define SEP_INT_FLAG_OFFSET_IN_BITS                           31
+
+/* mask for extracting data size from LLI */
+#define SEP_TABLE_DATA_SIZE_MASK                              0xFFFFFF
+
+/* mask for entries after being shifted left */
+#define SEP_NUM_ENTRIES_MASK                                  0x7F
+
+/* default flow id */
+#define SEP_FREE_FLOW_ID                                      0xFFFFFFFF
+
+/* temp flow id used during cretiong of new flow until receiving
+	real flow id from sep */
+#define SEP_TEMP_FLOW_ID                   (SEP_DRIVER_NUM_FLOWS + 1)
+
+/* maximum add buffers message length in bytes */
+#define SEP_MAX_ADD_MESSAGE_LENGTH_IN_BYTES                   (7 * 4)
+
+/* maximum number of concurrent virtual buffers */
+#define SEP_MAX_VIRT_BUFFERS_CONCURRENT                       100
+
+/* the token that defines the start of time address */
+#define SEP_TIME_VAL_TOKEN                                    0x12345678
+/* DEBUG LEVEL MASKS */
+#define SEP_DEBUG_LEVEL_BASIC       0x1
+
+#define SEP_DEBUG_LEVEL_REGISTERS   0x2
+
+#define SEP_DEBUG_LEVEL_EXTENDED    0x4
+
+
+/* FUNCTIONAL MACROS */
+
+/* debug macro without paramaters */
+#define DEBUG_PRINT_0(DEBUG_LEVEL , info) \
+do { \
+	if (DEBUG_LEVEL & sepDebug) \
+		printk(KERN_WARNING info); \
+} while (0)
+
+/* debug macro with 1 paramater */
+#define DEBUG_PRINT_1(DEBUG_LEVEL , info , param1) \
+do { \
+	if (DEBUG_LEVEL & sepDebug) \
+		printk(KERN_WARNING info, param1); \
+} while (0)
+
+/* debug macro with 2 paramaters */
+#define DEBUG_PRINT_2(DEBUG_LEVEL, info, param1, param2) \
+do { \
+	if (DEBUG_LEVEL & sepDebug) \
+		printk(KERN_WARNING info , param1, param2); \
+} while (0)
+
+/* debug macro with 3 paramaters */
+#define DEBUG_PRINT_3(DEBUG_LEVEL, info, param1, param2, param3) \
+do { \
+	if (DEBUG_LEVEL & sepDebug) \
+		printk(KERN_WARNING info , param1, param2 , param3); \
+} while (0)
+
+/* debug macro with 4 paramaters */
+#define DEBUG_PRINT_4(DEBUG_LEVEL, info, param1, param2, param3, param4) \
+do { \
+	if (DEBUG_LEVEL & sepDebug) \
+		printk(KERN_WARNING info, param1, param2, param3, param4); \
+} while (0)
+
+#if 0
+/* write register macro with option for debug print */
+#define SEP_WRITE_REGISTER(address, value) \
+do { \
+	if (sepDebug & SEP_DEBUG_LEVEL_REGISTERS) \
+		printk(KERN_WARNING "Write Register: address %lu value %lu\n", \
+		(unsigned long)(address), (unsigned long)(value)); \
+	writel((value), (void *)(address)); \
+} while (0)
+
+/* read register macro with option for debug print */
+#define SEP_READ_REGISTER(address , value) \
+do { \
+	(value) = readl((void *)(address)); \
+	if (sepDebug & SEP_DEBUG_LEVEL_REGISTERS) \
+		printk(KERN_WARNING "Read Register: address %lu value %lu\n", \
+		(address), (value)); \
+} while (0)
+#else
+
+#if 1
+
+#define SEP_WRITE_REGISTER(address, value)  writel((value), (void *)(address))
+#define SEP_READ_REGISTER(address, value)  (value) = readl((void *)(address))
+#endif
+
+#endif
+
+#if 0
+#define SEP_WRITE_ROM(address, value)  writel((value), (void *)(address))
+
+#define SEP_WRITE_REGISTER(address, value) \
+do { \
+	unsigned long i; \
+	for (i = 0; i < 1000; i++); \
+		writel((value), (void *)(address)); \
+} while (0)
+
+
+#define SEP_READ_REGISTER(address , value) \
+do { \
+	unsigned long i; \
+	for (i = 0; i < 1000; i++); \
+		(value) = readl((void *) (address)); \
+} while (0)
+
+#endif
+
+/* wait for SRAM write complete(indirect write */
+#define SEP_WAIT_SRAM_WRITE_COMPLETE() \
+do { \
+	unsigned long  reg_val; \
+	do { \
+		SEP_READ_REGISTER(g_sep_reg_base_address + \
+		HW_SRAM_DATA_READY_REG_ADDR, (reg_val)); \
+	} while (!(reg_val & 0x1)); \
+} while (0)
+
+#endif

drivers/staging/sep/sep_driver_ext_api.h

+/*
+ *
+ *  sep_driver_ext_api.h - Security Processor Driver external api definitions
+ *
+ *  Copyright(c) 2009 Intel Corporation. All rights reserved.
+ *  Copyright(c) 2009 Discretix. All rights reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the Free
+ *  Software Foundation; either version 2 of the License, or (at your option)
+ *  any later version.
+ *
+ *  This program is distributed in the hope that it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ *  more details.
+ *
+ *  You should have received a copy of the GNU General Public License along with
+ *  this program; if not, write to the Free Software Foundation, Inc., 59
+ *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ *
+ *  CONTACTS:
+ *
+ *  Mark Allyn		mark.a.allyn@intel.com
+ *
+ *  CHANGES:
+ *
+ *  2009.06.26	Initial publish
+ *
+ */
+
+#ifndef __SEP_DRIVER_EXT_API_H__
+#define __SEP_DRIVER_EXT_API_H__
+
+
+/* shared variables */
+extern int sepDebug;
+
+extern unsigned long g_sep_reg_base_address;
+
+/*
+this function loads the ROM code in SEP (needed only in the debug mode on FPGA)
+*/
+void sep_load_rom_code(void);
+
+/*
+This functions locks the area of the resident and cache sep code (if possible)
+*/
+void sep_lock_cache_resident_area(void);
+
+/*
+This functions copies the cache and resident from their source location into
+destination memory, which is external to Linux VM and is given as physical
+address
+*/
+int sep_copy_cache_resident_to_area(unsigned long   src_cache_addr,
+				unsigned long   cache_size_in_bytes,
+				unsigned long   src_resident_addr,
+				unsigned long   resident_size_in_bytes,
+				unsigned long  *dst_new_cache_addr_ptr,
+				unsigned long  *dst_new_resident_addr_ptr);
+
+/*
+This functions maps and allocates the shared area on the external
+RAM (device) The input is shared_area_size - the size of the memory
+to allocate. The outputs are kernel_shared_area_addr_ptr - the kerenl
+address of the mapped and allocated shared area, and
+phys_shared_area_addr_ptr - the physical address of the shared area
+*/
+int sep_map_and_alloc_shared_area(unsigned long   shared_area_size,
+				unsigned long  *kernel_shared_area_addr_ptr,
+				unsigned long  *phys_shared_area_addr_ptr);
+
+/*
+This functions unmaps and deallocates the shared area on the  external
+RAM (device) The input is shared_area_size - the size of the memory to
+deallocate,kernel_shared_area_addr_ptr - the kernel address of the
+mapped and allocated shared area,phys_shared_area_addr_ptr - the physical
+address of the shared area
+*/
+void sep_unmap_and_free_shared_area(unsigned long   shared_area_size,
+				unsigned long   kernel_shared_area_addr,
+				unsigned long   phys_shared_area_addr);
+
+
+/*
+This functions returns the physical address inside shared area according
+to the virtual address. It can be either on the externa RAM device
+(ioremapped), or on the system RAM
+*/
+unsigned long sep_shared_area_virt_to_phys(unsigned long virt_address);
+
+/*
+This functions returns the vitrual address inside shared area according
+to the physical address. It can be either on the externa RAM device
+(ioremapped), or on the system RAM This implementation is for the external RAM
+*/
+unsigned long sep_shared_area_phys_to_virt(unsigned long phys_address);
+
+/*
+This function registers th driver to the device
+subsystem (either PCI, USB, etc)
+*/
+int sep_register_driver_to_device(void);
+
+#endif /*__SEP_DRIVER_EXT_API_H__*/

drivers/staging/sep/sep_driver_hw_defs.h

+/*
+ *
+ *  sep_driver_hw_defs.h - Security Processor Driver hardware definitions
+ *
+ *  Copyright(c) 2009 Intel Corporation. All rights reserved.
+ *  Copyright(c) 2009 Discretix. All rights reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the Free
+ *  Software Foundation; either version 2 of the License, or (at your option)
+ *  any later version.
+ *
+ *  This program is distributed in the hope that it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ *  more details.
+ *
+ *  You should have received a copy of the GNU General Public License along with
+ *  this program; if not, write to the Free Software Foundation, Inc., 59
+ *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ *
+ *  CONTACTS:
+ *
+ *  Mark Allyn		mark.a.allyn@intel.com
+ *
+ *  CHANGES:
+ *
+ *  2009.06.26	Initial publish
+ *
+ */
+
+#ifndef SEP_DRIVER_HW_DEFS__H
+#define SEP_DRIVER_HW_DEFS__H
+
+/*--------------------------------------------------------------------------*/
+/* Abstract: HW Registers Defines.                                          */
+/*                                                                          */
+/* Note: This file was automatically created !!!                            */
+/*       DO NOT EDIT THIS FILE !!!                                          */
+/*--------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/* cf registers */
+#define 	 HW_R0B_ADDR_0_REG_ADDR 		 0x0000UL
+#define 	 HW_R0B_ADDR_1_REG_ADDR 		 0x0004UL
+#define 	 HW_R0B_ADDR_2_REG_ADDR 		 0x0008UL
+#define 	 HW_R0B_ADDR_3_REG_ADDR 		 0x000cUL
+#define 	 HW_R0B_ADDR_4_REG_ADDR 		 0x0010UL
+#define 	 HW_R0B_ADDR_5_REG_ADDR 		 0x0014UL
+#define 	 HW_R0B_ADDR_6_REG_ADDR 		 0x0018UL
+#define 	 HW_R0B_ADDR_7_REG_ADDR 		 0x001cUL
+#define 	 HW_R0B_ADDR_8_REG_ADDR 		 0x0020UL
+#define 	 HW_R2B_ADDR_0_REG_ADDR 		 0x0080UL
+#define 	 HW_R2B_ADDR_1_REG_ADDR 		 0x0084UL
+#define 	 HW_R2B_ADDR_2_REG_ADDR 		 0x0088UL
+#define 	 HW_R2B_ADDR_3_REG_ADDR 		 0x008cUL
+#define 	 HW_R2B_ADDR_4_REG_ADDR 		 0x0090UL
+#define 	 HW_R2B_ADDR_5_REG_ADDR 		 0x0094UL
+#define 	 HW_R2B_ADDR_6_REG_ADDR 		 0x0098UL
+#define 	 HW_R2B_ADDR_7_REG_ADDR 		 0x009cUL
+#define 	 HW_R2B_ADDR_8_REG_ADDR 		 0x00a0UL
+#define 	 HW_R3B_REG_ADDR 		         0x00C0UL
+#define 	 HW_R4B_REG_ADDR 		         0x0100UL
+#define 	 HW_CSA_ADDR_0_REG_ADDR 		 0x0140UL
+#define 	 HW_CSA_ADDR_1_REG_ADDR 		 0x0144UL
+#define 	 HW_CSA_ADDR_2_REG_ADDR 		 0x0148UL
+#define 	 HW_CSA_ADDR_3_REG_ADDR 		 0x014cUL
+#define 	 HW_CSA_ADDR_4_REG_ADDR 		 0x0150UL
+#define 	 HW_CSA_ADDR_5_REG_ADDR 		 0x0154UL
+#define 	 HW_CSA_ADDR_6_REG_ADDR 		 0x0158UL
+#define 	 HW_CSA_ADDR_7_REG_ADDR 		 0x015cUL
+#define 	 HW_CSA_ADDR_8_REG_ADDR 		 0x0160UL
+#define 	 HW_CSA_REG_ADDR 		         0x0140UL
+#define 	 HW_SINB_REG_ADDR 		         0x0180UL
+#define 	 HW_SOUTB_REG_ADDR 		         0x0184UL
+#define 	 HW_PKI_CONTROL_REG_ADDR 		 0x01C0UL
+#define 	 HW_PKI_STATUS_REG_ADDR 		 0x01C4UL
+#define 	 HW_PKI_BUSY_REG_ADDR 		     0x01C8UL
+#define 	 HW_PKI_A_1025_REG_ADDR 		 0x01CCUL
+#define 	 HW_PKI_SDMA_CTL_REG_ADDR 		 0x01D0UL
+#define 	 HW_PKI_SDMA_OFFSET_REG_ADDR 	 0x01D4UL
+#define 	 HW_PKI_SDMA_POINTERS_REG_ADDR 	 0x01D8UL
+#define 	 HW_PKI_SDMA_DLENG_REG_ADDR 		 0x01DCUL
+#define 	 HW_PKI_SDMA_EXP_POINTERS_REG_ADDR 	 0x01E0UL
+#define 	 HW_PKI_SDMA_RES_POINTERS_REG_ADDR 	 0x01E4UL
+#define 	 HW_PKI_CLR_REG_ADDR 		         0x01E8UL
+#define 	 HW_PKI_SDMA_BUSY_REG_ADDR 		     0x01E8UL
+#define 	 HW_PKI_SDMA_FIRST_EXP_N_REG_ADDR 	 0x01ECUL
+#define 	 HW_PKI_SDMA_MUL_BY1_REG_ADDR 		 0x01F0UL
+#define 	 HW_PKI_SDMA_RMUL_SEL_REG_ADDR 		 0x01F4UL
+#define 	 HW_DES_KEY_0_REG_ADDR 		         0x0208UL
+#define 	 HW_DES_KEY_1_REG_ADDR 		         0x020CUL
+#define 	 HW_DES_KEY_2_REG_ADDR 		         0x0210UL
+#define 	 HW_DES_KEY_3_REG_ADDR 		         0x0214UL
+#define 	 HW_DES_KEY_4_REG_ADDR 		         0x0218UL
+#define 	 HW_DES_KEY_5_REG_ADDR 		         0x021CUL
+#define 	 HW_DES_CONTROL_0_REG_ADDR 	         0x0220UL
+#define 	 HW_DES_CONTROL_1_REG_ADDR 	         0x0224UL
+#define 	 HW_DES_IV_0_REG_ADDR 		         0x0228UL
+#define 	 HW_DES_IV_1_REG_ADDR 		         0x022CUL
+#define 	 HW_AES_KEY_0_ADDR_0_REG_ADDR 		 0x0400UL
+#define 	 HW_AES_KEY_0_ADDR_1_REG_ADDR 		 0x0404UL
+#define 	 HW_AES_KEY_0_ADDR_2_REG_ADDR 		 0x0408UL
+#define 	 HW_AES_KEY_0_ADDR_3_REG_ADDR 		 0x040cUL
+#define 	 HW_AES_KEY_0_ADDR_4_REG_ADDR 		 0x0410UL
+#define 	 HW_AES_KEY_0_ADDR_5_REG_ADDR 		 0x0414UL
+#define 	 HW_AES_KEY_0_ADDR_6_REG_ADDR 		 0x0418UL
+#define 	 HW_AES_KEY_0_ADDR_7_REG_ADDR 		 0x041cUL
+#define 	 HW_AES_KEY_0_REG_ADDR 		         0x0400UL
+#define 	 HW_AES_IV_0_ADDR_0_REG_ADDR 		 0x0440UL
+#define 	 HW_AES_IV_0_ADDR_1_REG_ADDR 		 0x0444UL
+#define 	 HW_AES_IV_0_ADDR_2_REG_ADDR 		 0x0448UL
+#define 	 HW_AES_IV_0_ADDR_3_REG_ADDR 		 0x044cUL
+#define 	 HW_AES_IV_0_REG_ADDR 		         0x0440UL
+#define 	 HW_AES_CTR1_ADDR_0_REG_ADDR 		 0x0460UL
+#define 	 HW_AES_CTR1_ADDR_1_REG_ADDR 		 0x0464UL
+#define 	 HW_AES_CTR1_ADDR_2_REG_ADDR 		 0x0468UL
+#define 	 HW_AES_CTR1_ADDR_3_REG_ADDR 		 0x046cUL
+#define 	 HW_AES_CTR1_REG_ADDR 		         0x0460UL
+#define 	 HW_AES_SK_REG_ADDR 		         0x0478UL
+#define 	 HW_AES_MAC_OK_REG_ADDR 		     0x0480UL
+#define 	 HW_AES_PREV_IV_0_ADDR_0_REG_ADDR 	 0x0490UL
+#define 	 HW_AES_PREV_IV_0_ADDR_1_REG_ADDR 	 0x0494UL
+#define 	 HW_AES_PREV_IV_0_ADDR_2_REG_ADDR 	 0x0498UL
+#define 	 HW_AES_PREV_IV_0_ADDR_3_REG_ADDR 	 0x049cUL
+#define 	 HW_AES_PREV_IV_0_REG_ADDR 		     0x0490UL
+#define 	 HW_AES_CONTROL_REG_ADDR 		     0x04C0UL
+#define 	 HW_HASH_H0_REG_ADDR 		     0x0640UL
+#define 	 HW_HASH_H1_REG_ADDR 		     0x0644UL
+#define 	 HW_HASH_H2_REG_ADDR 		     0x0648UL
+#define 	 HW_HASH_H3_REG_ADDR 		     0x064CUL
+#define 	 HW_HASH_H4_REG_ADDR 		     0x0650UL
+#define 	 HW_HASH_H5_REG_ADDR 		     0x0654UL
+#define 	 HW_HASH_H6_REG_ADDR 		     0x0658UL
+#define 	 HW_HASH_H7_REG_ADDR 		     0x065CUL
+#define 	 HW_HASH_H8_REG_ADDR 		     0x0660UL
+#define 	 HW_HASH_H9_REG_ADDR 		     0x0664UL
+#define 	 HW_HASH_H10_REG_ADDR 		     0x0668UL
+#define 	 HW_HASH_H11_REG_ADDR 		     0x066CUL
+#define 	 HW_HASH_H12_REG_ADDR 		     0x0670UL
+#define 	 HW_HASH_H13_REG_ADDR 		     0x0674UL
+#define 	 HW_HASH_H14_REG_ADDR 		     0x0678UL
+#define 	 HW_HASH_H15_REG_ADDR 		     0x067CUL
+#define 	 HW_HASH_CONTROL_REG_ADDR 		 0x07C0UL
+#define 	 HW_HASH_PAD_EN_REG_ADDR 		 0x07C4UL
+#define 	 HW_HASH_PAD_CFG_REG_ADDR 		 0x07C8UL
+#define 	 HW_HASH_CUR_LEN_0_REG_ADDR 	 0x07CCUL
+#define 	 HW_HASH_CUR_LEN_1_REG_ADDR 	 0x07D0UL
+#define 	 HW_HASH_CUR_LEN_2_REG_ADDR 	 0x07D4UL
+#define 	 HW_HASH_CUR_LEN_3_REG_ADDR 	 0x07D8UL
+#define 	 HW_HASH_PARAM_REG_ADDR 		 0x07DCUL
+#define 	 HW_HASH_INT_BUSY_REG_ADDR 		 0x07E0UL
+#define 	 HW_HASH_SW_RESET_REG_ADDR 		 0x07E4UL
+#define 	 HW_HASH_ENDIANESS_REG_ADDR 	 0x07E8UL
+#define 	 HW_HASH_DATA_REG_ADDR 		     0x07ECUL
+#define 	 HW_DRNG_CONTROL_REG_ADDR 		 0x0800UL
+#define 	 HW_DRNG_VALID_REG_ADDR 		 0x0804UL
+#define 	 HW_DRNG_DATA_REG_ADDR 		     0x0808UL
+#define 	 HW_RND_SRC_EN_REG_ADDR 		 0x080CUL
+#define 	 HW_AES_CLK_ENABLE_REG_ADDR 	 0x0810UL
+#define 	 HW_DES_CLK_ENABLE_REG_ADDR 	 0x0814UL
+#define 	 HW_HASH_CLK_ENABLE_REG_ADDR 	 0x0818UL
+#define 	 HW_PKI_CLK_ENABLE_REG_ADDR 	 0x081CUL
+#define 	 HW_CLK_STATUS_REG_ADDR 		 0x0824UL
+#define 	 HW_CLK_ENABLE_REG_ADDR 		 0x0828UL
+#define 	 HW_DRNG_SAMPLE_REG_ADDR 		 0x0850UL
+#define 	 HW_RND_SRC_CTL_REG_ADDR 		 0x0858UL
+#define 	 HW_CRYPTO_CTL_REG_ADDR 		 0x0900UL
+#define 	 HW_CRYPTO_STATUS_REG_ADDR 		 0x090CUL
+#define 	 HW_CRYPTO_BUSY_REG_ADDR 		 0x0910UL
+#define 	 HW_AES_BUSY_REG_ADDR 		     0x0914UL
+#define 	 HW_DES_BUSY_REG_ADDR 		     0x0918UL
+#define 	 HW_HASH_BUSY_REG_ADDR 		     0x091CUL
+#define 	 HW_CONTENT_REG_ADDR 		     0x0924UL
+#define 	 HW_VERSION_REG_ADDR 		     0x0928UL
+#define 	 HW_CONTEXT_ID_REG_ADDR 		 0x0930UL
+#define 	 HW_DIN_BUFFER_REG_ADDR 		 0x0C00UL
+#define 	 HW_DIN_MEM_DMA_BUSY_REG_ADDR 	 0x0c20UL
+#define 	 HW_SRC_LLI_MEM_ADDR_REG_ADDR 	 0x0c24UL
+#define 	 HW_SRC_LLI_WORD0_REG_ADDR 		 0x0C28UL
+#define 	 HW_SRC_LLI_WORD1_REG_ADDR 		 0x0C2CUL
+#define 	 HW_SRAM_SRC_ADDR_REG_ADDR 		 0x0c30UL
+#define 	 HW_DIN_SRAM_BYTES_LEN_REG_ADDR  0x0c34UL
+#define 	 HW_DIN_SRAM_DMA_BUSY_REG_ADDR 	 0x0C38UL
+#define 	 HW_WRITE_ALIGN_REG_ADDR 		 0x0C3CUL
+#define 	 HW_OLD_DATA_REG_ADDR 		     0x0C48UL
+#define 	 HW_WRITE_ALIGN_LAST_REG_ADDR 	 0x0C4CUL
+#define 	 HW_DOUT_BUFFER_REG_ADDR 		 0x0C00UL
+#define 	 HW_DST_LLI_WORD0_REG_ADDR 		 0x0D28UL
+#define 	 HW_DST_LLI_WORD1_REG_ADDR 		 0x0D2CUL
+#define 	 HW_DST_LLI_MEM_ADDR_REG_ADDR 	 0x0D24UL
+#define 	 HW_DOUT_MEM_DMA_BUSY_REG_ADDR 	 0x0D20UL
+#define 	 HW_SRAM_DEST_ADDR_REG_ADDR 	 0x0D30UL
+#define 	 HW_DOUT_SRAM_BYTES_LEN_REG_ADDR 0x0D34UL
+#define 	 HW_DOUT_SRAM_DMA_BUSY_REG_ADDR  0x0D38UL
+#define 	 HW_READ_ALIGN_REG_ADDR 		 0x0D3CUL
+#define 	 HW_READ_LAST_DATA_REG_ADDR 	 0x0D44UL
+#define 	 HW_RC4_THRU_CPU_REG_ADDR 		 0x0D4CUL
+#define 	 HW_AHB_SINGLE_REG_ADDR 		 0x0E00UL
+#define 	 HW_SRAM_DATA_REG_ADDR 		     0x0F00UL
+#define 	 HW_SRAM_ADDR_REG_ADDR 		     0x0F04UL
+#define 	 HW_SRAM_DATA_READY_REG_ADDR 	 0x0F08UL
+#define 	 HW_HOST_IRR_REG_ADDR 		          0x0A00UL
+#define 	 HW_HOST_IMR_REG_ADDR 		          0x0A04UL
+#define 	 HW_HOST_ICR_REG_ADDR 		          0x0A08UL
+#define 	 HW_HOST_SEP_SRAM_THRESHOLD_REG_ADDR  0x0A10UL
+#define 	 HW_HOST_SEP_BUSY_REG_ADDR 		      0x0A14UL
+#define 	 HW_HOST_SEP_LCS_REG_ADDR 		      0x0A18UL
+#define 	 HW_HOST_CC_SW_RST_REG_ADDR 		  0x0A40UL
+#define 	 HW_HOST_SEP_SW_RST_REG_ADDR 		  0x0A44UL
+#define 	 HW_HOST_FLOW_DMA_SW_INT0_REG_ADDR 	  0x0A80UL
+#define 	 HW_HOST_FLOW_DMA_SW_INT1_REG_ADDR 	  0x0A84UL
+#define 	 HW_HOST_FLOW_DMA_SW_INT2_REG_ADDR 	  0x0A88UL
+#define 	 HW_HOST_FLOW_DMA_SW_INT3_REG_ADDR 	  0x0A8cUL
+#define 	 HW_HOST_FLOW_DMA_SW_INT4_REG_ADDR 	  0x0A90UL
+#define 	 HW_HOST_FLOW_DMA_SW_INT5_REG_ADDR 	  0x0A94UL
+#define 	 HW_HOST_FLOW_DMA_SW_INT6_REG_ADDR    0x0A98UL
+#define 	 HW_HOST_FLOW_DMA_SW_INT7_REG_ADDR 	  0x0A9cUL
+#define 	 HW_HOST_SEP_HOST_GPR0_REG_ADDR 	  0x0B00UL
+#define 	 HW_HOST_SEP_HOST_GPR1_REG_ADDR 	  0x0B04UL
+#define 	 HW_HOST_SEP_HOST_GPR2_REG_ADDR 	  0x0B08UL
+#define 	 HW_HOST_SEP_HOST_GPR3_REG_ADDR       0x0B0CUL
+#define 	 HW_HOST_HOST_SEP_GPR0_REG_ADDR       0x0B80UL
+#define 	 HW_HOST_HOST_SEP_GPR1_REG_ADDR       0x0B84UL
+#define 	 HW_HOST_HOST_SEP_GPR2_REG_ADDR       0x0B88UL
+#define 	 HW_HOST_HOST_SEP_GPR3_REG_ADDR       0x0B8CUL
+#define 	 HW_HOST_HOST_ENDIAN_REG_ADDR 	      0x0B90UL
+#define 	 HW_HOST_HOST_COMM_CLK_EN_REG_ADDR 	  0x0B94UL
+#define 	 HW_CLR_SRAM_BUSY_REG_REG_ADDR 	      0x0F0CUL
+#define    HW_CC_SRAM_BASE_ADDRESS              0x5800UL
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ifndef HW_DEFS */

drivers/staging/sep/sep_ext_with_pci_driver.c

+/*
+ *
+ *  sep_ext_with_pci_driver.c - Security Processor Driver
+ *  pci initialization functions
+ *
+ *  Copyright(c) 2009 Intel Corporation. All rights reserved.
+ *  Copyright(c) 2009 Discretix. All rights reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License as published by the Free
+ *  Software Foundation; either version 2 of the License, or (at your option)
+ *  any later version.
+ *
+ *  This program is distributed in the hope that it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ *  more details.
+ *
+ *  You should have received a copy of the GNU General Public License along with
+ *  this program; if not, write to the Free Software Foundation, Inc., 59
+ *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ *
+ *  CONTACTS:
+ *
+ *  Mark Allyn		mark.a.allyn@intel.com
+ *
+ *  CHANGES:
+ *
+ *  2009.06.26	Initial publish
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/cdev.h>
+#include <linux/kdev_t.h>
+#include <linux/semaphore.h>
+#include <linux/mm.h>
+#include <linux/poll.h>
+#include <linux/wait.h>
+#include <linux/ioctl.h>
+#include <linux/ioport.h>
+#include <linux/io.h>
+#include <linux/interrupt.h>
+#include <linux/pagemap.h>
+#include <linux/pci.h>
+#include <linux/firmware.h>
+#include <linux/sched.h>
+#include "sep_driver_hw_defs.h"
+#include "sep_driver_config.h"
+#include "sep_driver_api.h"
+#include "sep_driver_ext_api.h"
+
+#if SEP_DRIVER_ARM_DEBUG_MODE
+
+#define  CRYS_SEP_ROM_length                  0x4000
+
+#define  CRYS_SEP_ROM_start_address           0x8000C000UL
+
+#define  CRYS_SEP_ROM_start_address_offset    0xC000UL
+
+#define  SEP_ROM_BANK_register                0x80008420UL
+
+#define  SEP_ROM_BANK_register_offset         0x8420UL
+
+#define SEP_RAR_IO_MEM_REGION_START_ADDRESS   0x82000000
+
+/* 2M size */
+/* #define SEP_RAR_IO_MEM_REGION_SIZE            (1024*1024*2)
+
+static unsigned long CRYS_SEP_ROM[] = {
+	#include "SEP_ROM_image.h"
+};
+
+#else
+*/
+
+/*-------------
+ THOSE 2 definitions are specific to the board - must be
+ defined during integration
+---------------*/
+#define SEP_RAR_IO_MEM_REGION_START_ADDRESS   0xFF0D0000
+
+/* 2M size */
+
+#endif /* SEP_DRIVER_ARM_DEBUG_MODE */
+
+#define BASE_ADDRESS_FOR_SYSTEM 0xfffc0000
+#define SEP_RAR_IO_MEM_REGION_SIZE 0x40000
+
+irqreturn_t sep_inthandler(int irq , void* dev_id);
+
+/* NOTE - must be defined specific to the board */
+#define VENDOR_ID                             0x8086
+
+/* io memory (register area) */
+static unsigned long io_memory_start_physical_address;
+static unsigned long io_memory_end_physical_address;
+static unsigned long io_memory_size;
+void *io_memory_start_virtual_address;
+
+/* restricted access region */
+static unsigned long rar_physical_address;
+static void *rar_virtual_address;
+
+/* shared memory region */
+static unsigned long shared_physical_address;
+static void *shared_virtual_address;
+
+/* firmware regions */
+static unsigned long cache_physical_address;
+static unsigned long cache_size;
+static void *cache_virtual_address;
+
+static unsigned long resident_physical_address;
+static unsigned long resident_size;
+static void *resident_virtual_address;
+
+/* device interrupt (as retrieved from PCI) */
+int sep_irq;
+
+/* temporary */
+unsigned long jiffies_future;
+
+/*-----------------------------
+    private functions
+--------------------------------*/
+
+/*
+  function that is activated on the succesfull probe of the SEP device
+*/
+static int __devinit sep_probe(struct pci_dev *pdev,
+  const struct pci_device_id *ent);
+
+static struct pci_device_id sep_pci_id_tbl[] = {
+	{ PCI_DEVICE(VENDOR_ID, 0x080c) },
+	{ 0 }
+};
+
+MODULE_DEVICE_TABLE(pci, sep_pci_id_tbl);
+
+static unsigned long    rar_region_addr;
+
+
+/* field for registering driver to PCI device */
+static struct pci_driver sep_pci_driver = {
+	.name = "sep_sec_driver",
+	.id_table = sep_pci_id_tbl,
+	.probe = sep_probe
+};
+
+/* pointer to pci dev received during probe */
+struct pci_dev *sep_pci_dev_ptr;
+
+/*
+  This functions locks the area of the resisnd and cache sep code
+*/
+void sep_lock_cache_resident_area(void)
+{
+	return;
+}
+
+
+/*
+  This functions copies the cache and resident from their source location into
+  destination memory, which is external to Linux VM and is given as
+   physical address
+*/
+int sep_copy_cache_resident_to_area(unsigned long   src_cache_addr,
+				unsigned long   cache_size_in_bytes,
+				unsigned long   src_resident_addr,
+				unsigned long   resident_size_in_bytes,
+				unsigned long *dst_new_cache_addr_ptr,
+				unsigned long *dst_new_resident_addr_ptr)
+{
+	/* resident address in user space */
+	unsigned long resident_addr;
+
+	/* cahce address in user space */
+	unsigned long cache_addr;
+
+	const struct firmware *fw;
+
+	char *cache_name = "cache.image.bin";
+	char *res_name =  "resident.image.bin";
+
+	/* error */
+	int error;
+
+	/*--------------------------------
+	    CODE
+	-------------------------------------*/
+	error = 0;
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:rar_virtual is %p\n",
+	  rar_virtual_address);
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:rar_physical is %08lx\n",
+	  rar_physical_address);
+
+	rar_region_addr = (unsigned long)rar_virtual_address;
+
+	cache_physical_address = rar_physical_address;
+	cache_virtual_address = rar_virtual_address;
+
+	/* load cache */
+	error = request_firmware(&fw, cache_name, &sep_pci_dev_ptr->dev);
+	if (error) {
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "SEP Driver:cant request cache fw\n");
+		goto end_function;
+	}
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:cache data loc is %p\n",
+	  (void *)fw->data);
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:cache data size is %08x\n",
+	  fw->size);
+
+	memcpy((void *)cache_virtual_address, (void *)fw->data, fw->size);
+
+	cache_size = fw->size;
+
+	cache_addr = (unsigned long)cache_virtual_address;
+
+	release_firmware(fw);
+
+	resident_physical_address = cache_physical_address+cache_size;
+	resident_virtual_address = cache_virtual_address+cache_size;
+
+	/* load resident */
+	error = request_firmware(&fw, res_name, &sep_pci_dev_ptr->dev);
+	if (error) {
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "SEP Driver:cant request res fw\n");
+		goto end_function;
+	}
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:res data loc is %p\n",
+	  (void *)fw->data);
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:res data size is %08x\n",
+	  fw->size);
+
+	memcpy((void *)resident_virtual_address, (void *)fw->data, fw->size);
+
+	resident_size = fw->size;
+
+	release_firmware(fw);
+
+	resident_addr = (unsigned long)resident_virtual_address;
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:resident_addr (physical )is %08lx\n",
+	  resident_physical_address);
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:cache_addr (physical) is %08lx\n",
+	  cache_physical_address);
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:resident_addr (logical )is %08lx\n",
+	  resident_addr);
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:cache_addr (logical) is %08lx\n",
+	  cache_addr);
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:resident_size is %08lx\n", resident_size);
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:cache_size is %08lx\n", cache_size);
+
+
+
+	/* physical addresses */
+	*dst_new_cache_addr_ptr = cache_physical_address;
+	*dst_new_resident_addr_ptr = resident_physical_address;
+
+end_function:
+
+	return error;
+}
+
+/*
+  This functions maps and allocates the
+  shared area on the  external RAM (device)
+  The input is shared_area_size - the size of the memory to
+  allocate. The outputs
+  are kernel_shared_area_addr_ptr - the kerenl
+  address of the mapped and allocated
+  shared area, and phys_shared_area_addr_ptr
+  - the physical address of the shared area
+*/
+int sep_map_and_alloc_shared_area(unsigned long shared_area_size,
+				unsigned long *kernel_shared_area_addr_ptr,
+				unsigned long *phys_shared_area_addr_ptr)
+{
+	// shared_virtual_address = ioremap_nocache(0xda00000,shared_area_size);
+	shared_virtual_address = kmalloc(shared_area_size, GFP_KERNEL);
+	if (!shared_virtual_address) {
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "sep_driver:shared memory kmalloc failed\n");
+		return -1;
+	}
+
+	shared_physical_address = __pa(shared_virtual_address);
+	// shared_physical_address = 0xda00000;
+
+	*kernel_shared_area_addr_ptr = (unsigned long)shared_virtual_address;
+	/* set the physical address of the shared area */
+	*phys_shared_area_addr_ptr = shared_physical_address;
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:shared_virtual_address is %p\n",
+	shared_virtual_address);
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:shared_region_size is %08lx\n",
+	shared_area_size);
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:shared_physical_addr is %08lx\n",
+	*phys_shared_area_addr_ptr);
+
+	return 0;
+}
+
+/*
+  This functions unmaps and deallocates the shared area
+  on the  external RAM (device)
+  The input is shared_area_size - the size of the memory to deallocate,kernel_
+  shared_area_addr_ptr - the kernel address of the mapped and allocated
+  shared area,phys_shared_area_addr_ptr - the physical address of
+  the shared area
+*/
+void sep_unmap_and_free_shared_area(unsigned long   shared_area_size,
+					unsigned long   kernel_shared_area_addr,
+					unsigned long   phys_shared_area_addr)
+{
+	kfree((void *)kernel_shared_area_addr);
+	return;
+}
+
+/*
+  This functions returns the physical address inside shared area according
+  to the virtual address. It can be either on the externa RAM device
+  (ioremapped), or on the system RAM
+  This implementation is for the external RAM
+*/
+unsigned long sep_shared_area_virt_to_phys(unsigned long virt_address)
+{
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:sh virt to phys v %08lx\n",
+	  virt_address);
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:sh virt to phys p %08lx\n",
+	  shared_physical_address
+	  + (virt_address - (unsigned long)shared_virtual_address));
+
+	return (unsigned long)shared_physical_address +
+	  (virt_address - (unsigned long)shared_virtual_address);
+}
+
+/*
+  This functions returns the virtual address inside shared area
+  according to the physical address. It can be either on the
+  externa RAM device (ioremapped), or on the system RAM This implementation
+  is for the external RAM
+*/
+unsigned long sep_shared_area_phys_to_virt(unsigned long phys_address)
+{
+	return (unsigned long)shared_virtual_address
+	  + (phys_address - shared_physical_address);
+}
+
+
+/*
+  function that is activaed on the succesfull probe of the SEP device
+*/
+static int __devinit sep_probe(struct pci_dev *pdev,
+			const struct pci_device_id *ent)
+{
+	/* error */
+	int error;
+
+	/*------------------------
+	CODE
+	---------------------------*/
+
+	DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+	  "Sep pci probe starting\n");
+	error = 0;
+
+	/* enable the device */
+	error = pci_enable_device(pdev);
+	if (error) {
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "error enabling pci device\n");
+		goto end_function;
+	}
+
+	/* set the pci dev pointer */
+	sep_pci_dev_ptr = pdev;
+
+	/* get the io memory start address */
+	io_memory_start_physical_address = pci_resource_start(pdev, 0);
+	if (!io_memory_start_physical_address) {
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "SEP Driver error pci resource start\n");
+		goto end_function;
+	}
+
+	/* get the io memory end address */
+	io_memory_end_physical_address = pci_resource_end(pdev, 0);
+	if (!io_memory_end_physical_address) {
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "SEP Driver error pci resource end\n");
+		goto end_function;
+	}
+
+	io_memory_size = io_memory_end_physical_address -
+	  io_memory_start_physical_address + 1;
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:io_memory_start_physical_address is %08lx\n",
+	io_memory_start_physical_address);
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:io_memory_end_phyaical_address is %08lx\n",
+	io_memory_end_physical_address);
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:io_memory_size is %08lx\n",
+	io_memory_size);
+
+	io_memory_start_virtual_address =
+	  ioremap_nocache(io_memory_start_physical_address,
+	  io_memory_size);
+	if (!io_memory_start_virtual_address) {
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "SEP Driver error ioremap of io memory\n");
+		goto end_function;
+	}
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:io_memory_start_virtual_address is %p\n",
+	io_memory_start_virtual_address);
+
+	g_sep_reg_base_address = (unsigned long)io_memory_start_virtual_address;
+
+
+	/* set up system base address and shared memory location */
+
+	rar_virtual_address = kmalloc(2 * SEP_RAR_IO_MEM_REGION_SIZE,
+	  GFP_KERNEL);
+
+	if (!rar_virtual_address) {
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "SEP Driver:cant kmalloc rar\n");
+		goto end_function;
+		}
+
+	rar_physical_address = __pa(rar_virtual_address);
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:rar_physical is %08lx\n",
+	rar_physical_address);
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver:rar_virtual is %p\n",
+	rar_virtual_address);
+
+
+#if !SEP_DRIVER_POLLING_MODE
+
+	DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver: about to write IMR and ICR REG_ADDR\n");
+
+	/* clear ICR register */
+	SEP_WRITE_REGISTER(g_sep_reg_base_address + HW_HOST_ICR_REG_ADDR,
+	  0xFFFFFFFF);
+
+	/* set the IMR register - open only GPR 2 */
+	SEP_WRITE_REGISTER(g_sep_reg_base_address + HW_HOST_IMR_REG_ADDR,
+	  (~(0x1 << 13)));
+
+	/* figure out our irq */
+	error = pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, (u8 *)&sep_irq);
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver: my irq is %d\n", sep_irq);
+
+	DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver: about to call request_irq\n");
+	/* get the interrupt line */
+	error = request_irq(sep_irq, sep_inthandler, IRQF_SHARED,
+	  "sep_driver", &g_sep_reg_base_address);
+	if (error)
+		goto end_function;
+
+	goto end_function;
+	DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver: about to write IMR REG_ADDR");
+
+	/* set the IMR register - open only GPR 2 */
+	SEP_WRITE_REGISTER(g_sep_reg_base_address + HW_HOST_IMR_REG_ADDR,
+	  (~(0x1 << 13)));
+
+#endif /* SEP_DRIVER_POLLING_MODE */
+
+end_function:
+
+	return error;
+}
+
+/*
+  this function registers th driver to
+  the device subsystem( either PCI, USB, etc)
+*/
+int sep_register_driver_to_device(void)
+{
+	return pci_register_driver(&sep_pci_driver);
+}
+
+
+
+void sep_load_rom_code()
+{
+#if SEP_DRIVER_ARM_DEBUG_MODE
+	/* Index variables */
+	unsigned long i, k, j;
+	unsigned long regVal;
+	unsigned long Error;
+	unsigned long warning;
+
+	/* Loading ROM from SEP_ROM_image.h file */
+	k = sizeof(CRYS_SEP_ROM);
+
+	DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver: DX_CC_TST_SepRomLoader start\n");
+
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver: k is %lu\n", k);
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver: g_sep_reg_base_address is %p\n",
+	  g_sep_reg_base_address);
+	DEBUG_PRINT_1(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver: CRYS_SEP_ROM_start_address_offset is %p\n",
+	  CRYS_SEP_ROM_start_address_offset);
+
+	for (i = 0; i < 4; i++) {
+		/* write bank */
+		SEP_WRITE_REGISTER(g_sep_reg_base_address
+		  + SEP_ROM_BANK_register_offset, i);
+
+		for (j = 0; j < CRYS_SEP_ROM_length / 4; j++) {
+			SEP_WRITE_REGISTER(g_sep_reg_base_address +
+			  CRYS_SEP_ROM_start_address_offset + 4*j,
+			  CRYS_SEP_ROM[i * 0x1000 + j]);
+
+			k = k - 4;
+
+			if (k == 0) {
+				j = CRYS_SEP_ROM_length;
+				i = 4;
+			}
+		}
+	}
+
+	/* reset the SEP*/
+	SEP_WRITE_REGISTER(g_sep_reg_base_address
+	  + HW_HOST_SEP_SW_RST_REG_ADDR, 0x1);
+
+	/* poll for SEP ROM boot finish */
+	do {
+		SEP_READ_REGISTER(g_sep_reg_base_address
+		  + HW_HOST_SEP_HOST_GPR3_REG_ADDR, regVal);
+	} while (!regVal);
+
+	DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+	  "SEP Driver: ROM polling ended\n");
+
+	switch (regVal) {
+	case 0x1:
+		/* fatal error - read erro status from GPRO */
+		SEP_READ_REGISTER(g_sep_reg_base_address
+		  + HW_HOST_SEP_HOST_GPR0_REG_ADDR, Error);
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "SEP Driver: ROM polling case 1\n");
+		break;
+	case 0x2:
+		/* Boot First Phase ended  */
+		SEP_READ_REGISTER(g_sep_reg_base_address
+		  + HW_HOST_SEP_HOST_GPR0_REG_ADDR, warning);
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "SEP Driver: ROM polling case 2\n");
+		break;
+	case 0x4:
+		/* Cold boot ended successfully  */
+		SEP_READ_REGISTER(g_sep_reg_base_address
+		  + HW_HOST_SEP_HOST_GPR0_REG_ADDR, warning);
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "SEP Driver: ROM polling case 4\n");
+		Error = 0;
+		break;
+	case 0x8:
+		/* Warmboot ended successfully */
+		SEP_READ_REGISTER(g_sep_reg_base_address
+		  + HW_HOST_SEP_HOST_GPR0_REG_ADDR, warning);
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "SEP Driver: ROM polling case 8\n");
+		Error = 0;
+		break;
+	case 0x10:
+		/* ColdWarm boot ended successfully */
+		SEP_READ_REGISTER(g_sep_reg_base_address
+		  + HW_HOST_SEP_HOST_GPR0_REG_ADDR, warning);
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "SEP Driver: ROM polling case 16\n");
+		Error = 0;
+		break;
+	case 0x20:
+		DEBUG_PRINT_0(SEP_DEBUG_LEVEL_EXTENDED,
+		  "SEP Driver: ROM polling case 32\n");
+		break;
+	}
+
+#endif
+}
+