Commit c3d1607a authored by Sekhar Nori's avatar Sekhar Nori Committed by Kevin Hilman

davinci: DA8XX/OMAP-L1XX: It's SYSCFG not BOOT_CFG

Rename the DA8XX_BOOT_CFG_BASE macro to get it in line
with the public documentation for these parts.
Signed-off-by: default avatarSekhar Nori <nsekhar@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
parent 5961f2fd
...@@ -1184,7 +1184,7 @@ static struct davinci_soc_info davinci_soc_info_da830 = { ...@@ -1184,7 +1184,7 @@ static struct davinci_soc_info davinci_soc_info_da830 = {
.cpu_clks = da830_clks, .cpu_clks = da830_clks,
.psc_bases = da830_psc_bases, .psc_bases = da830_psc_bases,
.psc_bases_num = ARRAY_SIZE(da830_psc_bases), .psc_bases_num = ARRAY_SIZE(da830_psc_bases),
.pinmux_base = IO_ADDRESS(DA8XX_BOOT_CFG_BASE + 0x120), .pinmux_base = IO_ADDRESS(DA8XX_SYSCFG_BASE + 0x120),
.pinmux_pins = da830_pins, .pinmux_pins = da830_pins,
.pinmux_pins_num = ARRAY_SIZE(da830_pins), .pinmux_pins_num = ARRAY_SIZE(da830_pins),
.intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT, .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT,
......
...@@ -799,7 +799,7 @@ static struct davinci_soc_info davinci_soc_info_da850 = { ...@@ -799,7 +799,7 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
.cpu_clks = da850_clks, .cpu_clks = da850_clks,
.psc_bases = da850_psc_bases, .psc_bases = da850_psc_bases,
.psc_bases_num = ARRAY_SIZE(da850_psc_bases), .psc_bases_num = ARRAY_SIZE(da850_psc_bases),
.pinmux_base = IO_ADDRESS(DA8XX_BOOT_CFG_BASE + 0x120), .pinmux_base = IO_ADDRESS(DA8XX_SYSCFG_BASE + 0x120),
.pinmux_pins = da850_pins, .pinmux_pins = da850_pins,
.pinmux_pins_num = ARRAY_SIZE(da850_pins), .pinmux_pins_num = ARRAY_SIZE(da850_pins),
.intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT, .intc_base = (void __iomem *)DA8XX_CP_INTC_VIRT,
......
...@@ -29,7 +29,7 @@ ...@@ -29,7 +29,7 @@
#define DA8XX_CP_INTC_SIZE SZ_8K #define DA8XX_CP_INTC_SIZE SZ_8K
#define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K) #define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
#define DA8XX_BOOT_CFG_BASE (IO_PHYS + 0x14000) #define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000)
#define DA8XX_PSC0_BASE 0x01c10000 #define DA8XX_PSC0_BASE 0x01c10000
#define DA8XX_PLL0_BASE 0x01c11000 #define DA8XX_PLL0_BASE 0x01c11000
......
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