Commit c1dcfd9d authored by Scott Wood's avatar Scott Wood Committed by Kumar Gala

[POWERPC] cpm_uart: sparse fixes

Mostly a bunch of direct access to in/out conversions, plus a few
cast removals, __iomem annotations, and miscellaneous cleanup.
Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 7ae87036
...@@ -56,21 +56,21 @@ struct uart_cpm_port { ...@@ -56,21 +56,21 @@ struct uart_cpm_port {
u16 rx_fifosize; u16 rx_fifosize;
u16 tx_nrfifos; u16 tx_nrfifos;
u16 tx_fifosize; u16 tx_fifosize;
smc_t *smcp; smc_t __iomem *smcp;
smc_uart_t *smcup; smc_uart_t __iomem *smcup;
scc_t *sccp; scc_t __iomem *sccp;
scc_uart_t *sccup; scc_uart_t __iomem *sccup;
volatile cbd_t *rx_bd_base; cbd_t __iomem *rx_bd_base;
volatile cbd_t *rx_cur; cbd_t __iomem *rx_cur;
volatile cbd_t *tx_bd_base; cbd_t __iomem *tx_bd_base;
volatile cbd_t *tx_cur; cbd_t __iomem *tx_cur;
unsigned char *tx_buf; unsigned char *tx_buf;
unsigned char *rx_buf; unsigned char *rx_buf;
u32 flags; u32 flags;
void (*set_lineif)(struct uart_cpm_port *); void (*set_lineif)(struct uart_cpm_port *);
u8 brg; u8 brg;
uint dp_addr; uint dp_addr;
void *mem_addr; void *mem_addr;
dma_addr_t dma_addr; dma_addr_t dma_addr;
u32 mem_size; u32 mem_size;
/* helpers */ /* helpers */
...@@ -106,34 +106,36 @@ void scc4_lineif(struct uart_cpm_port *pinfo); ...@@ -106,34 +106,36 @@ void scc4_lineif(struct uart_cpm_port *pinfo);
/* /*
virtual to phys transtalion virtual to phys transtalion
*/ */
static inline unsigned long cpu2cpm_addr(void* addr, struct uart_cpm_port *pinfo) static inline unsigned long cpu2cpm_addr(void *addr,
struct uart_cpm_port *pinfo)
{ {
int offset; int offset;
u32 val = (u32)addr; u32 val = (u32)addr;
u32 mem = (u32)pinfo->mem_addr;
/* sane check */ /* sane check */
if (likely((val >= (u32)pinfo->mem_addr)) && if (likely(val >= mem && val < mem + pinfo->mem_size)) {
(val<((u32)pinfo->mem_addr + pinfo->mem_size))) { offset = val - mem;
offset = val - (u32)pinfo->mem_addr; return pinfo->dma_addr + offset;
return pinfo->dma_addr+offset;
} }
/* something nasty happened */ /* something nasty happened */
BUG(); BUG();
return 0; return 0;
} }
static inline void *cpm2cpu_addr(unsigned long addr, struct uart_cpm_port *pinfo) static inline void *cpm2cpu_addr(unsigned long addr,
struct uart_cpm_port *pinfo)
{ {
int offset; int offset;
u32 val = addr; u32 val = addr;
u32 dma = (u32)pinfo->dma_addr;
/* sane check */ /* sane check */
if (likely((val >= pinfo->dma_addr) && if (likely(val >= dma && val < dma + pinfo->mem_size)) {
(val<(pinfo->dma_addr + pinfo->mem_size)))) { offset = val - dma;
offset = val - (u32)pinfo->dma_addr; return pinfo->mem_addr + offset;
return (void*)(pinfo->mem_addr+offset);
} }
/* something nasty happened */ /* something nasty happened */
BUG(); BUG();
return 0; return NULL;
} }
......
...@@ -131,14 +131,14 @@ static int cpm_uart_id2nr(int id) ...@@ -131,14 +131,14 @@ static int cpm_uart_id2nr(int id)
static unsigned int cpm_uart_tx_empty(struct uart_port *port) static unsigned int cpm_uart_tx_empty(struct uart_port *port)
{ {
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
volatile cbd_t *bdp = pinfo->tx_bd_base; cbd_t __iomem *bdp = pinfo->tx_bd_base;
int ret = 0; int ret = 0;
while (1) { while (1) {
if (bdp->cbd_sc & BD_SC_READY) if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
break; break;
if (bdp->cbd_sc & BD_SC_WRAP) { if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
ret = TIOCSER_TEMT; ret = TIOCSER_TEMT;
break; break;
} }
...@@ -167,15 +167,15 @@ static unsigned int cpm_uart_get_mctrl(struct uart_port *port) ...@@ -167,15 +167,15 @@ static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
static void cpm_uart_stop_tx(struct uart_port *port) static void cpm_uart_stop_tx(struct uart_port *port)
{ {
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
volatile smc_t *smcp = pinfo->smcp; smc_t __iomem *smcp = pinfo->smcp;
volatile scc_t *sccp = pinfo->sccp; scc_t __iomem *sccp = pinfo->sccp;
pr_debug("CPM uart[%d]:stop tx\n", port->line); pr_debug("CPM uart[%d]:stop tx\n", port->line);
if (IS_SMC(pinfo)) if (IS_SMC(pinfo))
smcp->smc_smcm &= ~SMCM_TX; clrbits8(&smcp->smc_smcm, SMCM_TX);
else else
sccp->scc_sccm &= ~UART_SCCM_TX; clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
} }
/* /*
...@@ -184,24 +184,24 @@ static void cpm_uart_stop_tx(struct uart_port *port) ...@@ -184,24 +184,24 @@ static void cpm_uart_stop_tx(struct uart_port *port)
static void cpm_uart_start_tx(struct uart_port *port) static void cpm_uart_start_tx(struct uart_port *port)
{ {
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
volatile smc_t *smcp = pinfo->smcp; smc_t __iomem *smcp = pinfo->smcp;
volatile scc_t *sccp = pinfo->sccp; scc_t __iomem *sccp = pinfo->sccp;
pr_debug("CPM uart[%d]:start tx\n", port->line); pr_debug("CPM uart[%d]:start tx\n", port->line);
if (IS_SMC(pinfo)) { if (IS_SMC(pinfo)) {
if (smcp->smc_smcm & SMCM_TX) if (in_8(&smcp->smc_smcm) & SMCM_TX)
return; return;
} else { } else {
if (sccp->scc_sccm & UART_SCCM_TX) if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
return; return;
} }
if (cpm_uart_tx_pump(port) != 0) { if (cpm_uart_tx_pump(port) != 0) {
if (IS_SMC(pinfo)) { if (IS_SMC(pinfo)) {
smcp->smc_smcm |= SMCM_TX; setbits8(&smcp->smc_smcm, SMCM_TX);
} else { } else {
sccp->scc_sccm |= UART_SCCM_TX; setbits16(&sccp->scc_sccm, UART_SCCM_TX);
} }
} }
} }
...@@ -212,15 +212,15 @@ static void cpm_uart_start_tx(struct uart_port *port) ...@@ -212,15 +212,15 @@ static void cpm_uart_start_tx(struct uart_port *port)
static void cpm_uart_stop_rx(struct uart_port *port) static void cpm_uart_stop_rx(struct uart_port *port)
{ {
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
volatile smc_t *smcp = pinfo->smcp; smc_t __iomem *smcp = pinfo->smcp;
volatile scc_t *sccp = pinfo->sccp; scc_t __iomem *sccp = pinfo->sccp;
pr_debug("CPM uart[%d]:stop rx\n", port->line); pr_debug("CPM uart[%d]:stop rx\n", port->line);
if (IS_SMC(pinfo)) if (IS_SMC(pinfo))
smcp->smc_smcm &= ~SMCM_RX; clrbits8(&smcp->smc_smcm, SMCM_RX);
else else
sccp->scc_sccm &= ~UART_SCCM_RX; clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
} }
/* /*
...@@ -263,10 +263,11 @@ static void cpm_uart_int_tx(struct uart_port *port) ...@@ -263,10 +263,11 @@ static void cpm_uart_int_tx(struct uart_port *port)
static void cpm_uart_int_rx(struct uart_port *port) static void cpm_uart_int_rx(struct uart_port *port)
{ {
int i; int i;
unsigned char ch, *cp; unsigned char ch;
u8 *cp;
struct tty_struct *tty = port->info->tty; struct tty_struct *tty = port->info->tty;
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
volatile cbd_t *bdp; cbd_t __iomem *bdp;
u16 status; u16 status;
unsigned int flg; unsigned int flg;
...@@ -278,13 +279,13 @@ static void cpm_uart_int_rx(struct uart_port *port) ...@@ -278,13 +279,13 @@ static void cpm_uart_int_rx(struct uart_port *port)
bdp = pinfo->rx_cur; bdp = pinfo->rx_cur;
for (;;) { for (;;) {
/* get status */ /* get status */
status = bdp->cbd_sc; status = in_be16(&bdp->cbd_sc);
/* If this one is empty, return happy */ /* If this one is empty, return happy */
if (status & BD_SC_EMPTY) if (status & BD_SC_EMPTY)
break; break;
/* get number of characters, and check spce in flip-buffer */ /* get number of characters, and check spce in flip-buffer */
i = bdp->cbd_datlen; i = in_be16(&bdp->cbd_datlen);
/* If we have not enough room in tty flip buffer, then we try /* If we have not enough room in tty flip buffer, then we try
* later, which will be the next rx-interrupt or a timeout * later, which will be the next rx-interrupt or a timeout
...@@ -295,7 +296,7 @@ static void cpm_uart_int_rx(struct uart_port *port) ...@@ -295,7 +296,7 @@ static void cpm_uart_int_rx(struct uart_port *port)
} }
/* get pointer */ /* get pointer */
cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
/* loop through the buffer */ /* loop through the buffer */
while (i-- > 0) { while (i-- > 0) {
...@@ -315,10 +316,11 @@ static void cpm_uart_int_rx(struct uart_port *port) ...@@ -315,10 +316,11 @@ static void cpm_uart_int_rx(struct uart_port *port)
} /* End while (i--) */ } /* End while (i--) */
/* This BD is ready to be used again. Clear status. get next */ /* This BD is ready to be used again. Clear status. get next */
bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID); clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
bdp->cbd_sc |= BD_SC_EMPTY; BD_SC_OV | BD_SC_ID);
setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
if (bdp->cbd_sc & BD_SC_WRAP) if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
bdp = pinfo->rx_bd_base; bdp = pinfo->rx_bd_base;
else else
bdp++; bdp++;
...@@ -326,7 +328,7 @@ static void cpm_uart_int_rx(struct uart_port *port) ...@@ -326,7 +328,7 @@ static void cpm_uart_int_rx(struct uart_port *port)
} /* End for (;;) */ } /* End for (;;) */
/* Write back buffer pointer */ /* Write back buffer pointer */
pinfo->rx_cur = (volatile cbd_t *) bdp; pinfo->rx_cur = bdp;
/* activate BH processing */ /* activate BH processing */
tty_flip_buffer_push(tty); tty_flip_buffer_push(tty);
...@@ -380,14 +382,14 @@ static irqreturn_t cpm_uart_int(int irq, void *data) ...@@ -380,14 +382,14 @@ static irqreturn_t cpm_uart_int(int irq, void *data)
u8 events; u8 events;
struct uart_port *port = (struct uart_port *)data; struct uart_port *port = (struct uart_port *)data;
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
volatile smc_t *smcp = pinfo->smcp; smc_t __iomem *smcp = pinfo->smcp;
volatile scc_t *sccp = pinfo->sccp; scc_t __iomem *sccp = pinfo->sccp;
pr_debug("CPM uart[%d]:IRQ\n", port->line); pr_debug("CPM uart[%d]:IRQ\n", port->line);
if (IS_SMC(pinfo)) { if (IS_SMC(pinfo)) {
events = smcp->smc_smce; events = in_8(&smcp->smc_smce);
smcp->smc_smce = events; out_8(&smcp->smc_smce, events);
if (events & SMCM_BRKE) if (events & SMCM_BRKE)
uart_handle_break(port); uart_handle_break(port);
if (events & SMCM_RX) if (events & SMCM_RX)
...@@ -395,8 +397,8 @@ static irqreturn_t cpm_uart_int(int irq, void *data) ...@@ -395,8 +397,8 @@ static irqreturn_t cpm_uart_int(int irq, void *data)
if (events & SMCM_TX) if (events & SMCM_TX)
cpm_uart_int_tx(port); cpm_uart_int_tx(port);
} else { } else {
events = sccp->scc_scce; events = in_be16(&sccp->scc_scce);
sccp->scc_scce = events; out_be16(&sccp->scc_scce, events);
if (events & UART_SCCM_BRKE) if (events & UART_SCCM_BRKE)
uart_handle_break(port); uart_handle_break(port);
if (events & UART_SCCM_RX) if (events & UART_SCCM_RX)
...@@ -421,11 +423,11 @@ static int cpm_uart_startup(struct uart_port *port) ...@@ -421,11 +423,11 @@ static int cpm_uart_startup(struct uart_port *port)
/* Startup rx-int */ /* Startup rx-int */
if (IS_SMC(pinfo)) { if (IS_SMC(pinfo)) {
pinfo->smcp->smc_smcm |= SMCM_RX; setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
pinfo->smcp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN); setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
} else { } else {
pinfo->sccp->scc_sccm |= UART_SCCM_RX; setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
pinfo->sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
} }
if (!(pinfo->flags & FLAG_CONSOLE)) if (!(pinfo->flags & FLAG_CONSOLE))
...@@ -464,13 +466,13 @@ static void cpm_uart_shutdown(struct uart_port *port) ...@@ -464,13 +466,13 @@ static void cpm_uart_shutdown(struct uart_port *port)
/* Stop uarts */ /* Stop uarts */
if (IS_SMC(pinfo)) { if (IS_SMC(pinfo)) {
volatile smc_t *smcp = pinfo->smcp; smc_t __iomem *smcp = pinfo->smcp;
smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX); clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
} else { } else {
volatile scc_t *sccp = pinfo->sccp; scc_t __iomem *sccp = pinfo->sccp;
sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX); clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
} }
/* Shut them really down and reinit buffer descriptors */ /* Shut them really down and reinit buffer descriptors */
...@@ -492,8 +494,8 @@ static void cpm_uart_set_termios(struct uart_port *port, ...@@ -492,8 +494,8 @@ static void cpm_uart_set_termios(struct uart_port *port,
u16 cval, scval, prev_mode; u16 cval, scval, prev_mode;
int bits, sbits; int bits, sbits;
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
volatile smc_t *smcp = pinfo->smcp; smc_t __iomem *smcp = pinfo->smcp;
volatile scc_t *sccp = pinfo->sccp; scc_t __iomem *sccp = pinfo->sccp;
pr_debug("CPM uart[%d]:set_termios\n", port->line); pr_debug("CPM uart[%d]:set_termios\n", port->line);
...@@ -588,11 +590,11 @@ static void cpm_uart_set_termios(struct uart_port *port, ...@@ -588,11 +590,11 @@ static void cpm_uart_set_termios(struct uart_port *port,
* enables, because we want to put them back if they were * enables, because we want to put them back if they were
* present. * present.
*/ */
prev_mode = smcp->smc_smcmr; prev_mode = in_be16(&smcp->smc_smcmr);
smcp->smc_smcmr = smcr_mk_clen(bits) | cval | SMCMR_SM_UART; out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval | SMCMR_SM_UART);
smcp->smc_smcmr |= (prev_mode & (SMCMR_REN | SMCMR_TEN)); setbits16(&smcp->smc_smcmr, (prev_mode & (SMCMR_REN | SMCMR_TEN)));
} else { } else {
sccp->scc_psmr = (sbits << 12) | scval; out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
} }
cpm_set_brg(pinfo->brg - 1, baud); cpm_set_brg(pinfo->brg - 1, baud);
...@@ -630,8 +632,8 @@ static int cpm_uart_verify_port(struct uart_port *port, ...@@ -630,8 +632,8 @@ static int cpm_uart_verify_port(struct uart_port *port,
*/ */
static int cpm_uart_tx_pump(struct uart_port *port) static int cpm_uart_tx_pump(struct uart_port *port)
{ {
volatile cbd_t *bdp; cbd_t __iomem *bdp;
unsigned char *p; u8 *p;
int count; int count;
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port; struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
struct circ_buf *xmit = &port->info->xmit; struct circ_buf *xmit = &port->info->xmit;
...@@ -641,13 +643,14 @@ static int cpm_uart_tx_pump(struct uart_port *port) ...@@ -641,13 +643,14 @@ static int cpm_uart_tx_pump(struct uart_port *port)
/* Pick next descriptor and fill from buffer */ /* Pick next descriptor and fill from buffer */
bdp = pinfo->tx_cur; bdp = pinfo->tx_cur;
p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
*p++ = port->x_char; *p++ = port->x_char;
bdp->cbd_datlen = 1;
bdp->cbd_sc |= BD_SC_READY; out_be16(&bdp->cbd_datlen, 1);
setbits16(&bdp->cbd_sc, BD_SC_READY);
/* Get next BD. */ /* Get next BD. */
if (bdp->cbd_sc & BD_SC_WRAP) if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
bdp = pinfo->tx_bd_base; bdp = pinfo->tx_bd_base;
else else
bdp++; bdp++;
...@@ -666,9 +669,10 @@ static int cpm_uart_tx_pump(struct uart_port *port) ...@@ -666,9 +669,10 @@ static int cpm_uart_tx_pump(struct uart_port *port)
/* Pick next descriptor and fill from buffer */ /* Pick next descriptor and fill from buffer */
bdp = pinfo->tx_cur; bdp = pinfo->tx_cur;
while (!(bdp->cbd_sc & BD_SC_READY) && (xmit->tail != xmit->head)) { while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) &&
xmit->tail != xmit->head) {
count = 0; count = 0;
p = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
while (count < pinfo->tx_fifosize) { while (count < pinfo->tx_fifosize) {
*p++ = xmit->buf[xmit->tail]; *p++ = xmit->buf[xmit->tail];
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
...@@ -677,11 +681,10 @@ static int cpm_uart_tx_pump(struct uart_port *port) ...@@ -677,11 +681,10 @@ static int cpm_uart_tx_pump(struct uart_port *port)
if (xmit->head == xmit->tail) if (xmit->head == xmit->tail)
break; break;
} }
bdp->cbd_datlen = count; out_be16(&bdp->cbd_datlen, count);
bdp->cbd_sc |= BD_SC_READY; setbits16(&bdp->cbd_sc, BD_SC_READY);
eieio();
/* Get next BD. */ /* Get next BD. */
if (bdp->cbd_sc & BD_SC_WRAP) if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
bdp = pinfo->tx_bd_base; bdp = pinfo->tx_bd_base;
else else
bdp++; bdp++;
...@@ -706,7 +709,7 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo) ...@@ -706,7 +709,7 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
{ {
int i; int i;
u8 *mem_addr; u8 *mem_addr;
volatile cbd_t *bdp; cbd_t __iomem *bdp;
pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line); pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
...@@ -717,13 +720,13 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo) ...@@ -717,13 +720,13 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
mem_addr = pinfo->mem_addr; mem_addr = pinfo->mem_addr;
bdp = pinfo->rx_cur = pinfo->rx_bd_base; bdp = pinfo->rx_cur = pinfo->rx_bd_base;
for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) { for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo); out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
bdp->cbd_sc = BD_SC_EMPTY | BD_SC_INTRPT; out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
mem_addr += pinfo->rx_fifosize; mem_addr += pinfo->rx_fifosize;
} }
bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo); out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
bdp->cbd_sc = BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT; out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
/* Set the physical address of the host memory /* Set the physical address of the host memory
* buffers in the buffer descriptors, and the * buffers in the buffer descriptors, and the
...@@ -732,19 +735,19 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo) ...@@ -732,19 +735,19 @@ static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize); mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
bdp = pinfo->tx_cur = pinfo->tx_bd_base; bdp = pinfo->tx_cur = pinfo->tx_bd_base;
for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) { for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo); out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
bdp->cbd_sc = BD_SC_INTRPT; out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
mem_addr += pinfo->tx_fifosize; mem_addr += pinfo->tx_fifosize;
} }
bdp->cbd_bufaddr = cpu2cpm_addr(mem_addr, pinfo); out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
bdp->cbd_sc = BD_SC_WRAP | BD_SC_INTRPT; out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
} }
static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
{ {
volatile scc_t *scp; scc_t __iomem *scp;
volatile scc_uart_t *sup; scc_uart_t __iomem *sup;
pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line); pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
...@@ -752,8 +755,10 @@ static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) ...@@ -752,8 +755,10 @@ static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
sup = pinfo->sccup; sup = pinfo->sccup;
/* Store address */ /* Store address */
pinfo->sccup->scc_genscc.scc_rbase = (unsigned char *)pinfo->rx_bd_base - DPRAM_BASE; out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
pinfo->sccup->scc_genscc.scc_tbase = (unsigned char *)pinfo->tx_bd_base - DPRAM_BASE; (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
(u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
/* Set up the uart parameters in the /* Set up the uart parameters in the
* parameter ram. * parameter ram.
...@@ -761,25 +766,25 @@ static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) ...@@ -761,25 +766,25 @@ static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
cpm_set_scc_fcr(sup); cpm_set_scc_fcr(sup);
sup->scc_genscc.scc_mrblr = pinfo->rx_fifosize; out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
sup->scc_maxidl = pinfo->rx_fifosize; out_be16(&sup->scc_maxidl, pinfo->rx_fifosize);
sup->scc_brkcr = 1; out_be16(&sup->scc_brkcr, 1);
sup->scc_parec = 0; out_be16(&sup->scc_parec, 0);
sup->scc_frmec = 0; out_be16(&sup->scc_frmec, 0);
sup->scc_nosec = 0; out_be16(&sup->scc_nosec, 0);
sup->scc_brkec = 0; out_be16(&sup->scc_brkec, 0);
sup->scc_uaddr1 = 0; out_be16(&sup->scc_uaddr1, 0);
sup->scc_uaddr2 = 0; out_be16(&sup->scc_uaddr2, 0);
sup->scc_toseq = 0; out_be16(&sup->scc_toseq, 0);
sup->scc_char1 = 0x8000; out_be16(&sup->scc_char1, 0x8000);
sup->scc_char2 = 0x8000; out_be16(&sup->scc_char2, 0x8000);
sup->scc_char3 = 0x8000; out_be16(&sup->scc_char3, 0x8000);
sup->scc_char4 = 0x8000; out_be16(&sup->scc_char4, 0x8000);
sup->scc_char5 = 0x8000; out_be16(&sup->scc_char5, 0x8000);
sup->scc_char6 = 0x8000; out_be16(&sup->scc_char6, 0x8000);
sup->scc_char7 = 0x8000; out_be16(&sup->scc_char7, 0x8000);
sup->scc_char8 = 0x8000; out_be16(&sup->scc_char8, 0x8000);
sup->scc_rccm = 0xc0ff; out_be16(&sup->scc_rccm, 0xc0ff);
/* Send the CPM an initialize command. /* Send the CPM an initialize command.
*/ */
...@@ -788,23 +793,23 @@ static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) ...@@ -788,23 +793,23 @@ static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
/* Set UART mode, 8 bit, no parity, one stop. /* Set UART mode, 8 bit, no parity, one stop.
* Enable receive and transmit. * Enable receive and transmit.
*/ */
scp->scc_gsmrh = 0; out_be32(&scp->scc_gsmrh, 0);
scp->scc_gsmrl = out_be32(&scp->scc_gsmrl,
(SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16); SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
/* Enable rx interrupts and clear all pending events. */ /* Enable rx interrupts and clear all pending events. */
scp->scc_sccm = 0; out_be16(&scp->scc_sccm, 0);
scp->scc_scce = 0xffff; out_be16(&scp->scc_scce, 0xffff);
scp->scc_dsr = 0x7e7e; out_be16(&scp->scc_dsr, 0x7e7e);
scp->scc_psmr = 0x3000; out_be16(&scp->scc_psmr, 0x3000);
scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
} }
static void cpm_uart_init_smc(struct uart_cpm_port *pinfo) static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
{ {
volatile smc_t *sp; smc_t __iomem *sp;
volatile smc_uart_t *up; smc_uart_t __iomem *up;
pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line); pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
...@@ -812,19 +817,21 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo) ...@@ -812,19 +817,21 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
up = pinfo->smcup; up = pinfo->smcup;
/* Store address */ /* Store address */
pinfo->smcup->smc_rbase = (u_char *)pinfo->rx_bd_base - DPRAM_BASE; out_be16(&pinfo->smcup->smc_rbase,
pinfo->smcup->smc_tbase = (u_char *)pinfo->tx_bd_base - DPRAM_BASE; (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
out_be16(&pinfo->smcup->smc_tbase,
(u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
/* /*
* In case SMC1 is being relocated... * In case SMC1 is being relocated...
*/ */
#if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH) #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
up->smc_rbptr = pinfo->smcup->smc_rbase; out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
up->smc_tbptr = pinfo->smcup->smc_tbase; out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
up->smc_rstate = 0; out_be32(&up->smc_rstate, 0);
up->smc_tstate = 0; out_be32(&up->smc_tstate, 0);
up->smc_brkcr = 1; /* number of break chars */ out_be16(&up->smc_brkcr, 1); /* number of break chars */
up->smc_brkec = 0; out_be16(&up->smc_brkec, 0);
#endif #endif
/* Set up the uart parameters in the /* Set up the uart parameters in the
...@@ -833,24 +840,24 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo) ...@@ -833,24 +840,24 @@ static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
cpm_set_smc_fcr(up); cpm_set_smc_fcr(up);
/* Using idle charater time requires some additional tuning. */ /* Using idle charater time requires some additional tuning. */
up->smc_mrblr = pinfo->rx_fifosize; out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
up->smc_maxidl = pinfo->rx_fifosize; out_be16(&up->smc_maxidl, pinfo->rx_fifosize);
up->smc_brklen = 0; out_be16(&up->smc_brklen, 0);
up->smc_brkec = 0; out_be16(&up->smc_brkec, 0);
up->smc_brkcr = 1; out_be16(&up->smc_brkcr, 1);
cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX); cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
/* Set UART mode, 8 bit, no parity, one stop. /* Set UART mode, 8 bit, no parity, one stop.
* Enable receive and transmit. * Enable receive and transmit.
*/ */
sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART; out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
/* Enable only rx interrupts clear all pending events. */ /* Enable only rx interrupts clear all pending events. */
sp->smc_smcm = 0; out_8(&sp->smc_smcm, 0);
sp->smc_smce = 0xff; out_8(&sp->smc_smce, 0xff);
sp->smc_smcmr |= (SMCMR_REN | SMCMR_TEN); setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
} }
/* /*
...@@ -868,11 +875,11 @@ static int cpm_uart_request_port(struct uart_port *port) ...@@ -868,11 +875,11 @@ static int cpm_uart_request_port(struct uart_port *port)
return 0; return 0;
if (IS_SMC(pinfo)) { if (IS_SMC(pinfo)) {
pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX); clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
} else { } else {
pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX); clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
} }
ret = cpm_uart_allocbuf(pinfo, 0); ret = cpm_uart_allocbuf(pinfo, 0);
...@@ -931,10 +938,11 @@ static struct uart_ops cpm_uart_pops = { ...@@ -931,10 +938,11 @@ static struct uart_ops cpm_uart_pops = {
#ifdef CONFIG_PPC_CPM_NEW_BINDING #ifdef CONFIG_PPC_CPM_NEW_BINDING
struct uart_cpm_port cpm_uart_ports[UART_NR]; struct uart_cpm_port cpm_uart_ports[UART_NR];
int cpm_uart_init_port(struct device_node *np, struct uart_cpm_port *pinfo) static int cpm_uart_init_port(struct device_node *np,
struct uart_cpm_port *pinfo)
{ {
const u32 *data; const u32 *data;
void __iomem *mem, __iomem *pram; void __iomem *mem, *pram;
int len; int len;
int ret; int ret;
...@@ -1169,8 +1177,8 @@ static void cpm_uart_console_write(struct console *co, const char *s, ...@@ -1169,8 +1177,8 @@ static void cpm_uart_console_write(struct console *co, const char *s,
&cpm_uart_ports[cpm_uart_port_map[co->index]]; &cpm_uart_ports[cpm_uart_port_map[co->index]];
#endif #endif
unsigned int i; unsigned int i;
volatile cbd_t *bdp, *bdbase; cbd_t __iomem *bdp, *bdbase;
volatile unsigned char *cp; unsigned char *cp;
/* Get the address of the host memory buffer. /* Get the address of the host memory buffer.
*/ */
...@@ -1188,37 +1196,36 @@ static void cpm_uart_console_write(struct console *co, const char *s, ...@@ -1188,37 +1196,36 @@ static void cpm_uart_console_write(struct console *co, const char *s,
* Ready indicates output is ready, and xmt is doing * Ready indicates output is ready, and xmt is doing
* that, not that it is ready for us to send. * that, not that it is ready for us to send.
*/ */
while ((bdp->cbd_sc & BD_SC_READY) != 0) while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
; ;
/* Send the character out. /* Send the character out.
* If the buffer address is in the CPM DPRAM, don't * If the buffer address is in the CPM DPRAM, don't
* convert it. * convert it.
*/ */
cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
*cp = *s; *cp = *s;
bdp->cbd_datlen = 1; out_be16(&bdp->cbd_datlen, 1);
bdp->cbd_sc |= BD_SC_READY; setbits16(&bdp->cbd_sc, BD_SC_READY);
if (bdp->cbd_sc & BD_SC_WRAP) if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
bdp = bdbase; bdp = bdbase;
else else
bdp++; bdp++;
/* if a LF, also do CR... */ /* if a LF, also do CR... */
if (*s == 10) { if (*s == 10) {
while ((bdp->cbd_sc & BD_SC_READY) != 0) while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
; ;
cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo); cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
*cp = 13; *cp = 13;
bdp->cbd_datlen = 1;
bdp->cbd_sc |= BD_SC_READY;
if (bdp->cbd_sc & BD_SC_WRAP) out_be16(&bdp->cbd_datlen, 1);
setbits16(&bdp->cbd_sc, BD_SC_READY);
if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
bdp = bdbase; bdp = bdbase;
else else
bdp++; bdp++;
...@@ -1229,10 +1236,10 @@ static void cpm_uart_console_write(struct console *co, const char *s, ...@@ -1229,10 +1236,10 @@ static void cpm_uart_console_write(struct console *co, const char *s,
* Finally, Wait for transmitter & holding register to empty * Finally, Wait for transmitter & holding register to empty
* and restore the IER * and restore the IER
*/ */
while ((bdp->cbd_sc & BD_SC_READY) != 0) while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
; ;
pinfo->tx_cur = (volatile cbd_t *) bdp; pinfo->tx_cur = bdp;
} }
...@@ -1319,11 +1326,11 @@ static int __init cpm_uart_console_setup(struct console *co, char *options) ...@@ -1319,11 +1326,11 @@ static int __init cpm_uart_console_setup(struct console *co, char *options)
#endif #endif
if (IS_SMC(pinfo)) { if (IS_SMC(pinfo)) {
pinfo->smcp->smc_smcm &= ~(SMCM_RX | SMCM_TX); clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
pinfo->smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
} else { } else {
pinfo->sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX); clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
pinfo->sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
} }
ret = cpm_uart_allocbuf(pinfo, 1); ret = cpm_uart_allocbuf(pinfo, 1);
...@@ -1354,7 +1361,7 @@ static struct console cpm_scc_uart_console = { ...@@ -1354,7 +1361,7 @@ static struct console cpm_scc_uart_console = {
.data = &cpm_reg, .data = &cpm_reg,
}; };
int __init cpm_uart_console_init(void) static int __init cpm_uart_console_init(void)
{ {
register_console(&cpm_scc_uart_console); register_console(&cpm_scc_uart_console);
return 0; return 0;
......
...@@ -179,7 +179,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) ...@@ -179,7 +179,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos
* pinfo->rx_fifosize); * pinfo->rx_fifosize);
pinfo->rx_bd_base = (volatile cbd_t *)dp_mem; pinfo->rx_bd_base = (cbd_t __iomem __force *)dp_mem;
pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos;
return 0; return 0;
......
...@@ -27,18 +27,18 @@ static inline void cpm_set_brg(int brg, int baud) ...@@ -27,18 +27,18 @@ static inline void cpm_set_brg(int brg, int baud)
cpm_setbrg(brg, baud); cpm_setbrg(brg, baud);
} }
static inline void cpm_set_scc_fcr(volatile scc_uart_t * sup) static inline void cpm_set_scc_fcr(scc_uart_t __iomem * sup)
{ {
sup->scc_genscc.scc_rfcr = SMC_EB; out_8(&sup->scc_genscc.scc_rfcr, SMC_EB);
sup->scc_genscc.scc_tfcr = SMC_EB; out_8(&sup->scc_genscc.scc_tfcr, SMC_EB);
} }
static inline void cpm_set_smc_fcr(volatile smc_uart_t * up) static inline void cpm_set_smc_fcr(smc_uart_t __iomem * up)
{ {
up->smc_rfcr = SMC_EB; out_8(&up->smc_rfcr, SMC_EB);
up->smc_tfcr = SMC_EB; out_8(&up->smc_tfcr, SMC_EB);
} }
#define DPRAM_BASE ((unsigned char *)cpm_dpram_addr(0)) #define DPRAM_BASE ((u8 __iomem __force *)cpm_dpram_addr(0))
#endif #endif
...@@ -278,7 +278,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con) ...@@ -278,7 +278,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos
* pinfo->rx_fifosize); * pinfo->rx_fifosize);
pinfo->rx_bd_base = (volatile cbd_t *)dp_mem; pinfo->rx_bd_base = (cbd_t __iomem __force *)dp_mem;
pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos; pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos;
return 0; return 0;
...@@ -289,7 +289,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo) ...@@ -289,7 +289,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
dma_free_coherent(NULL, L1_CACHE_ALIGN(pinfo->rx_nrfifos * dma_free_coherent(NULL, L1_CACHE_ALIGN(pinfo->rx_nrfifos *
pinfo->rx_fifosize) + pinfo->rx_fifosize) +
L1_CACHE_ALIGN(pinfo->tx_nrfifos * L1_CACHE_ALIGN(pinfo->tx_nrfifos *
pinfo->tx_fifosize), pinfo->mem_addr, pinfo->tx_fifosize), (void __force *)pinfo->mem_addr,
pinfo->dma_addr); pinfo->dma_addr);
cpm_dpfree(pinfo->dp_addr); cpm_dpfree(pinfo->dp_addr);
......
...@@ -27,18 +27,18 @@ static inline void cpm_set_brg(int brg, int baud) ...@@ -27,18 +27,18 @@ static inline void cpm_set_brg(int brg, int baud)
cpm_setbrg(brg, baud); cpm_setbrg(brg, baud);
} }
static inline void cpm_set_scc_fcr(volatile scc_uart_t * sup) static inline void cpm_set_scc_fcr(scc_uart_t __iomem *sup)
{ {
sup->scc_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB; out_8(&sup->scc_genscc.scc_rfcr, CPMFCR_GBL | CPMFCR_EB);
sup->scc_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB; out_8(&sup->scc_genscc.scc_tfcr, CPMFCR_GBL | CPMFCR_EB);
} }
static inline void cpm_set_smc_fcr(volatile smc_uart_t * up) static inline void cpm_set_smc_fcr(smc_uart_t __iomem *up)
{ {
up->smc_rfcr = CPMFCR_GBL | CPMFCR_EB; out_8(&up->smc_rfcr, CPMFCR_GBL | CPMFCR_EB);
up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB; out_8(&up->smc_tfcr, CPMFCR_GBL | CPMFCR_EB);
} }
#define DPRAM_BASE ((unsigned char *)cpm_dpram_addr(0)) #define DPRAM_BASE ((u8 __iomem __force *)cpm_dpram_addr(0))
#endif #endif
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