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Commit c17e3325 authored by Paul Mackerras's avatar Paul Mackerras
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ppc64: Use SPRN_ prefix for special purpose register names 

Now that we are using the merged reg.h we have to use the SPRN_xxx
names rather than the xxx names.
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 69a80d3f
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Showing with 112 additions and 112 deletions
arch/ppc64/kernel/entry.S
View file @ c17e3325
...@@ -191,8 +191,8 @@ syscall_exit_trace_cont: ...@@ -191,8 +191,8 @@ syscall_exit_trace_cont:
ld r1,GPR1(r1) ld r1,GPR1(r1)
mtlr r4 mtlr r4
mtcr r5 mtcr r5
mtspr SRR0,r7 mtspr SPRN_SRR0,r7
mtspr SRR1,r8 mtspr SPRN_SRR1,r8
rfid rfid
b . /* prevent speculative execution */ b . /* prevent speculative execution */
...@@ -531,7 +531,7 @@ restore: ...@@ -531,7 +531,7 @@ restore:
mtctr r3 mtctr r3
mtlr r0 mtlr r0
ld r3,_XER(r1) ld r3,_XER(r1)
mtspr XER,r3 mtspr SPRN_XER,r3
REST_8GPRS(5, r1) REST_8GPRS(5, r1)
...@@ -543,12 +543,12 @@ restore: ...@@ -543,12 +543,12 @@ restore:
mtmsrd r0,1 mtmsrd r0,1
ld r0,_MSR(r1) ld r0,_MSR(r1)
mtspr SRR1,r0 mtspr SPRN_SRR1,r0
ld r2,_CCR(r1) ld r2,_CCR(r1)
mtcrf 0xFF,r2 mtcrf 0xFF,r2
ld r2,_NIP(r1) ld r2,_NIP(r1)
mtspr SRR0,r2 mtspr SPRN_SRR0,r2
ld r0,GPR0(r1) ld r0,GPR0(r1)
ld r2,GPR2(r1) ld r2,GPR2(r1)
...@@ -643,7 +643,7 @@ _GLOBAL(enter_rtas) ...@@ -643,7 +643,7 @@ _GLOBAL(enter_rtas)
std r4,_CCR(r1) std r4,_CCR(r1)
mfctr r5 mfctr r5
std r5,_CTR(r1) std r5,_CTR(r1)
mfspr r6,XER mfspr r6,SPRN_XER
std r6,_XER(r1) std r6,_XER(r1)
mfdar r7 mfdar r7
std r7,_DAR(r1) std r7,_DAR(r1)
...@@ -697,14 +697,14 @@ _GLOBAL(enter_rtas) ...@@ -697,14 +697,14 @@ _GLOBAL(enter_rtas)
ld r5,RTASENTRY(r4) /* get the rtas->entry value */ ld r5,RTASENTRY(r4) /* get the rtas->entry value */
ld r4,RTASBASE(r4) /* get the rtas->base value */ ld r4,RTASBASE(r4) /* get the rtas->base value */
mtspr SRR0,r5 mtspr SPRN_SRR0,r5
mtspr SRR1,r6 mtspr SPRN_SRR1,r6
rfid rfid
b . /* prevent speculative execution */ b . /* prevent speculative execution */
_STATIC(rtas_return_loc) _STATIC(rtas_return_loc)
/* relocation is off at this point */ /* relocation is off at this point */
mfspr r4,SPRG3 /* Get PACA */ mfspr r4,SPRN_SPRG3 /* Get PACA */
SET_REG_TO_CONST(r5, KERNELBASE) SET_REG_TO_CONST(r5, KERNELBASE)
sub r4,r4,r5 /* RELOC the PACA base pointer */ sub r4,r4,r5 /* RELOC the PACA base pointer */
...@@ -718,8 +718,8 @@ _STATIC(rtas_return_loc) ...@@ -718,8 +718,8 @@ _STATIC(rtas_return_loc)
LOADADDR(r3,.rtas_restore_regs) LOADADDR(r3,.rtas_restore_regs)
ld r4,PACASAVEDMSR(r4) /* Restore our MSR */ ld r4,PACASAVEDMSR(r4) /* Restore our MSR */
mtspr SRR0,r3 mtspr SPRN_SRR0,r3
mtspr SRR1,r4 mtspr SPRN_SRR1,r4
rfid rfid
b . /* prevent speculative execution */ b . /* prevent speculative execution */
...@@ -730,14 +730,14 @@ _STATIC(rtas_restore_regs) ...@@ -730,14 +730,14 @@ _STATIC(rtas_restore_regs)
REST_8GPRS(14, r1) /* Restore the non-volatiles */ REST_8GPRS(14, r1) /* Restore the non-volatiles */
REST_10GPRS(22, r1) /* ditto */ REST_10GPRS(22, r1) /* ditto */
mfspr r13,SPRG3 mfspr r13,SPRN_SPRG3
ld r4,_CCR(r1) ld r4,_CCR(r1)
mtcr r4 mtcr r4
ld r5,_CTR(r1) ld r5,_CTR(r1)
mtctr r5 mtctr r5
ld r6,_XER(r1) ld r6,_XER(r1)
mtspr XER,r6 mtspr SPRN_XER,r6
ld r7,_DAR(r1) ld r7,_DAR(r1)
mtdar r7 mtdar r7
ld r8,_DSISR(r1) ld r8,_DSISR(r1)
...@@ -774,7 +774,7 @@ _GLOBAL(enter_prom) ...@@ -774,7 +774,7 @@ _GLOBAL(enter_prom)
std r4,_CCR(r1) std r4,_CCR(r1)
mfctr r5 mfctr r5
std r5,_CTR(r1) std r5,_CTR(r1)
mfspr r6,XER mfspr r6,SPRN_XER
std r6,_XER(r1) std r6,_XER(r1)
mfdar r7 mfdar r7
std r7,_DAR(r1) std r7,_DAR(r1)
...@@ -827,7 +827,7 @@ _GLOBAL(enter_prom) ...@@ -827,7 +827,7 @@ _GLOBAL(enter_prom)
ld r5,_CTR(r1) ld r5,_CTR(r1)
mtctr r5 mtctr r5
ld r6,_XER(r1) ld r6,_XER(r1)
mtspr XER,r6 mtspr SPRN_XER,r6
ld r7,_DAR(r1) ld r7,_DAR(r1)
mtdar r7 mtdar r7
ld r8,_DSISR(r1) ld r8,_DSISR(r1)
......
arch/ppc64/kernel/head.S
View file @ c17e3325
...@@ -201,22 +201,22 @@ exception_marker: ...@@ -201,22 +201,22 @@ exception_marker:
#define EX_CCR 60 #define EX_CCR 60
#define EXCEPTION_PROLOG_PSERIES(area, label) \ #define EXCEPTION_PROLOG_PSERIES(area, label) \
mfspr r13,SPRG3; /* get paca address into r13 */ \ mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \
std r9,area+EX_R9(r13); /* save r9 - r12 */ \ std r9,area+EX_R9(r13); /* save r9 - r12 */ \
std r10,area+EX_R10(r13); \ std r10,area+EX_R10(r13); \
std r11,area+EX_R11(r13); \ std r11,area+EX_R11(r13); \
std r12,area+EX_R12(r13); \ std r12,area+EX_R12(r13); \
mfspr r9,SPRG1; \ mfspr r9,SPRN_SPRG1; \
std r9,area+EX_R13(r13); \ std r9,area+EX_R13(r13); \
mfcr r9; \ mfcr r9; \
clrrdi r12,r13,32; /* get high part of &label */ \ clrrdi r12,r13,32; /* get high part of &label */ \
mfmsr r10; \ mfmsr r10; \
mfspr r11,SRR0; /* save SRR0 */ \ mfspr r11,SPRN_SRR0; /* save SRR0 */ \
ori r12,r12,(label)@l; /* virt addr of handler */ \ ori r12,r12,(label)@l; /* virt addr of handler */ \
ori r10,r10,MSR_IR|MSR_DR|MSR_RI; \ ori r10,r10,MSR_IR|MSR_DR|MSR_RI; \
mtspr SRR0,r12; \ mtspr SPRN_SRR0,r12; \
mfspr r12,SRR1; /* and SRR1 */ \ mfspr r12,SPRN_SRR1; /* and SRR1 */ \
mtspr SRR1,r10; \ mtspr SPRN_SRR1,r10; \
rfid; \ rfid; \
b . /* prevent speculative execution */ b . /* prevent speculative execution */
...@@ -225,12 +225,12 @@ exception_marker: ...@@ -225,12 +225,12 @@ exception_marker:
* This code runs with relocation on. * This code runs with relocation on.
*/ */
#define EXCEPTION_PROLOG_ISERIES_1(area) \ #define EXCEPTION_PROLOG_ISERIES_1(area) \
mfspr r13,SPRG3; /* get paca address into r13 */ \ mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \
std r9,area+EX_R9(r13); /* save r9 - r12 */ \ std r9,area+EX_R9(r13); /* save r9 - r12 */ \
std r10,area+EX_R10(r13); \ std r10,area+EX_R10(r13); \
std r11,area+EX_R11(r13); \ std r11,area+EX_R11(r13); \
std r12,area+EX_R12(r13); \ std r12,area+EX_R12(r13); \
mfspr r9,SPRG1; \ mfspr r9,SPRN_SPRG1; \
std r9,area+EX_R13(r13); \ std r9,area+EX_R13(r13); \
mfcr r9 mfcr r9
...@@ -283,7 +283,7 @@ exception_marker: ...@@ -283,7 +283,7 @@ exception_marker:
std r9,_LINK(r1); \ std r9,_LINK(r1); \
mfctr r10; /* save CTR in stackframe */ \ mfctr r10; /* save CTR in stackframe */ \
std r10,_CTR(r1); \ std r10,_CTR(r1); \
mfspr r11,XER; /* save XER in stackframe */ \ mfspr r11,SPRN_XER; /* save XER in stackframe */ \
std r11,_XER(r1); \ std r11,_XER(r1); \
li r9,(n)+1; \ li r9,(n)+1; \
std r9,_TRAP(r1); /* set trap number */ \ std r9,_TRAP(r1); /* set trap number */ \
...@@ -300,7 +300,7 @@ exception_marker: ...@@ -300,7 +300,7 @@ exception_marker:
.globl label##_pSeries; \ .globl label##_pSeries; \
label##_pSeries: \ label##_pSeries: \
HMT_MEDIUM; \ HMT_MEDIUM; \
mtspr SPRG1,r13; /* save r13 */ \ mtspr SPRN_SPRG1,r13; /* save r13 */ \
RUNLATCH_ON(r13); \ RUNLATCH_ON(r13); \
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common) EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
...@@ -308,7 +308,7 @@ label##_pSeries: \ ...@@ -308,7 +308,7 @@ label##_pSeries: \
.globl label##_iSeries; \ .globl label##_iSeries; \
label##_iSeries: \ label##_iSeries: \
HMT_MEDIUM; \ HMT_MEDIUM; \
mtspr SPRG1,r13; /* save r13 */ \ mtspr SPRN_SPRG1,r13; /* save r13 */ \
RUNLATCH_ON(r13); \ RUNLATCH_ON(r13); \
EXCEPTION_PROLOG_ISERIES_1(area); \ EXCEPTION_PROLOG_ISERIES_1(area); \
EXCEPTION_PROLOG_ISERIES_2; \ EXCEPTION_PROLOG_ISERIES_2; \
...@@ -318,7 +318,7 @@ label##_iSeries: \ ...@@ -318,7 +318,7 @@ label##_iSeries: \
.globl label##_iSeries; \ .globl label##_iSeries; \
label##_iSeries: \ label##_iSeries: \
HMT_MEDIUM; \ HMT_MEDIUM; \
mtspr SPRG1,r13; /* save r13 */ \ mtspr SPRN_SPRG1,r13; /* save r13 */ \
RUNLATCH_ON(r13); \ RUNLATCH_ON(r13); \
EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN); \ EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN); \
lbz r10,PACAPROCENABLED(r13); \ lbz r10,PACAPROCENABLED(r13); \
...@@ -388,7 +388,7 @@ __start_interrupts: ...@@ -388,7 +388,7 @@ __start_interrupts:
. = 0x200 . = 0x200
_machine_check_pSeries: _machine_check_pSeries:
HMT_MEDIUM HMT_MEDIUM
mtspr SPRG1,r13 /* save r13 */ mtspr SPRN_SPRG1,r13 /* save r13 */
RUNLATCH_ON(r13) RUNLATCH_ON(r13)
EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
...@@ -396,18 +396,18 @@ _machine_check_pSeries: ...@@ -396,18 +396,18 @@ _machine_check_pSeries:
.globl data_access_pSeries .globl data_access_pSeries
data_access_pSeries: data_access_pSeries:
HMT_MEDIUM HMT_MEDIUM
mtspr SPRG1,r13 mtspr SPRN_SPRG1,r13
BEGIN_FTR_SECTION BEGIN_FTR_SECTION
mtspr SPRG2,r12 mtspr SPRN_SPRG2,r12
mfspr r13,DAR mfspr r13,SPRN_DAR
mfspr r12,DSISR mfspr r12,SPRN_DSISR
srdi r13,r13,60 srdi r13,r13,60
rlwimi r13,r12,16,0x20 rlwimi r13,r12,16,0x20
mfcr r12 mfcr r12
cmpwi r13,0x2c cmpwi r13,0x2c
beq .do_stab_bolted_pSeries beq .do_stab_bolted_pSeries
mtcrf 0x80,r12 mtcrf 0x80,r12
mfspr r12,SPRG2 mfspr r12,SPRN_SPRG2
END_FTR_SECTION_IFCLR(CPU_FTR_SLB) END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common) EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common)
...@@ -415,19 +415,19 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB) ...@@ -415,19 +415,19 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
.globl data_access_slb_pSeries .globl data_access_slb_pSeries
data_access_slb_pSeries: data_access_slb_pSeries:
HMT_MEDIUM HMT_MEDIUM
mtspr SPRG1,r13 mtspr SPRN_SPRG1,r13
RUNLATCH_ON(r13) RUNLATCH_ON(r13)
mfspr r13,SPRG3 /* get paca address into r13 */ mfspr r13,SPRN_SPRG3 /* get paca address into r13 */
std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */ std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */
std r10,PACA_EXSLB+EX_R10(r13) std r10,PACA_EXSLB+EX_R10(r13)
std r11,PACA_EXSLB+EX_R11(r13) std r11,PACA_EXSLB+EX_R11(r13)
std r12,PACA_EXSLB+EX_R12(r13) std r12,PACA_EXSLB+EX_R12(r13)
std r3,PACA_EXSLB+EX_R3(r13) std r3,PACA_EXSLB+EX_R3(r13)
mfspr r9,SPRG1 mfspr r9,SPRN_SPRG1
std r9,PACA_EXSLB+EX_R13(r13) std r9,PACA_EXSLB+EX_R13(r13)
mfcr r9 mfcr r9
mfspr r12,SRR1 /* and SRR1 */ mfspr r12,SPRN_SRR1 /* and SRR1 */
mfspr r3,DAR mfspr r3,SPRN_DAR
b .do_slb_miss /* Rel. branch works in real mode */ b .do_slb_miss /* Rel. branch works in real mode */
STD_EXCEPTION_PSERIES(0x400, instruction_access) STD_EXCEPTION_PSERIES(0x400, instruction_access)
...@@ -436,19 +436,19 @@ data_access_slb_pSeries: ...@@ -436,19 +436,19 @@ data_access_slb_pSeries:
.globl instruction_access_slb_pSeries .globl instruction_access_slb_pSeries
instruction_access_slb_pSeries: instruction_access_slb_pSeries:
HMT_MEDIUM HMT_MEDIUM
mtspr SPRG1,r13 mtspr SPRN_SPRG1,r13
RUNLATCH_ON(r13) RUNLATCH_ON(r13)
mfspr r13,SPRG3 /* get paca address into r13 */ mfspr r13,SPRN_SPRG3 /* get paca address into r13 */
std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */ std r9,PACA_EXSLB+EX_R9(r13) /* save r9 - r12 */
std r10,PACA_EXSLB+EX_R10(r13) std r10,PACA_EXSLB+EX_R10(r13)
std r11,PACA_EXSLB+EX_R11(r13) std r11,PACA_EXSLB+EX_R11(r13)
std r12,PACA_EXSLB+EX_R12(r13) std r12,PACA_EXSLB+EX_R12(r13)
std r3,PACA_EXSLB+EX_R3(r13) std r3,PACA_EXSLB+EX_R3(r13)
mfspr r9,SPRG1 mfspr r9,SPRN_SPRG1
std r9,PACA_EXSLB+EX_R13(r13) std r9,PACA_EXSLB+EX_R13(r13)
mfcr r9 mfcr r9
mfspr r12,SRR1 /* and SRR1 */ mfspr r12,SPRN_SRR1 /* and SRR1 */
mfspr r3,SRR0 /* SRR0 is faulting address */ mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
b .do_slb_miss /* Rel. branch works in real mode */ b .do_slb_miss /* Rel. branch works in real mode */
STD_EXCEPTION_PSERIES(0x500, hardware_interrupt) STD_EXCEPTION_PSERIES(0x500, hardware_interrupt)
...@@ -466,15 +466,15 @@ system_call_pSeries: ...@@ -466,15 +466,15 @@ system_call_pSeries:
RUNLATCH_ON(r9) RUNLATCH_ON(r9)
mr r9,r13 mr r9,r13
mfmsr r10 mfmsr r10
mfspr r13,SPRG3 mfspr r13,SPRN_SPRG3
mfspr r11,SRR0 mfspr r11,SPRN_SRR0
clrrdi r12,r13,32 clrrdi r12,r13,32
oris r12,r12,system_call_common@h oris r12,r12,system_call_common@h
ori r12,r12,system_call_common@l ori r12,r12,system_call_common@l
mtspr SRR0,r12 mtspr SPRN_SRR0,r12
ori r10,r10,MSR_IR|MSR_DR|MSR_RI ori r10,r10,MSR_IR|MSR_DR|MSR_RI
mfspr r12,SRR1 mfspr r12,SPRN_SRR1
mtspr SRR1,r10 mtspr SPRN_SRR1,r10
rfid rfid
b . /* prevent speculative execution */ b . /* prevent speculative execution */
...@@ -504,25 +504,25 @@ system_call_pSeries: ...@@ -504,25 +504,25 @@ system_call_pSeries:
.align 7 .align 7
_GLOBAL(do_stab_bolted_pSeries) _GLOBAL(do_stab_bolted_pSeries)
mtcrf 0x80,r12 mtcrf 0x80,r12
mfspr r12,SPRG2 mfspr r12,SPRN_SPRG2
EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted) EXCEPTION_PROLOG_PSERIES(PACA_EXSLB, .do_stab_bolted)
/* /*
* Vectors for the FWNMI option. Share common code. * Vectors for the FWNMI option. Share common code.
*/ */
.globl system_reset_fwnmi .globl system_reset_fwnmi
system_reset_fwnmi: system_reset_fwnmi:
HMT_MEDIUM HMT_MEDIUM
mtspr SPRG1,r13 /* save r13 */ mtspr SPRN_SPRG1,r13 /* save r13 */
RUNLATCH_ON(r13) RUNLATCH_ON(r13)
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common) EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common)
.globl machine_check_fwnmi .globl machine_check_fwnmi
machine_check_fwnmi: machine_check_fwnmi:
HMT_MEDIUM HMT_MEDIUM
mtspr SPRG1,r13 /* save r13 */ mtspr SPRN_SPRG1,r13 /* save r13 */
RUNLATCH_ON(r13) RUNLATCH_ON(r13)
EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
#ifdef CONFIG_PPC_ISERIES #ifdef CONFIG_PPC_ISERIES
/*** ISeries-LPAR interrupt handlers ***/ /*** ISeries-LPAR interrupt handlers ***/
...@@ -531,18 +531,18 @@ machine_check_fwnmi: ...@@ -531,18 +531,18 @@ machine_check_fwnmi:
.globl data_access_iSeries .globl data_access_iSeries
data_access_iSeries: data_access_iSeries:
mtspr SPRG1,r13 mtspr SPRN_SPRG1,r13
BEGIN_FTR_SECTION BEGIN_FTR_SECTION
mtspr SPRG2,r12 mtspr SPRN_SPRG2,r12
mfspr r13,DAR mfspr r13,SPRN_DAR
mfspr r12,DSISR mfspr r12,SPRN_DSISR
srdi r13,r13,60 srdi r13,r13,60
rlwimi r13,r12,16,0x20 rlwimi r13,r12,16,0x20
mfcr r12 mfcr r12
cmpwi r13,0x2c cmpwi r13,0x2c
beq .do_stab_bolted_iSeries beq .do_stab_bolted_iSeries
mtcrf 0x80,r12 mtcrf 0x80,r12
mfspr r12,SPRG2 mfspr r12,SPRN_SPRG2
END_FTR_SECTION_IFCLR(CPU_FTR_SLB) END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN) EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN)
EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_ISERIES_2
...@@ -550,25 +550,25 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB) ...@@ -550,25 +550,25 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
.do_stab_bolted_iSeries: .do_stab_bolted_iSeries:
mtcrf 0x80,r12 mtcrf 0x80,r12
mfspr r12,SPRG2 mfspr r12,SPRN_SPRG2
EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB) EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_ISERIES_2
b .do_stab_bolted b .do_stab_bolted
.globl data_access_slb_iSeries .globl data_access_slb_iSeries
data_access_slb_iSeries: data_access_slb_iSeries:
mtspr SPRG1,r13 /* save r13 */ mtspr SPRN_SPRG1,r13 /* save r13 */
EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB) EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
std r3,PACA_EXSLB+EX_R3(r13) std r3,PACA_EXSLB+EX_R3(r13)
ld r12,PACALPPACA+LPPACASRR1(r13) ld r12,PACALPPACA+LPPACASRR1(r13)
mfspr r3,DAR mfspr r3,SPRN_DAR
b .do_slb_miss b .do_slb_miss
STD_EXCEPTION_ISERIES(0x400, instruction_access, PACA_EXGEN) STD_EXCEPTION_ISERIES(0x400, instruction_access, PACA_EXGEN)
.globl instruction_access_slb_iSeries .globl instruction_access_slb_iSeries
instruction_access_slb_iSeries: instruction_access_slb_iSeries:
mtspr SPRG1,r13 /* save r13 */ mtspr SPRN_SPRG1,r13 /* save r13 */
EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB) EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
std r3,PACA_EXSLB+EX_R3(r13) std r3,PACA_EXSLB+EX_R3(r13)
ld r12,PACALPPACA+LPPACASRR1(r13) ld r12,PACALPPACA+LPPACASRR1(r13)
...@@ -586,7 +586,7 @@ instruction_access_slb_iSeries: ...@@ -586,7 +586,7 @@ instruction_access_slb_iSeries:
.globl system_call_iSeries .globl system_call_iSeries
system_call_iSeries: system_call_iSeries:
mr r9,r13 mr r9,r13
mfspr r13,SPRG3 mfspr r13,SPRN_SPRG3
EXCEPTION_PROLOG_ISERIES_2 EXCEPTION_PROLOG_ISERIES_2
b system_call_common b system_call_common
...@@ -596,7 +596,7 @@ system_call_iSeries: ...@@ -596,7 +596,7 @@ system_call_iSeries:
.globl system_reset_iSeries .globl system_reset_iSeries
system_reset_iSeries: system_reset_iSeries:
mfspr r13,SPRG3 /* Get paca address */ mfspr r13,SPRN_SPRG3 /* Get paca address */
mfmsr r24 mfmsr r24
ori r24,r24,MSR_RI ori r24,r24,MSR_RI
mtmsrd r24 /* RI on */ mtmsrd r24 /* RI on */
...@@ -639,7 +639,7 @@ iSeries_secondary_smp_loop: ...@@ -639,7 +639,7 @@ iSeries_secondary_smp_loop:
#endif /* CONFIG_SMP */ #endif /* CONFIG_SMP */
li r0,-1 /* r0=-1 indicates a Hypervisor call */ li r0,-1 /* r0=-1 indicates a Hypervisor call */
sc /* Invoke the hypervisor via a system call */ sc /* Invoke the hypervisor via a system call */
mfspr r13,SPRG3 /* Put r13 back ???? */ mfspr r13,SPRN_SPRG3 /* Put r13 back ???? */
b 1b /* If SMP not configured, secondaries b 1b /* If SMP not configured, secondaries
* loop forever */ * loop forever */
...@@ -656,8 +656,8 @@ hardware_interrupt_iSeries_masked: ...@@ -656,8 +656,8 @@ hardware_interrupt_iSeries_masked:
mtcrf 0x80,r9 /* Restore regs */ mtcrf 0x80,r9 /* Restore regs */
ld r11,PACALPPACA+LPPACASRR0(r13) ld r11,PACALPPACA+LPPACASRR0(r13)
ld r12,PACALPPACA+LPPACASRR1(r13) ld r12,PACALPPACA+LPPACASRR1(r13)
mtspr SRR0,r11 mtspr SPRN_SRR0,r11
mtspr SRR1,r12 mtspr SPRN_SRR1,r12
ld r9,PACA_EXGEN+EX_R9(r13) ld r9,PACA_EXGEN+EX_R9(r13)
ld r10,PACA_EXGEN+EX_R10(r13) ld r10,PACA_EXGEN+EX_R10(r13)
ld r11,PACA_EXGEN+EX_R11(r13) ld r11,PACA_EXGEN+EX_R11(r13)
...@@ -713,8 +713,8 @@ bad_stack: ...@@ -713,8 +713,8 @@ bad_stack:
std r10,GPR1(r1) std r10,GPR1(r1)
std r11,_NIP(r1) std r11,_NIP(r1)
std r12,_MSR(r1) std r12,_MSR(r1)
mfspr r11,DAR mfspr r11,SPRN_DAR
mfspr r12,DSISR mfspr r12,SPRN_DSISR
std r11,_DAR(r1) std r11,_DAR(r1)
std r12,_DSISR(r1) std r12,_DSISR(r1)
mflr r10 mflr r10
...@@ -766,8 +766,8 @@ fast_exception_return: ...@@ -766,8 +766,8 @@ fast_exception_return:
clrrdi r10,r10,2 /* clear RI (LE is 0 already) */ clrrdi r10,r10,2 /* clear RI (LE is 0 already) */
mtmsrd r10,1 mtmsrd r10,1
mtspr SRR1,r12 mtspr SPRN_SRR1,r12
mtspr SRR0,r11 mtspr SPRN_SRR0,r11
REST_4GPRS(10, r1) REST_4GPRS(10, r1)
ld r1,GPR1(r1) ld r1,GPR1(r1)
rfid rfid
...@@ -788,9 +788,9 @@ unrecov_fer: ...@@ -788,9 +788,9 @@ unrecov_fer:
.globl data_access_common .globl data_access_common
data_access_common: data_access_common:
RUNLATCH_ON(r10) /* It wont fit in the 0x300 handler */ RUNLATCH_ON(r10) /* It wont fit in the 0x300 handler */
mfspr r10,DAR mfspr r10,SPRN_DAR
std r10,PACA_EXGEN+EX_DAR(r13) std r10,PACA_EXGEN+EX_DAR(r13)
mfspr r10,DSISR mfspr r10,SPRN_DSISR
stw r10,PACA_EXGEN+EX_DSISR(r13) stw r10,PACA_EXGEN+EX_DSISR(r13)
EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN) EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
ld r3,PACA_EXGEN+EX_DAR(r13) ld r3,PACA_EXGEN+EX_DAR(r13)
...@@ -821,9 +821,9 @@ hardware_interrupt_entry: ...@@ -821,9 +821,9 @@ hardware_interrupt_entry:
.align 7 .align 7
.globl alignment_common .globl alignment_common
alignment_common: alignment_common:
mfspr r10,DAR mfspr r10,SPRN_DAR
std r10,PACA_EXGEN+EX_DAR(r13) std r10,PACA_EXGEN+EX_DAR(r13)
mfspr r10,DSISR mfspr r10,SPRN_DSISR
stw r10,PACA_EXGEN+EX_DSISR(r13) stw r10,PACA_EXGEN+EX_DSISR(r13)
EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN) EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
ld r3,PACA_EXGEN+EX_DAR(r13) ld r3,PACA_EXGEN+EX_DAR(r13)
...@@ -1120,7 +1120,7 @@ _GLOBAL(do_stab_bolted) ...@@ -1120,7 +1120,7 @@ _GLOBAL(do_stab_bolted)
/* Hash to the primary group */ /* Hash to the primary group */
ld r10,PACASTABVIRT(r13) ld r10,PACASTABVIRT(r13)
mfspr r11,DAR mfspr r11,SPRN_DAR
srdi r11,r11,28 srdi r11,r11,28
rldimi r10,r11,7,52 /* r10 = first ste of the group */ rldimi r10,r11,7,52 /* r10 = first ste of the group */
...@@ -1162,7 +1162,7 @@ _GLOBAL(do_stab_bolted) ...@@ -1162,7 +1162,7 @@ _GLOBAL(do_stab_bolted)
2: std r9,8(r10) /* Store the vsid part of the ste */ 2: std r9,8(r10) /* Store the vsid part of the ste */
eieio eieio
mfspr r11,DAR /* Get the new esid */ mfspr r11,SPRN_DAR /* Get the new esid */
clrrdi r11,r11,28 /* Permits a full 32b of ESID */ clrrdi r11,r11,28 /* Permits a full 32b of ESID */
ori r11,r11,0x90 /* Turn on valid and kp */ ori r11,r11,0x90 /* Turn on valid and kp */
std r11,0(r10) /* Put new entry back into the stab */ std r11,0(r10) /* Put new entry back into the stab */
...@@ -1182,8 +1182,8 @@ _GLOBAL(do_stab_bolted) ...@@ -1182,8 +1182,8 @@ _GLOBAL(do_stab_bolted)
clrrdi r10,r10,2 clrrdi r10,r10,2
mtmsrd r10,1 mtmsrd r10,1
mtspr SRR0,r11 mtspr SPRN_SRR0,r11
mtspr SRR1,r12 mtspr SPRN_SRR1,r12
ld r9,PACA_EXSLB+EX_R9(r13) ld r9,PACA_EXSLB+EX_R9(r13)
ld r10,PACA_EXSLB+EX_R10(r13) ld r10,PACA_EXSLB+EX_R10(r13)
ld r11,PACA_EXSLB+EX_R11(r13) ld r11,PACA_EXSLB+EX_R11(r13)
...@@ -1229,8 +1229,8 @@ _GLOBAL(do_slb_miss) ...@@ -1229,8 +1229,8 @@ _GLOBAL(do_slb_miss)
.machine pop .machine pop
#ifdef CONFIG_PPC_ISERIES #ifdef CONFIG_PPC_ISERIES
mtspr SRR0,r11 mtspr SPRN_SRR0,r11
mtspr SRR1,r12 mtspr SPRN_SRR1,r12
#endif /* CONFIG_PPC_ISERIES */ #endif /* CONFIG_PPC_ISERIES */
ld r9,PACA_EXSLB+EX_R9(r13) ld r9,PACA_EXSLB+EX_R9(r13)
ld r10,PACA_EXSLB+EX_R10(r13) ld r10,PACA_EXSLB+EX_R10(r13)
...@@ -1316,7 +1316,7 @@ _GLOBAL(pSeries_secondary_smp_init) ...@@ -1316,7 +1316,7 @@ _GLOBAL(pSeries_secondary_smp_init)
mr r3,r24 /* not found, copy phys to r3 */ mr r3,r24 /* not found, copy phys to r3 */
b .kexec_wait /* next kernel might do better */ b .kexec_wait /* next kernel might do better */
2: mtspr SPRG3,r13 /* Save vaddr of paca in SPRG3 */ 2: mtspr SPRN_SPRG3,r13 /* Save vaddr of paca in SPRG3 */
/* From now on, r24 is expected to be logical cpuid */ /* From now on, r24 is expected to be logical cpuid */
mr r24,r5 mr r24,r5
3: HMT_LOW 3: HMT_LOW
...@@ -1587,7 +1587,7 @@ _GLOBAL(pmac_secondary_start) ...@@ -1587,7 +1587,7 @@ _GLOBAL(pmac_secondary_start)
LOADADDR(r4, paca) /* Get base vaddr of paca array */ LOADADDR(r4, paca) /* Get base vaddr of paca array */
mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */ mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */
add r13,r13,r4 /* for this processor. */ add r13,r13,r4 /* for this processor. */
mtspr SPRG3,r13 /* Save vaddr of paca in SPRG3 */ mtspr SPRN_SPRG3,r13 /* Save vaddr of paca in SPRG3 */
/* Create a temp kernel stack for use before relocation is on. */ /* Create a temp kernel stack for use before relocation is on. */
ld r1,PACAEMERGSP(r13) ld r1,PACAEMERGSP(r13)
...@@ -1622,7 +1622,7 @@ _GLOBAL(__secondary_start) ...@@ -1622,7 +1622,7 @@ _GLOBAL(__secondary_start)
/* Initialize the page table pointer register. */ /* Initialize the page table pointer register. */
LOADADDR(r6,_SDR1) LOADADDR(r6,_SDR1)
ld r6,0(r6) /* get the value of _SDR1 */ ld r6,0(r6) /* get the value of _SDR1 */
mtspr SDR1,r6 /* set the htab location */ mtspr SPRN_SDR1,r6 /* set the htab location */
#endif #endif
/* Initialize the first segment table (or SLB) entry */ /* Initialize the first segment table (or SLB) entry */
ld r3,PACASTABVIRT(r13) /* get addr of segment table */ ld r3,PACASTABVIRT(r13) /* get addr of segment table */
...@@ -1651,7 +1651,7 @@ _GLOBAL(__secondary_start) ...@@ -1651,7 +1651,7 @@ _GLOBAL(__secondary_start)
lwz r3,PLATFORM(r3) /* r3 = platform flags */ lwz r3,PLATFORM(r3) /* r3 = platform flags */
andi. r3,r3,PLATFORM_LPAR /* Test if bit 0 is set (LPAR bit) */ andi. r3,r3,PLATFORM_LPAR /* Test if bit 0 is set (LPAR bit) */
beq 98f /* branch if result is 0 */ beq 98f /* branch if result is 0 */
mfspr r3,PVR mfspr r3,SPRN_PVR
srwi r3,r3,16 srwi r3,r3,16
cmpwi r3,0x37 /* SStar */ cmpwi r3,0x37 /* SStar */
beq 97f beq 97f
...@@ -1675,8 +1675,8 @@ _GLOBAL(__secondary_start) ...@@ -1675,8 +1675,8 @@ _GLOBAL(__secondary_start)
#ifdef DO_SOFT_DISABLE #ifdef DO_SOFT_DISABLE
ori r4,r4,MSR_EE ori r4,r4,MSR_EE
#endif #endif
mtspr SRR0,r3 mtspr SPRN_SRR0,r3
mtspr SRR1,r4 mtspr SPRN_SRR1,r4
rfid rfid
b . /* prevent speculative execution */ b . /* prevent speculative execution */
...@@ -1738,7 +1738,7 @@ _STATIC(start_here_multiplatform) ...@@ -1738,7 +1738,7 @@ _STATIC(start_here_multiplatform)
#ifdef CONFIG_HMT #ifdef CONFIG_HMT
/* Start up the second thread on cpu 0 */ /* Start up the second thread on cpu 0 */
mfspr r3,PVR mfspr r3,SPRN_PVR
srwi r3,r3,16 srwi r3,r3,16
cmpwi r3,0x34 /* Pulsar */ cmpwi r3,0x34 /* Pulsar */
beq 90f beq 90f
...@@ -1798,7 +1798,7 @@ _STATIC(start_here_multiplatform) ...@@ -1798,7 +1798,7 @@ _STATIC(start_here_multiplatform)
mulli r13,r27,PACA_SIZE /* Calculate vaddr of right paca */ mulli r13,r27,PACA_SIZE /* Calculate vaddr of right paca */
add r13,r13,r24 /* for this processor. */ add r13,r13,r24 /* for this processor. */
sub r13,r13,r26 /* convert to physical addr */ sub r13,r13,r26 /* convert to physical addr */
mtspr SPRG3,r13 /* PPPBBB: Temp... -Peter */ mtspr SPRN_SPRG3,r13 /* PPPBBB: Temp... -Peter */
/* Do very early kernel initializations, including initial hash table, /* Do very early kernel initializations, including initial hash table,
* stab and slb setup before we turn on relocation. */ * stab and slb setup before we turn on relocation. */
...@@ -1815,7 +1815,7 @@ _STATIC(start_here_multiplatform) ...@@ -1815,7 +1815,7 @@ _STATIC(start_here_multiplatform)
lwz r3,PLATFORM(r3) /* r3 = platform flags */ lwz r3,PLATFORM(r3) /* r3 = platform flags */
andi. r3,r3,PLATFORM_LPAR /* Test if bit 0 is set (LPAR bit) */ andi. r3,r3,PLATFORM_LPAR /* Test if bit 0 is set (LPAR bit) */
beq 98f /* branch if result is 0 */ beq 98f /* branch if result is 0 */
mfspr r3,PVR mfspr r3,SPRN_PVR
srwi r3,r3,16 srwi r3,r3,16
cmpwi r3,0x37 /* SStar */ cmpwi r3,0x37 /* SStar */
beq 97f beq 97f
...@@ -1839,12 +1839,12 @@ _STATIC(start_here_multiplatform) ...@@ -1839,12 +1839,12 @@ _STATIC(start_here_multiplatform)
LOADADDR(r6,_SDR1) /* Only if NOT LPAR */ LOADADDR(r6,_SDR1) /* Only if NOT LPAR */
sub r6,r6,r26 sub r6,r6,r26
ld r6,0(r6) /* get the value of _SDR1 */ ld r6,0(r6) /* get the value of _SDR1 */
mtspr SDR1,r6 /* set the htab location */ mtspr SPRN_SDR1,r6 /* set the htab location */
98: 98:
LOADADDR(r3,.start_here_common) LOADADDR(r3,.start_here_common)
SET_REG_TO_CONST(r4, MSR_KERNEL) SET_REG_TO_CONST(r4, MSR_KERNEL)
mtspr SRR0,r3 mtspr SPRN_SRR0,r3
mtspr SRR1,r4 mtspr SPRN_SRR1,r4
rfid rfid
b . /* prevent speculative execution */ b . /* prevent speculative execution */
#endif /* CONFIG_PPC_MULTIPLATFORM */ #endif /* CONFIG_PPC_MULTIPLATFORM */
...@@ -1875,7 +1875,7 @@ _STATIC(start_here_common) ...@@ -1875,7 +1875,7 @@ _STATIC(start_here_common)
LOADADDR(r24, paca) /* Get base vaddr of paca array */ LOADADDR(r24, paca) /* Get base vaddr of paca array */
mulli r13,r26,PACA_SIZE /* Calculate vaddr of right paca */ mulli r13,r26,PACA_SIZE /* Calculate vaddr of right paca */
add r13,r13,r24 /* for this processor. */ add r13,r13,r24 /* for this processor. */
mtspr SPRG3,r13 mtspr SPRN_SPRG3,r13
/* ptr to current */ /* ptr to current */
LOADADDR(r4,init_task) LOADADDR(r4,init_task)
...@@ -1902,7 +1902,7 @@ _STATIC(start_here_common) ...@@ -1902,7 +1902,7 @@ _STATIC(start_here_common)
_GLOBAL(hmt_init) _GLOBAL(hmt_init)
#ifdef CONFIG_HMT #ifdef CONFIG_HMT
LOADADDR(r5, hmt_thread_data) LOADADDR(r5, hmt_thread_data)
mfspr r7,PVR mfspr r7,SPRN_PVR
srwi r7,r7,16 srwi r7,r7,16
cmpwi r7,0x34 /* Pulsar */ cmpwi r7,0x34 /* Pulsar */
beq 90f beq 90f
...@@ -1911,10 +1911,10 @@ _GLOBAL(hmt_init) ...@@ -1911,10 +1911,10 @@ _GLOBAL(hmt_init)
cmpwi r7,0x37 /* SStar */ cmpwi r7,0x37 /* SStar */
beq 91f beq 91f
b 101f b 101f
90: mfspr r6,PIR 90: mfspr r6,SPRN_PIR
andi. r6,r6,0x1f andi. r6,r6,0x1f
b 92f b 92f
91: mfspr r6,PIR 91: mfspr r6,SPRN_PIR
andi. r6,r6,0x3ff andi. r6,r6,0x3ff
92: sldi r4,r24,3 92: sldi r4,r24,3
stwx r6,r5,r4 stwx r6,r5,r4
...@@ -1925,8 +1925,8 @@ __hmt_secondary_hold: ...@@ -1925,8 +1925,8 @@ __hmt_secondary_hold:
LOADADDR(r5, hmt_thread_data) LOADADDR(r5, hmt_thread_data)
clrldi r5,r5,4 clrldi r5,r5,4
li r7,0 li r7,0
mfspr r6,PIR mfspr r6,SPRN_PIR
mfspr r8,PVR mfspr r8,SPRN_PVR
srwi r8,r8,16 srwi r8,r8,16
cmpwi r8,0x34 cmpwi r8,0x34
bne 93f bne 93f
...@@ -1952,19 +1952,19 @@ __hmt_secondary_hold: ...@@ -1952,19 +1952,19 @@ __hmt_secondary_hold:
_GLOBAL(hmt_start_secondary) _GLOBAL(hmt_start_secondary)
LOADADDR(r4,__hmt_secondary_hold) LOADADDR(r4,__hmt_secondary_hold)
clrldi r4,r4,4 clrldi r4,r4,4
mtspr NIADORM, r4 mtspr SPRN_NIADORM, r4
mfspr r4, MSRDORM mfspr r4, SPRN_MSRDORM
li r5, -65 li r5, -65
and r4, r4, r5 and r4, r4, r5
mtspr MSRDORM, r4 mtspr SPRN_MSRDORM, r4
lis r4,0xffef lis r4,0xffef
ori r4,r4,0x7403 ori r4,r4,0x7403
mtspr TSC, r4 mtspr SPRN_TSC, r4
li r4,0x1f4 li r4,0x1f4
mtspr TST, r4 mtspr SPRN_TST, r4
mfspr r4, HID0 mfspr r4, SPRN_HID0
ori r4, r4, 0x1 ori r4, r4, 0x1
mtspr HID0, r4 mtspr SPRN_HID0, r4
mfspr r4, SPRN_CTRLF mfspr r4, SPRN_CTRLF
oris r4, r4, 0x40 oris r4, r4, 0x40
mtspr SPRN_CTRLT, r4 mtspr SPRN_CTRLT, r4
......
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