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linux
linux-davinci
Commits
beab375a
Commit
beab375a
authored
Jun 19, 2006
by
Ralf Baechle
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[MIPS] Treat CPUs with AR bit as physically indexed.
Signed-off-by:
Ralf Baechle
<
ralf@linux-mips.org
>
parent
92c7b62f
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1
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arch/mips/mm/c-r4k.c
arch/mips/mm/c-r4k.c
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arch/mips/mm/c-r4k.c
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beab375a
...
...
@@ -1009,7 +1009,12 @@ static void __init probe_pcache(void)
break
;
case
CPU_24K
:
case
CPU_34K
:
if
(
!
(
read_c0_config7
()
&
(
1
<<
16
)))
if
((
read_c0_config7
()
&
(
1
<<
16
)))
{
/* effectively physically indexed dcache,
thus no virtual aliases. */
c
->
dcache
.
flags
|=
MIPS_CACHE_PINDEX
;
break
;
}
default:
if
(
c
->
dcache
.
waysize
>
PAGE_SIZE
)
c
->
dcache
.
flags
|=
MIPS_CACHE_ALIASES
;
...
...
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