Commit b53d86bd authored by Tony Lindgren's avatar Tony Lindgren

Sync with mainline: arch/arm/boot/compressed/head.S

File arch/arm/boot/compressed/head.S should always
be in sync with mainline.

See include/asm-arm/arch-omap/debug-macro.S.
parent 36808520
...@@ -52,26 +52,6 @@ ...@@ -52,26 +52,6 @@
add \rb, \rb, #0x00010000 @ Ser1 add \rb, \rb, #0x00010000 @ Ser1
#endif #endif
.endm .endm
#elif defined(CONFIG_ARCH_OMAP2)
.macro loadsp, rb
mov \rb, #0x48000000 @ physical base address
add \rb, \rb, #0x0006a000
#ifdef CONFIG_OMAP_LL_DEBUG_UART2
add \rb, \rb, #0x00002000
#endif
#ifdef CONFIG_OMAP_LL_DEBUG_UART3
add \rb, \rb, #0x00004000
#endif
.endm
.macro writeb, rb
strb \rb, [r3]
.endm
#elif defined(CONFIG_ARCH_IOP331)
.macro loadsp, rb
mov \rb, #0xff000000
orr \rb, \rb, #0x00ff0000
orr \rb, \rb, #0x0000f700 @ location of the UART
.endm
#elif defined(CONFIG_ARCH_S3C2410) #elif defined(CONFIG_ARCH_S3C2410)
.macro loadsp, rb .macro loadsp, rb
mov \rb, #0x50000000 mov \rb, #0x50000000
...@@ -102,9 +82,11 @@ ...@@ -102,9 +82,11 @@
kphex r6, 8 /* processor id */ kphex r6, 8 /* processor id */
kputc #':' kputc #':'
kphex r7, 8 /* architecture id */ kphex r7, 8 /* architecture id */
#ifdef CONFIG_CPU_CP15
kputc #':' kputc #':'
mrc p15, 0, r0, c1, c0 mrc p15, 0, r0, c1, c0
kphex r0, 8 /* control reg */ kphex r0, 8 /* control reg */
#endif
kputc #'\n' kputc #'\n'
kphex r5, 8 /* decompressed kernel start */ kphex r5, 8 /* decompressed kernel start */
kputc #'-' kputc #'-'
...@@ -255,7 +237,8 @@ not_relocated: mov r0, #0 ...@@ -255,7 +237,8 @@ not_relocated: mov r0, #0
*/ */
cmp r4, r2 cmp r4, r2
bhs wont_overwrite bhs wont_overwrite
add r0, r4, #4096*1024 @ 4MB largest kernel size sub r3, sp, r5 @ > compressed kernel size
add r0, r4, r3, lsl #2 @ allow for 4x expansion
cmp r0, r5 cmp r0, r5
bls wont_overwrite bls wont_overwrite
...@@ -527,7 +510,11 @@ call_kernel: bl cache_clean_flush ...@@ -527,7 +510,11 @@ call_kernel: bl cache_clean_flush
*/ */
call_cache_fn: adr r12, proc_types call_cache_fn: adr r12, proc_types
#ifdef CONFIG_CPU_CP15
mrc p15, 0, r6, c0, c0 @ get processor ID mrc p15, 0, r6, c0, c0 @ get processor ID
#else
ldr r6, =CONFIG_PROCESSOR_ID
#endif
1: ldr r1, [r12, #0] @ get value 1: ldr r1, [r12, #0] @ get value
ldr r2, [r12, #4] @ get mask ldr r2, [r12, #4] @ get mask
eor r1, r1, r6 @ (real ^ match) eor r1, r1, r6 @ (real ^ match)
......
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