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linux
linux-davinci
Commits
a9da4f7e
Commit
a9da4f7e
authored
Jul 12, 2008
by
Russell King
Committed by
Russell King
Jul 12, 2008
Browse files
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Plain Diff
Merge branches 'pxa-ian' and 'pxa-xm270' into pxa
Conflicts: MAINTAINERS
parents
67f5cd0f
13f75582
03fe6692
Changes
14
Show whitespace changes
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Showing
14 changed files
with
767 additions
and
412 deletions
+767
-412
MAINTAINERS
MAINTAINERS
+17
-11
arch/arm/common/sa1111.c
arch/arm/common/sa1111.c
+1
-1
arch/arm/mach-pxa/clock.c
arch/arm/mach-pxa/clock.c
+0
-30
arch/arm/mach-pxa/clock.h
arch/arm/mach-pxa/clock.h
+9
-0
arch/arm/mach-pxa/cm-x270-pci.c
arch/arm/mach-pxa/cm-x270-pci.c
+14
-13
arch/arm/mach-pxa/cm-x270-pci.h
arch/arm/mach-pxa/cm-x270-pci.h
+7
-7
arch/arm/mach-pxa/cm-x270.c
arch/arm/mach-pxa/cm-x270.c
+285
-118
arch/arm/mach-pxa/em-x270.c
arch/arm/mach-pxa/em-x270.c
+292
-79
arch/arm/mach-pxa/pxa25x.c
arch/arm/mach-pxa/pxa25x.c
+55
-4
arch/arm/mach-sa1100/clock.c
arch/arm/mach-sa1100/clock.c
+1
-1
drivers/mtd/nand/cmx270_nand.c
drivers/mtd/nand/cmx270_nand.c
+47
-32
drivers/pcmcia/pxa2xx_cm_x270.c
drivers/pcmcia/pxa2xx_cm_x270.c
+27
-66
include/asm-arm/arch-pxa/cm-x270.h
include/asm-arm/arch-pxa/cm-x270.h
+0
-50
include/asm-arm/arch-pxa/hardware.h
include/asm-arm/arch-pxa/hardware.h
+12
-0
No files found.
MAINTAINERS
View file @
a9da4f7e
...
@@ -475,17 +475,17 @@ M: kernel@wantstofly.org
...
@@ -475,17 +475,17 @@ M: kernel@wantstofly.org
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
S: Maintained
S: Maintained
ARM/COMPULAB CM-X270/EM-X270 MACHINE SUPPORT
P: Mike Rapoport
M: mike@compulab.co.il
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
S: Maintained
ARM/CORGI MACHINE SUPPORT
ARM/CORGI MACHINE SUPPORT
P: Richard Purdie
P: Richard Purdie
M: rpurdie@rpsys.net
M: rpurdie@rpsys.net
S: Maintained
S: Maintained
ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
P: Lennert Buytenhek
M: kernel@wantstofly.org
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
S: Maintained
ARM/EZX SMARTPHONES (A780, A910, A1200, E680, ROKR E2 and ROKR E6)
ARM/EZX SMARTPHONES (A780, A910, A1200, E680, ROKR E2 and ROKR E6)
P: Daniel Ribeiro
P: Daniel Ribeiro
M: drwyrm@gmail.com
M: drwyrm@gmail.com
...
@@ -497,6 +497,12 @@ L: openezx-devel@lists.openezx.org (subscribers-only)
...
@@ -497,6 +497,12 @@ L: openezx-devel@lists.openezx.org (subscribers-only)
W: http://www.openezx.org/
W: http://www.openezx.org/
S: Maintained
S: Maintained
ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
P: Lennert Buytenhek
M: kernel@wantstofly.org
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
S: Maintained
ARM/GUMSTIX MACHINE SUPPORT
ARM/GUMSTIX MACHINE SUPPORT
P: Steve Sakoman
P: Steve Sakoman
M: sakoman@gmail.com
M: sakoman@gmail.com
...
...
arch/arm/common/sa1111.c
View file @
a9da4f7e
...
@@ -627,7 +627,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
...
@@ -627,7 +627,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq)
if
(
!
sachip
)
if
(
!
sachip
)
return
-
ENOMEM
;
return
-
ENOMEM
;
sachip
->
clk
=
clk_get
(
me
,
"
GPIO27
_CLK"
);
sachip
->
clk
=
clk_get
(
me
,
"
SA1111
_CLK"
);
if
(
!
sachip
->
clk
)
{
if
(
!
sachip
->
clk
)
{
ret
=
PTR_ERR
(
sachip
->
clk
);
ret
=
PTR_ERR
(
sachip
->
clk
);
goto
err_free
;
goto
err_free
;
...
...
arch/arm/mach-pxa/clock.c
View file @
a9da4f7e
...
@@ -101,21 +101,6 @@ unsigned long clk_get_rate(struct clk *clk)
...
@@ -101,21 +101,6 @@ unsigned long clk_get_rate(struct clk *clk)
EXPORT_SYMBOL
(
clk_get_rate
);
EXPORT_SYMBOL
(
clk_get_rate
);
static
void
clk_gpio27_enable
(
struct
clk
*
clk
)
{
pxa_gpio_mode
(
GPIO11_3_6MHz_MD
);
}
static
void
clk_gpio27_disable
(
struct
clk
*
clk
)
{
}
static
const
struct
clkops
clk_gpio27_ops
=
{
.
enable
=
clk_gpio27_enable
,
.
disable
=
clk_gpio27_disable
,
};
void
clk_cken_enable
(
struct
clk
*
clk
)
void
clk_cken_enable
(
struct
clk
*
clk
)
{
{
CKEN
|=
1
<<
clk
->
cken
;
CKEN
|=
1
<<
clk
->
cken
;
...
@@ -131,14 +116,6 @@ const struct clkops clk_cken_ops = {
...
@@ -131,14 +116,6 @@ const struct clkops clk_cken_ops = {
.
disable
=
clk_cken_disable
,
.
disable
=
clk_cken_disable
,
};
};
static
struct
clk
common_clks
[]
=
{
{
.
name
=
"GPIO27_CLK"
,
.
ops
=
&
clk_gpio27_ops
,
.
rate
=
3686400
,
},
};
void
clks_register
(
struct
clk
*
clks
,
size_t
num
)
void
clks_register
(
struct
clk
*
clks
,
size_t
num
)
{
{
int
i
;
int
i
;
...
@@ -148,10 +125,3 @@ void clks_register(struct clk *clks, size_t num)
...
@@ -148,10 +125,3 @@ void clks_register(struct clk *clks, size_t num)
list_add
(
&
clks
[
i
].
node
,
&
clocks
);
list_add
(
&
clks
[
i
].
node
,
&
clocks
);
mutex_unlock
(
&
clocks_mutex
);
mutex_unlock
(
&
clocks_mutex
);
}
}
static
int
__init
clk_init
(
void
)
{
clks_register
(
common_clks
,
ARRAY_SIZE
(
common_clks
));
return
0
;
}
arch_initcall
(
clk_init
);
arch/arm/mach-pxa/clock.h
View file @
a9da4f7e
...
@@ -47,6 +47,15 @@ struct clk {
...
@@ -47,6 +47,15 @@ struct clk {
.other = _other, \
.other = _other, \
}
}
#define INIT_CLK(_name, _ops, _rate, _delay, _dev) \
{ \
.name = _name, \
.dev = _dev, \
.ops = _ops, \
.rate = _rate, \
.delay = _delay, \
}
extern
const
struct
clkops
clk_cken_ops
;
extern
const
struct
clkops
clk_cken_ops
;
void
clk_cken_enable
(
struct
clk
*
clk
);
void
clk_cken_enable
(
struct
clk
*
clk
);
...
...
arch/arm/mach-pxa/cm-x270-pci.c
View file @
a9da4f7e
...
@@ -5,7 +5,7 @@
...
@@ -5,7 +5,7 @@
*
*
* Bits taken from various places.
* Bits taken from various places.
*
*
* Copyright (C) 2007 Compulab, Ltd.
* Copyright (C) 2007
, 2008
Compulab, Ltd.
* Mike Rapoport <mike@compulab.co.il>
* Mike Rapoport <mike@compulab.co.il>
*
*
* This program is free software; you can redistribute it and/or modify
* This program is free software; you can redistribute it and/or modify
...
@@ -19,16 +19,16 @@
...
@@ -19,16 +19,16 @@
#include <linux/device.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/platform_device.h>
#include <linux/irq.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <asm/mach/pci.h>
#include <asm/mach/pci.h>
#include <asm/arch/cm-x270.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa2xx-gpio.h>
#include <asm/mach-types.h>
#include <asm/mach-types.h>
#include <asm/hardware/it8152.h>
#include <asm/hardware/it8152.h>
unsigned
long
it8152_base_address
=
CMX270_IT8152_VIRT
;
unsigned
long
it8152_base_address
;
static
int
cmx270_it8152_irq_gpio
;
/*
/*
* Only first 64MB of memory can be accessed via PCI.
* Only first 64MB of memory can be accessed via PCI.
...
@@ -42,7 +42,7 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
...
@@ -42,7 +42,7 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
unsigned
int
sz
=
SZ_64M
>>
PAGE_SHIFT
;
unsigned
int
sz
=
SZ_64M
>>
PAGE_SHIFT
;
if
(
machine_is_armcore
())
{
if
(
machine_is_armcore
())
{
pr_info
(
"Adjusting zones for CM-
x
270
\n
"
);
pr_info
(
"Adjusting zones for CM-
X
270
\n
"
);
/*
/*
* Only adjust if > 64M on current system
* Only adjust if > 64M on current system
...
@@ -60,19 +60,20 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
...
@@ -60,19 +60,20 @@ void __init cmx270_pci_adjust_zones(int node, unsigned long *zone_size,
static
void
cmx270_it8152_irq_demux
(
unsigned
int
irq
,
struct
irq_desc
*
desc
)
static
void
cmx270_it8152_irq_demux
(
unsigned
int
irq
,
struct
irq_desc
*
desc
)
{
{
/* clear our parent irq */
/* clear our parent irq */
GEDR
(
GPIO_IT8152_IRQ
)
=
GPIO_bit
(
GPIO_IT8152_IRQ
);
GEDR
(
cmx270_it8152_irq_gpio
)
=
GPIO_bit
(
cmx270_it8152_irq_gpio
);
it8152_irq_demux
(
irq
,
desc
);
it8152_irq_demux
(
irq
,
desc
);
}
}
void
__cmx270_pci_init_irq
(
void
)
void
__cmx270_pci_init_irq
(
int
irq_gpio
)
{
{
it8152_init_irq
();
it8152_init_irq
();
pxa_gpio_mode
(
IRQ_TO_GPIO
(
GPIO_IT8152_IRQ
));
set_irq_type
(
IRQ_GPIO
(
GPIO_IT8152_IRQ
),
IRQT_RISING
);
set_irq_chained_handler
(
IRQ_GPIO
(
GPIO_IT8152_IRQ
),
cmx270_it8152_irq_gpio
=
irq_gpio
;
cmx270_it8152_irq_demux
);
set_irq_type
(
gpio_to_irq
(
irq_gpio
),
IRQT_RISING
);
set_irq_chained_handler
(
gpio_to_irq
(
irq_gpio
),
cmx270_it8152_irq_demux
);
}
}
#ifdef CONFIG_PM
#ifdef CONFIG_PM
...
@@ -115,8 +116,8 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
...
@@ -115,8 +116,8 @@ static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
/*
/*
Here comes the ugly part. The routing is baseboard specific,
Here comes the ugly part. The routing is baseboard specific,
but defining a platform for each possible base of CM-
x
270 is
but defining a platform for each possible base of CM-
X
270 is
unrealistic. Here we keep mapping for ATXBase and SB-
x
270.
unrealistic. Here we keep mapping for ATXBase and SB-
X
270.
*/
*/
/* ATXBASE PCI slot */
/* ATXBASE PCI slot */
if
(
slot
==
7
)
if
(
slot
==
7
)
...
...
arch/arm/mach-pxa/cm-x270-pci.h
View file @
a9da4f7e
extern
void
__cmx270_pci_init_irq
(
void
);
extern
void
__cmx270_pci_init_irq
(
int
irq_gpio
);
extern
void
__cmx270_pci_suspend
(
void
);
extern
void
__cmx270_pci_suspend
(
void
);
extern
void
__cmx270_pci_resume
(
void
);
extern
void
__cmx270_pci_resume
(
void
);
#ifdef CONFIG_PCI
#ifdef CONFIG_PCI
#define cmx270_pci_init_irq
__cmx270_pci_init_irq
#define cmx270_pci_init_irq
(x) __cmx270_pci_init_irq(x)
#define cmx270_pci_suspend
__cmx270_pci_suspend
#define cmx270_pci_suspend
(x) __cmx270_pci_suspend(x)
#define cmx270_pci_resume
__cmx270_pci_resume
#define cmx270_pci_resume
(x) __cmx270_pci_resume(x)
#else
#else
#define cmx270_pci_init_irq() do {} while (0)
#define cmx270_pci_init_irq(
x
) do {} while (0)
#define cmx270_pci_suspend() do {} while (0)
#define cmx270_pci_suspend(
x
) do {} while (0)
#define cmx270_pci_resume() do {} while (0)
#define cmx270_pci_resume(
x
) do {} while (0)
#endif
#endif
arch/arm/mach-pxa/cm-x270.c
View file @
a9da4f7e
/*
/*
* linux/arch/arm/mach-pxa/cm-x270.c
* linux/arch/arm/mach-pxa/cm-x270.c
*
*
* Copyright (C) 2007 CompuLab, Ltd.
* Copyright (C) 2007
, 2008
CompuLab, Ltd.
* Mike Rapoport <mike@compulab.co.il>
* Mike Rapoport <mike@compulab.co.il>
*
*
* This program is free software; you can redistribute it and/or modify
* This program is free software; you can redistribute it and/or modify
...
@@ -9,44 +9,156 @@
...
@@ -9,44 +9,156 @@
* published by the Free Software Foundation.
* published by the Free Software Foundation.
*/
*/
#include <linux/types.h>
#include <linux/pm.h>
#include <linux/fb.h>
#include <linux/platform_device.h>
#include <linux/platform_device.h>
#include <linux/irq.h>
#include <linux/sysdev.h>
#include <linux/sysdev.h>
#include <linux/i
o
.h>
#include <linux/i
rq
.h>
#include <linux/
delay
.h>
#include <linux/
gpio
.h>
#include <linux/dm9000.h>
#include <linux/dm9000.h>
#include <linux/rtc-v3020.h>
#include <linux/rtc-v3020.h>
#include <linux/serial_8250.h>
#include <video/mbxfb.h>
#include <video/mbxfb.h>
#include <linux/leds.h>
#include <asm/mach/arch.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/mach/map.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa2xx-regs.h>
#include <asm/arch/pxa2xx-regs.h>
#include <asm/arch/pxa2xx-gpio.h>
#include <asm/arch/mfp-pxa27x.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/audio.h>
#include <asm/arch/audio.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/ohci.h>
#include <asm/arch/ohci.h>
#include <asm/arch/mmc.h>
#include <asm/arch/mmc.h>
#include <asm/arch/bitfield.h>
#include <asm/arch/bitfield.h>
#include <asm/arch/cm-x270.h>
#include <asm/hardware/it8152.h>
#include <asm/hardware/it8152.h>
#include "generic.h"
#include "generic.h"
#include "cm-x270-pci.h"
#include "cm-x270-pci.h"
/* virtual addresses for statically mapped regions */
#define CMX270_VIRT_BASE (0xe8000000)
#define CMX270_IT8152_VIRT (CMX270_VIRT_BASE)
#define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22))
#define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22))
#define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
#define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
static
struct
resource
cmx270_dm9k_resource
[]
=
{
/* GPIO IRQ usage */
#define GPIO10_ETHIRQ (10)
#define GPIO22_IT8152_IRQ (22)
#define GPIO83_MMC_IRQ (83)
#define GPIO95_GFXIRQ (95)
#define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ)
#define CMX270_IT8152_IRQ IRQ_GPIO(GPIO22_IT8152_IRQ)
#define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ)
#define CMX270_GFXIRQ IRQ_GPIO(GPIO95_GFXIRQ)
/* MMC power enable */
#define GPIO105_MMC_POWER (105)
static
unsigned
long
cmx270_pin_config
[]
=
{
/* AC'97 */
GPIO28_AC97_BITCLK
,
GPIO29_AC97_SDATA_IN_0
,
GPIO30_AC97_SDATA_OUT
,
GPIO31_AC97_SYNC
,
GPIO98_AC97_SYSCLK
,
GPIO113_AC97_nRESET
,
/* BTUART */
GPIO42_BTUART_RXD
,
GPIO43_BTUART_TXD
,
GPIO44_BTUART_CTS
,
GPIO45_BTUART_RTS
,
/* STUART */
GPIO46_STUART_RXD
,
GPIO47_STUART_TXD
,
/* MCI controller */
GPIO32_MMC_CLK
,
GPIO112_MMC_CMD
,
GPIO92_MMC_DAT_0
,
GPIO109_MMC_DAT_1
,
GPIO110_MMC_DAT_2
,
GPIO111_MMC_DAT_3
,
/* LCD */
GPIO58_LCD_LDD_0
,
GPIO59_LCD_LDD_1
,
GPIO60_LCD_LDD_2
,
GPIO61_LCD_LDD_3
,
GPIO62_LCD_LDD_4
,
GPIO63_LCD_LDD_5
,
GPIO64_LCD_LDD_6
,
GPIO65_LCD_LDD_7
,
GPIO66_LCD_LDD_8
,
GPIO67_LCD_LDD_9
,
GPIO68_LCD_LDD_10
,
GPIO69_LCD_LDD_11
,
GPIO70_LCD_LDD_12
,
GPIO71_LCD_LDD_13
,
GPIO72_LCD_LDD_14
,
GPIO73_LCD_LDD_15
,
GPIO74_LCD_FCLK
,
GPIO75_LCD_LCLK
,
GPIO76_LCD_PCLK
,
GPIO77_LCD_BIAS
,
/* I2C */
GPIO117_I2C_SCL
,
GPIO118_I2C_SDA
,
/* SSP1 */
GPIO23_SSP1_SCLK
,
GPIO24_SSP1_SFRM
,
GPIO25_SSP1_TXD
,
GPIO26_SSP1_RXD
,
/* SSP2 */
GPIO19_SSP2_SCLK
,
GPIO14_SSP2_SFRM
,
GPIO87_SSP2_TXD
,
GPIO88_SSP2_RXD
,
/* PC Card */
GPIO48_nPOE
,
GPIO49_nPWE
,
GPIO50_nPIOR
,
GPIO51_nPIOW
,
GPIO85_nPCE_1
,
GPIO54_nPCE_2
,
GPIO55_nPREG
,
GPIO56_nPWAIT
,
GPIO57_nIOIS16
,
/* SDRAM and local bus */
GPIO15_nCS_1
,
GPIO78_nCS_2
,
GPIO79_nCS_3
,
GPIO80_nCS_4
,
GPIO33_nCS_5
,
GPIO49_nPWE
,
GPIO18_RDY
,
/* GPIO */
GPIO0_GPIO
|
WAKEUP_ON_EDGE_BOTH
,
GPIO105_GPIO
|
MFP_LPM_DRIVE_HIGH
,
/* MMC/SD power */
GPIO53_GPIO
,
/* PC card reset */
/* NAND controls */
GPIO11_GPIO
|
MFP_LPM_DRIVE_HIGH
,
/* NAND CE# */
GPIO89_GPIO
,
/* NAND Ready/Busy */
/* interrupts */
GPIO10_GPIO
,
/* DM9000 interrupt */
GPIO83_GPIO
,
/* MMC card detect */
};
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static
struct
resource
cmx270_dm9000_resource
[]
=
{
[
0
]
=
{
[
0
]
=
{
.
start
=
DM9000_PHYS_BASE
,
.
start
=
DM9000_PHYS_BASE
,
.
end
=
DM9000_PHYS_BASE
+
4
,
.
end
=
DM9000_PHYS_BASE
+
4
,
...
@@ -64,31 +176,45 @@ static struct resource cmx270_dm9k_resource[] = {
...
@@ -64,31 +176,45 @@ static struct resource cmx270_dm9k_resource[] = {
}
}
};
};
/* for the moment we limit ourselves to 32bit IO until some
static
struct
dm9000_plat_data
cmx270_dm9000_platdata
=
{
* better IO routines can be written and tested
*/
static
struct
dm9000_plat_data
cmx270_dm9k_platdata
=
{
.
flags
=
DM9000_PLATF_32BITONLY
,
.
flags
=
DM9000_PLATF_32BITONLY
,
};
};
/* Ethernet device */
static
struct
platform_device
cmx270_dm9000_device
=
{
static
struct
platform_device
cmx270_device_dm9k
=
{
.
name
=
"dm9000"
,
.
name
=
"dm9000"
,
.
id
=
0
,
.
id
=
0
,
.
num_resources
=
ARRAY_SIZE
(
cmx270_dm9
k
_resource
),
.
num_resources
=
ARRAY_SIZE
(
cmx270_dm9
000
_resource
),
.
resource
=
cmx270_dm9
k
_resource
,
.
resource
=
cmx270_dm9
000
_resource
,
.
dev
=
{
.
dev
=
{
.
platform_data
=
&
cmx270_dm9
k
_platdata
,
.
platform_data
=
&
cmx270_dm9
000
_platdata
,
}
}
};
};
/* touchscreen controller */
static
void
__init
cmx270_init_dm9000
(
void
)
{
platform_device_register
(
&
cmx270_dm9000_device
);
}
#else
static
inline
void
cmx270_init_dm9000
(
void
)
{}
#endif
/* UCB1400 touchscreen controller */
#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
static
struct
platform_device
cmx270_ts_device
=
{
static
struct
platform_device
cmx270_ts_device
=
{
.
name
=
"ucb1400_ts"
,
.
name
=
"ucb1400_ts"
,
.
id
=
-
1
,
.
id
=
-
1
,
};
};
/* RTC */
static
void
__init
cmx270_init_touchscreen
(
void
)
{
platform_device_register
(
&
cmx270_ts_device
);
}
#else
static
inline
void
cmx270_init_touchscreen
(
void
)
{}
#endif
/* V3020 RTC */
#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
static
struct
resource
cmx270_v3020_resource
[]
=
{
static
struct
resource
cmx270_v3020_resource
[]
=
{
[
0
]
=
{
[
0
]
=
{
.
start
=
RTC_PHYS_BASE
,
.
start
=
RTC_PHYS_BASE
,
...
@@ -111,28 +237,67 @@ static struct platform_device cmx270_rtc_device = {
...
@@ -111,28 +237,67 @@ static struct platform_device cmx270_rtc_device = {
}
}
};
};
/*
static
void
__init
cmx270_init_rtc
(
void
)
* CM-X270 LEDs
{
*/
platform_device_register
(
&
cmx270_rtc_device
);
}
#else
static
inline
void
cmx270_init_rtc
(
void
)
{}
#endif
/* CM-X270 LEDs */
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
static
struct
gpio_led
cmx270_leds
[]
=
{
[
0
]
=
{
.
name
=
"cm-x270:red"
,
.
default_trigger
=
"nand-disk"
,
.
gpio
=
93
,
.
active_low
=
1
,
},
[
1
]
=
{
.
name
=
"cm-x270:green"
,
.
default_trigger
=
"heartbeat"
,
.
gpio
=
94
,
.
active_low
=
1
,
},
};
static
struct
gpio_led_platform_data
cmx270_gpio_led_pdata
=
{
.
num_leds
=
ARRAY_SIZE
(
cmx270_leds
),
.
leds
=
cmx270_leds
,
};
static
struct
platform_device
cmx270_led_device
=
{
static
struct
platform_device
cmx270_led_device
=
{
.
name
=
"
cm-x270-led
"
,
.
name
=
"
leds-gpio
"
,
.
id
=
-
1
,
.
id
=
-
1
,
.
dev
=
{
.
platform_data
=
&
cmx270_gpio_led_pdata
,
},
};
};
static
void
__init
cmx270_init_leds
(
void
)
{
platform_device_register
(
&
cmx270_led_device
);
}
#else
static
inline
void
cmx270_init_leds
(
void
)
{}
#endif
/* 2700G graphics */
/* 2700G graphics */
#if defined(CONFIG_FB_MBX) || defined(CONFIG_FB_MBX_MODULE)
static
u64
fb_dma_mask
=
~
(
u64
)
0
;
static
u64
fb_dma_mask
=
~
(
u64
)
0
;
static
struct
resource
cmx270_2700G_resource
[]
=
{
static
struct
resource
cmx270_2700G_resource
[]
=
{
/* frame buffer memory including ODFB and External SDRAM */
/* frame buffer memory including ODFB and External SDRAM */
[
0
]
=
{
[
0
]
=
{
.
start
=
MARATHON
_PHYS
,
.
start
=
PXA_CS2
_PHYS
,
.
end
=
MARATHON_PHYS
+
0x02000000
,
.
end
=
PXA_CS2_PHYS
+
0x01ffffff
,
.
flags
=
IORESOURCE_MEM
,
.
flags
=
IORESOURCE_MEM
,
},
},
/* Marathon registers */
/* Marathon registers */
[
1
]
=
{
[
1
]
=
{
.
start
=
MARATHON
_PHYS
+
0x03fe0000
,
.
start
=
PXA_CS2
_PHYS
+
0x03fe0000
,
.
end
=
MARATHON
_PHYS
+
0x03ffffff
,
.
end
=
PXA_CS2
_PHYS
+
0x03ffffff
,
.
flags
=
IORESOURCE_MEM
,
.
flags
=
IORESOURCE_MEM
,
},
},
};
};
...
@@ -200,43 +365,15 @@ static struct platform_device cmx270_2700G = {
...
@@ -200,43 +365,15 @@ static struct platform_device cmx270_2700G = {
.
id
=
-
1
,
.
id
=
-
1
,
};
};
static
u64
ata_dma_mask
=
~
(
u64
)
0
;
static
void
__init
cmx270_init_2700G
(
void
)
{
static
struct
platform_device
cmx270_ata
=
{
platform_device_register
(
&
cmx270_2700G
);
.
name
=
"pata_cm_x270"
,
}
.
id
=
-
1
,
#else
.
dev
=
{
static
inline
void
cmx270_init_2700G
(
void
)
{}
.
dma_mask
=
&
ata_dma_mask
,
#endif
.
coherent_dma_mask
=
0xffffffff
,
},
};
/* platform devices */
static
struct
platform_device
*
platform_devices
[]
__initdata
=
{
&
cmx270_device_dm9k
,
&
cmx270_rtc_device
,
&
cmx270_2700G
,
&
cmx270_led_device
,
&
cmx270_ts_device
,
&
cmx270_ata
,
};
/* Map PCI companion and IDE/General Purpose CS statically */
static
struct
map_desc
cmx270_io_desc
[]
__initdata
=
{
[
0
]
=
{
/* IDE/general purpose space */
.
virtual
=
CMX270_IDE104_VIRT
,
.
pfn
=
__phys_to_pfn
(
CMX270_IDE104_PHYS
),
.
length
=
SZ_64M
-
SZ_8M
,
.
type
=
MT_DEVICE
},
[
1
]
=
{
/* PCI bridge */
.
virtual
=
CMX270_IT8152_VIRT
,
.
pfn
=
__phys_to_pfn
(
CMX270_IT8152_PHYS
),
.
length
=
SZ_64M
,
.
type
=
MT_DEVICE
},
};
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
/*
/*
Display definitions
Display definitions
keep these for backwards compatibility, although symbolic names (as
keep these for backwards compatibility, although symbolic names (as
...
@@ -446,7 +583,16 @@ static int __init cmx270_set_display(char *str)
...
@@ -446,7 +583,16 @@ static int __init cmx270_set_display(char *str)
*/
*/
__setup
(
"monitor="
,
cmx270_set_display
);
__setup
(
"monitor="
,
cmx270_set_display
);
static
void
__init
cmx270_init_display
(
void
)
{
set_pxa_fb_info
(
cmx270_display
);
}
#else
static
inline
void
cmx270_init_display
(
void
)
{}
#endif
/* PXA27x OHCI controller setup */
/* PXA27x OHCI controller setup */
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
static
int
cmx270_ohci_init
(
struct
device
*
dev
)
static
int
cmx270_ohci_init
(
struct
device
*
dev
)
{
{
/* Set the Power Control Polarity Low */
/* Set the Power Control Polarity Low */
...
@@ -461,35 +607,37 @@ static struct pxaohci_platform_data cmx270_ohci_platform_data = {
...
@@ -461,35 +607,37 @@ static struct pxaohci_platform_data cmx270_ohci_platform_data = {
.
init
=
cmx270_ohci_init
,
.
init
=
cmx270_ohci_init
,
};
};
static
void
__init
cmx270_init_ohci
(
void
)
{
pxa_set_ohci_info
(
&
cmx270_ohci_platform_data
);
}
#else
static
inline
void
cmx270_init_ohci
(
void
)
{}
#endif
#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
static
int
cmx270_mci_init
(
struct
device
*
dev
,
static
int
cmx270_mci_init
(
struct
device
*
dev
,
irq_handler_t
cmx270_detect_int
,
irq_handler_t
cmx270_detect_int
,
void
*
data
)
void
*
data
)
{
{
int
err
;
int
err
;
/*
err
=
gpio_request
(
GPIO105_MMC_POWER
,
"MMC/SD power"
);
* setup GPIO for PXA27x MMC controller
if
(
err
)
{
*/
dev_warn
(
dev
,
"power gpio unavailable
\n
"
);
pxa_gpio_mode
(
GPIO32_MMCCLK_MD
);
return
err
;
pxa_gpio_mode
(
GPIO112_MMCCMD_MD
);
}
pxa_gpio_mode
(
GPIO92_MMCDAT0_MD
);
pxa_gpio_mode
(
GPIO109_MMCDAT1_MD
);
pxa_gpio_mode
(
GPIO110_MMCDAT2_MD
);
pxa_gpio_mode
(
GPIO111_MMCDAT3_MD
);
/* SB-X270 uses GPIO105 as SD power enable */
pxa_gpio_mode
(
105
|
GPIO_OUT
);
/* card detect IRQ on GPIO 83 */
gpio_direction_output
(
GPIO105_MMC_POWER
,
0
);
pxa_gpio_mode
(
IRQ_TO_GPIO
(
CMX270_MMC_IRQ
));
err
=
request_irq
(
CMX270_MMC_IRQ
,
cmx270_detect_int
,
err
=
request_irq
(
CMX270_MMC_IRQ
,
cmx270_detect_int
,
IRQF_DISABLED
|
IRQF_TRIGGER_FALLING
,
IRQF_DISABLED
|
IRQF_TRIGGER_FALLING
,
"MMC card detect"
,
data
);
"MMC card detect"
,
data
);
if
(
err
)
if
(
err
)
{
printk
(
KERN_ERR
"cmx270_mci_init: MMC/SD: can't"
gpio_free
(
GPIO105_MMC_POWER
);
dev_err
(
dev
,
"cmx270_mci_init: MMC/SD: can't"
" request MMC card detect IRQ
\n
"
);
" request MMC card detect IRQ
\n
"
);
}
return
err
;
return
err
;
}
}
...
@@ -499,17 +647,18 @@ static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
...
@@ -499,17 +647,18 @@ static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
struct
pxamci_platform_data
*
p_d
=
dev
->
platform_data
;
struct
pxamci_platform_data
*
p_d
=
dev
->
platform_data
;
if
((
1
<<
vdd
)
&
p_d
->
ocr_mask
)
{
if
((
1
<<
vdd
)
&
p_d
->
ocr_mask
)
{
printk
(
KERN_DEBUG
"%s: on
\n
"
,
__func__
);
dev_dbg
(
dev
,
"power on
\n
"
);
GPCR
(
105
)
=
GPIO_bit
(
105
);
gpio_set_value
(
GPIO105_MMC_POWER
,
0
);
}
else
{
}
else
{
GPSR
(
105
)
=
GPIO_bit
(
105
);
gpio_set_value
(
GPIO105_MMC_POWER
,
1
);
printk
(
KERN_DEBUG
"%s: off
\n
"
,
__func__
);
dev_dbg
(
dev
,
"power off
\n
"
);
}
}
}
}
static
void
cmx270_mci_exit
(
struct
device
*
dev
,
void
*
data
)
static
void
cmx270_mci_exit
(
struct
device
*
dev
,
void
*
data
)
{
{
free_irq
(
CMX270_MMC_IRQ
,
data
);
free_irq
(
CMX270_MMC_IRQ
,
data
);
gpio_free
(
GPIO105_MMC_POWER
);
}
}
static
struct
pxamci_platform_data
cmx270_mci_platform_data
=
{
static
struct
pxamci_platform_data
cmx270_mci_platform_data
=
{
...
@@ -519,6 +668,14 @@ static struct pxamci_platform_data cmx270_mci_platform_data = {
...
@@ -519,6 +668,14 @@ static struct pxamci_platform_data cmx270_mci_platform_data = {
.
exit
=
cmx270_mci_exit
,
.
exit
=
cmx270_mci_exit
,
};
};
static
void
__init
cmx270_init_mmc
(
void
)
{
pxa_set_mci_info
(
&
cmx270_mci_platform_data
);
}
#else
static
inline
void
cmx270_init_mmc
(
void
)
{}
#endif
#ifdef CONFIG_PM
#ifdef CONFIG_PM
static
unsigned
long
sleep_save_msc
[
10
];
static
unsigned
long
sleep_save_msc
[
10
];
...
@@ -580,53 +737,63 @@ static int __init cmx270_pm_init(void)
...
@@ -580,53 +737,63 @@ static int __init cmx270_pm_init(void)
static
int
__init
cmx270_pm_init
(
void
)
{
return
0
;
}
static
int
__init
cmx270_pm_init
(
void
)
{
return
0
;
}
#endif
#endif
static
void
__init
cmx270_init
(
void
)
#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
static
void
__init
cmx270_init_ac97
(
void
)
{
{
cmx270_pm_init
();
set_pxa_fb_info
(
cmx270_display
);
/* register CM-X270 platform devices */
platform_add_devices
(
platform_devices
,
ARRAY_SIZE
(
platform_devices
));
pxa_set_ac97_info
(
NULL
);
pxa_set_ac97_info
(
NULL
);
}
#else
static
inline
void
cmx270_init_ac97
(
void
)
{}
#endif
/* set MCI and OHCI platform parameters */
static
void
__init
cmx270_init
(
void
)
pxa_set_mci_info
(
&
cmx270_mci_platform_data
);
{
pxa_set_ohci_info
(
&
cmx270_ohci_platform_data
);
cmx270_pm_init
();
/* This enables the STUART */
pxa_gpio_mode
(
GPIO46_STRXD_MD
);
pxa_gpio_mode
(
GPIO47_STTXD_MD
);
/* This enables the BTUART */
pxa2xx_mfp_config
(
ARRAY_AND_SIZE
(
cmx270_pin_config
));
pxa_gpio_mode
(
GPIO42_BTRXD_MD
);
pxa_gpio_mode
(
GPIO43_BTTXD_MD
);
cmx270_init_dm9000
();
pxa_gpio_mode
(
GPIO44_BTCTS_MD
);
cmx270_init_rtc
();
pxa_gpio_mode
(
GPIO45_BTRTS_MD
);
cmx270_init_display
();
cmx270_init_mmc
();
cmx270_init_ohci
();
cmx270_init_ac97
();
cmx270_init_touchscreen
();
cmx270_init_leds
();
cmx270_init_2700G
();
}
}
static
void
__init
cmx270_init_irq
(
void
)
static
void
__init
cmx270_init_irq
(
void
)
{
{
pxa27x_init_irq
();
pxa27x_init_irq
();
cmx270_pci_init_irq
(
GPIO22_IT8152_IRQ
);
}
cmx270_pci_init_irq
();
#ifdef CONFIG_PCI
/* Map PCI companion statically */
static
struct
map_desc
cmx270_io_desc
[]
__initdata
=
{
[
0
]
=
{
/* PCI bridge */
.
virtual
=
CMX270_IT8152_VIRT
,
.
pfn
=
__phys_to_pfn
(
PXA_CS4_PHYS
),
.
length
=
SZ_64M
,
.
type
=
MT_DEVICE
},
};
/* Setup interrupt for dm9000 */
static
void
__init
cmx270_map_io
(
void
)
pxa_gpio_mode
(
IRQ_TO_GPIO
(
CMX270_ETHIRQ
));
{
set_irq_type
(
CMX270_ETHIRQ
,
IRQT_RISING
);
pxa_map_io
();
iotable_init
(
cmx270_io_desc
,
ARRAY_SIZE
(
cmx270_io_desc
));
/* Setup interrupt for 2700G */
it8152_base_address
=
CMX270_IT8152_VIRT
;
pxa_gpio_mode
(
IRQ_TO_GPIO
(
CMX270_GFXIRQ
));
set_irq_type
(
CMX270_GFXIRQ
,
IRQT_FALLING
);
}
}
#else
static
void
__init
cmx270_map_io
(
void
)
static
void
__init
cmx270_map_io
(
void
)
{
{
pxa_map_io
();
pxa_map_io
();
iotable_init
(
cmx270_io_desc
,
ARRAY_SIZE
(
cmx270_io_desc
));
}
}
#endif
MACHINE_START
(
ARMCORE
,
"Compulab CM-x270"
)
MACHINE_START
(
ARMCORE
,
"Compulab CM-x270"
)
.
boot_params
=
0xa0000100
,
.
boot_params
=
0xa0000100
,
...
...
arch/arm/mach-pxa/em-x270.c
View file @
a9da4f7e
/*
/*
* Support for CompuLab EM-
x
270 platform
* Support for CompuLab EM-
X
270 platform
*
*
* Copyright (C) 2007 CompuLab, Ltd.
* Copyright (C) 2007
, 2008
CompuLab, Ltd.
* Author: Mike Rapoport <mike@compulab.co.il>
* Author: Mike Rapoport <mike@compulab.co.il>
*
*
* This program is free software; you can redistribute it and/or modify
* This program is free software; you can redistribute it and/or modify
...
@@ -14,31 +14,159 @@
...
@@ -14,31 +14,159 @@
#include <linux/dm9000.h>
#include <linux/dm9000.h>
#include <linux/rtc-v3020.h>
#include <linux/rtc-v3020.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <linux/gpio_keys.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/arch.h>
#include <asm/arch/mfp-pxa27x.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa2xx-gpio.h>
#include <asm/arch/pxa27x-udc.h>
#include <asm/arch/pxa27x-udc.h>
#include <asm/arch/audio.h>
#include <asm/arch/audio.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/pxafb.h>
#include <asm/arch/ohci.h>
#include <asm/arch/ohci.h>
#include <asm/arch/mmc.h>
#include <asm/arch/mmc.h>
#include <asm/arch/
bitfiel
d.h>
#include <asm/arch/
pxa27x_keypa
d.h>
#include "generic.h"
#include "generic.h"
/* GPIO IRQ usage */
/* GPIO IRQ usage */
#define EM_X270_MMC_PD (105)
#define GPIO41_ETHIRQ (41)
#define EM_X270_ETHIRQ IRQ_GPIO(41)
#define GPIO13_MMC_CD (13)
#define EM_X270_MMC_IRQ IRQ_GPIO(13)
#define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ)
#define EM_X270_MMC_CD IRQ_GPIO(GPIO13_MMC_CD)
/* NAND control GPIOs */
#define GPIO11_NAND_CS (11)
#define GPIO56_NAND_RB (56)
static
unsigned
long
em_x270_pin_config
[]
=
{
/* AC'97 */
GPIO28_AC97_BITCLK
,
GPIO29_AC97_SDATA_IN_0
,
GPIO30_AC97_SDATA_OUT
,
GPIO31_AC97_SYNC
,
GPIO98_AC97_SYSCLK
,
GPIO113_AC97_nRESET
,
/* BTUART */
GPIO42_BTUART_RXD
,
GPIO43_BTUART_TXD
,
GPIO44_BTUART_CTS
,
GPIO45_BTUART_RTS
,
/* STUART */
GPIO46_STUART_RXD
,
GPIO47_STUART_TXD
,
/* MCI controller */
GPIO32_MMC_CLK
,
GPIO112_MMC_CMD
,
GPIO92_MMC_DAT_0
,
GPIO109_MMC_DAT_1
,
GPIO110_MMC_DAT_2
,
GPIO111_MMC_DAT_3
,
/* LCD */
GPIO58_LCD_LDD_0
,
GPIO59_LCD_LDD_1
,
GPIO60_LCD_LDD_2
,
GPIO61_LCD_LDD_3
,
GPIO62_LCD_LDD_4
,
GPIO63_LCD_LDD_5
,
GPIO64_LCD_LDD_6
,
GPIO65_LCD_LDD_7
,
GPIO66_LCD_LDD_8
,
GPIO67_LCD_LDD_9
,
GPIO68_LCD_LDD_10
,
GPIO69_LCD_LDD_11
,
GPIO70_LCD_LDD_12
,
GPIO71_LCD_LDD_13
,
GPIO72_LCD_LDD_14
,
GPIO73_LCD_LDD_15
,
GPIO74_LCD_FCLK
,
GPIO75_LCD_LCLK
,
GPIO76_LCD_PCLK
,
GPIO77_LCD_BIAS
,
/* QCI */
GPIO84_CIF_FV
,
GPIO25_CIF_LV
,
GPIO53_CIF_MCLK
,
GPIO54_CIF_PCLK
,
GPIO81_CIF_DD_0
,
GPIO55_CIF_DD_1
,
GPIO51_CIF_DD_2
,
GPIO50_CIF_DD_3
,
GPIO52_CIF_DD_4
,
GPIO48_CIF_DD_5
,
GPIO17_CIF_DD_6
,
GPIO12_CIF_DD_7
,
/* I2C */
GPIO117_I2C_SCL
,
GPIO118_I2C_SDA
,
/* Keypad */
GPIO100_KP_MKIN_0
|
WAKEUP_ON_LEVEL_HIGH
,
GPIO101_KP_MKIN_1
|
WAKEUP_ON_LEVEL_HIGH
,
GPIO102_KP_MKIN_2
|
WAKEUP_ON_LEVEL_HIGH
,
GPIO34_KP_MKIN_3
|
WAKEUP_ON_LEVEL_HIGH
,
GPIO39_KP_MKIN_4
|
WAKEUP_ON_LEVEL_HIGH
,
GPIO99_KP_MKIN_5
|
WAKEUP_ON_LEVEL_HIGH
,
GPIO91_KP_MKIN_6
|
WAKEUP_ON_LEVEL_HIGH
,
GPIO36_KP_MKIN_7
|
WAKEUP_ON_LEVEL_HIGH
,
GPIO103_KP_MKOUT_0
,
GPIO104_KP_MKOUT_1
,
GPIO105_KP_MKOUT_2
,
GPIO106_KP_MKOUT_3
,
GPIO107_KP_MKOUT_4
,
GPIO108_KP_MKOUT_5
,
GPIO96_KP_MKOUT_6
,
GPIO22_KP_MKOUT_7
,
/* SSP1 */
GPIO26_SSP1_RXD
,
GPIO23_SSP1_SCLK
,
GPIO24_SSP1_SFRM
,
GPIO57_SSP1_TXD
,
/* SSP2 */
GPIO19_SSP2_SCLK
,
GPIO14_SSP2_SFRM
,
GPIO89_SSP2_TXD
,
GPIO88_SSP2_RXD
,
/* SDRAM and local bus */
GPIO15_nCS_1
,
GPIO78_nCS_2
,
GPIO79_nCS_3
,
GPIO80_nCS_4
,
GPIO49_nPWE
,
GPIO18_RDY
,
/* GPIO */
GPIO1_GPIO
|
WAKEUP_ON_EDGE_BOTH
,
/* power controls */
GPIO20_GPIO
|
MFP_LPM_DRIVE_LOW
,
/* GPRS_PWEN */
GPIO115_GPIO
|
MFP_LPM_DRIVE_LOW
,
/* WLAN_PWEN */
/* NAND controls */
GPIO11_GPIO
|
MFP_LPM_DRIVE_HIGH
,
/* NAND CE# */
GPIO56_GPIO
,
/* NAND Ready/Busy */
/* interrupts */
GPIO13_GPIO
,
/* MMC card detect */
GPIO41_GPIO
,
/* DM9000 interrupt */
};
static
struct
resource
em_x270_dm9k_resource
[]
=
{
#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static
struct
resource
em_x270_dm9000_resource
[]
=
{
[
0
]
=
{
[
0
]
=
{
.
start
=
PXA_CS2_PHYS
,
.
start
=
PXA_CS2_PHYS
,
.
end
=
PXA_CS2_PHYS
+
3
,
.
end
=
PXA_CS2_PHYS
+
3
,
...
@@ -56,32 +184,30 @@ static struct resource em_x270_dm9k_resource[] = {
...
@@ -56,32 +184,30 @@ static struct resource em_x270_dm9k_resource[] = {
}
}
};
};
/* for the moment we limit ourselves to 32bit IO until some
static
struct
dm9000_plat_data
em_x270_dm9000_platdata
=
{
* better IO routines can be written and tested
*/
static
struct
dm9000_plat_data
em_x270_dm9k_platdata
=
{
.
flags
=
DM9000_PLATF_32BITONLY
,
.
flags
=
DM9000_PLATF_32BITONLY
,
};
};
/* Ethernet device */
static
struct
platform_device
em_x270_dm9000
=
{
static
struct
platform_device
em_x270_dm9k
=
{
.
name
=
"dm9000"
,
.
name
=
"dm9000"
,
.
id
=
0
,
.
id
=
0
,
.
num_resources
=
ARRAY_SIZE
(
em_x270_dm9
k
_resource
),
.
num_resources
=
ARRAY_SIZE
(
em_x270_dm9
000
_resource
),
.
resource
=
em_x270_dm9
k
_resource
,
.
resource
=
em_x270_dm9
000
_resource
,
.
dev
=
{
.
dev
=
{
.
platform_data
=
&
em_x270_dm9
k
_platdata
,
.
platform_data
=
&
em_x270_dm9
000
_platdata
,
}
}
};
};
/* WM9712 touchscreen controller. Hopefully the driver will make it to
static
void
__init
em_x270_init_dm9000
(
void
)
* the mainstream sometime */
{
static
struct
platform_device
em_x270_ts
=
{
platform_device_register
(
&
em_x270_dm9000
);
.
name
=
"wm97xx-ts"
,
}
.
id
=
-
1
,
#else
};
static
inline
void
em_x270_init_dm9000
(
void
)
{}
#endif
/* RTC */
/* V3020 RTC */
#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
static
struct
resource
em_x270_v3020_resource
[]
=
{
static
struct
resource
em_x270_v3020_resource
[]
=
{
[
0
]
=
{
[
0
]
=
{
.
start
=
PXA_CS4_PHYS
,
.
start
=
PXA_CS4_PHYS
,
...
@@ -104,20 +230,26 @@ static struct platform_device em_x270_rtc = {
...
@@ -104,20 +230,26 @@ static struct platform_device em_x270_rtc = {
}
}
};
};
/* NAND flash */
static
void
__init
em_x270_init_rtc
(
void
)
#define GPIO_NAND_CS (11)
{
#define GPIO_NAND_RB (56)
platform_device_register
(
&
em_x270_rtc
);
}
#else
static
inline
void
em_x270_init_rtc
(
void
)
{}
#endif
/* NAND flash */
#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
static
inline
void
nand_cs_on
(
void
)
static
inline
void
nand_cs_on
(
void
)
{
{
GPCR
(
GPIO_NAND_CS
)
=
GPIO_bit
(
GPIO_NAND_CS
);
gpio_set_value
(
GPIO11_NAND_CS
,
0
);
}
}
static
void
nand_cs_off
(
void
)
static
void
nand_cs_off
(
void
)
{
{
dsb
();
dsb
();
GPSR
(
GPIO_NAND_CS
)
=
GPIO_bit
(
GPIO_NAND_CS
);
gpio_set_value
(
GPIO11_NAND_CS
,
1
);
}
}
/* hardware specific access to control-lines */
/* hardware specific access to control-lines */
...
@@ -157,7 +289,7 @@ static int em_x270_nand_device_ready(struct mtd_info *mtd)
...
@@ -157,7 +289,7 @@ static int em_x270_nand_device_ready(struct mtd_info *mtd)
{
{
dsb
();
dsb
();
return
GPLR
(
GPIO_NAND_RB
)
&
GPIO_bit
(
GPIO
_NAND_RB
);
return
gpio_get_value
(
GPIO56
_NAND_RB
);
}
}
static
struct
mtd_partition
em_x270_partition_info
[]
=
{
static
struct
mtd_partition
em_x270_partition_info
[]
=
{
...
@@ -210,16 +342,35 @@ static struct platform_device em_x270_nand = {
...
@@ -210,16 +342,35 @@ static struct platform_device em_x270_nand = {
}
}
};
};
/* platform devices */
static
void
__init
em_x270_init_nand
(
void
)
static
struct
platform_device
*
platform_devices
[]
__initdata
=
{
{
&
em_x270_dm9k
,
int
err
;
&
em_x270_ts
,
&
em_x270_rtc
,
err
=
gpio_request
(
GPIO11_NAND_CS
,
"NAND CS"
);
&
em_x270_nand
,
if
(
err
)
{
};
pr_warning
(
"EM-X270: failed to request NAND CS gpio
\n
"
);
return
;
}
gpio_direction_output
(
GPIO11_NAND_CS
,
1
);
err
=
gpio_request
(
GPIO56_NAND_RB
,
"NAND R/B"
);
if
(
err
)
{
pr_warning
(
"EM-X270: failed to request NAND R/B gpio
\n
"
);
gpio_free
(
GPIO11_NAND_CS
);
return
;
}
gpio_direction_input
(
GPIO56_NAND_RB
);
platform_device_register
(
&
em_x270_nand
);
}
#else
static
inline
void
em_x270_init_nand
(
void
)
{}
#endif
/* PXA27x OHCI controller setup */
/* PXA27x OHCI controller setup */
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
static
int
em_x270_ohci_init
(
struct
device
*
dev
)
static
int
em_x270_ohci_init
(
struct
device
*
dev
)
{
{
/* Set the Power Control Polarity Low */
/* Set the Power Control Polarity Low */
...
@@ -237,25 +388,21 @@ static struct pxaohci_platform_data em_x270_ohci_platform_data = {
...
@@ -237,25 +388,21 @@ static struct pxaohci_platform_data em_x270_ohci_platform_data = {
.
init
=
em_x270_ohci_init
,
.
init
=
em_x270_ohci_init
,
};
};
static
void
__init
em_x270_init_ohci
(
void
)
{
pxa_set_ohci_info
(
&
em_x270_ohci_platform_data
);
}
#else
static
inline
void
em_x270_init_ohci
(
void
)
{}
#endif
/* MCI controller setup */
#if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE)
static
int
em_x270_mci_init
(
struct
device
*
dev
,
static
int
em_x270_mci_init
(
struct
device
*
dev
,
irq_handler_t
em_x270_detect_int
,
irq_handler_t
em_x270_detect_int
,
void
*
data
)
void
*
data
)
{
{
int
err
;
int
err
=
request_irq
(
EM_X270_MMC_CD
,
em_x270_detect_int
,
/* setup GPIO for PXA27x MMC controller */
pxa_gpio_mode
(
GPIO32_MMCCLK_MD
);
pxa_gpio_mode
(
GPIO112_MMCCMD_MD
);
pxa_gpio_mode
(
GPIO92_MMCDAT0_MD
);
pxa_gpio_mode
(
GPIO109_MMCDAT1_MD
);
pxa_gpio_mode
(
GPIO110_MMCDAT2_MD
);
pxa_gpio_mode
(
GPIO111_MMCDAT3_MD
);
/* EM-X270 uses GPIO13 as SD power enable */
pxa_gpio_mode
(
EM_X270_MMC_PD
|
GPIO_OUT
);
err
=
request_irq
(
EM_X270_MMC_IRQ
,
em_x270_detect_int
,
IRQF_DISABLED
|
IRQF_TRIGGER_FALLING
,
IRQF_DISABLED
|
IRQF_TRIGGER_FALLING
,
"MMC card detect"
,
data
);
"MMC card detect"
,
data
);
if
(
err
)
{
if
(
err
)
{
...
@@ -279,7 +426,8 @@ static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
...
@@ -279,7 +426,8 @@ static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
static
void
em_x270_mci_exit
(
struct
device
*
dev
,
void
*
data
)
static
void
em_x270_mci_exit
(
struct
device
*
dev
,
void
*
data
)
{
{
free_irq
(
EM_X270_MMC_IRQ
,
data
);
int
irq
=
gpio_to_irq
(
GPIO13_MMC_CD
);
free_irq
(
irq
,
data
);
}
}
static
struct
pxamci_platform_data
em_x270_mci_platform_data
=
{
static
struct
pxamci_platform_data
em_x270_mci_platform_data
=
{
...
@@ -289,7 +437,16 @@ static struct pxamci_platform_data em_x270_mci_platform_data = {
...
@@ -289,7 +437,16 @@ static struct pxamci_platform_data em_x270_mci_platform_data = {
.
exit
=
em_x270_mci_exit
,
.
exit
=
em_x270_mci_exit
,
};
};
static
void
__init
em_x270_init_mmc
(
void
)
{
pxa_set_mci_info
(
&
em_x270_mci_platform_data
);
}
#else
static
inline
void
em_x270_init_mmc
(
void
)
{}
#endif
/* LCD 480x640 */
/* LCD 480x640 */
#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
static
struct
pxafb_mode_info
em_x270_lcd_mode
=
{
static
struct
pxafb_mode_info
em_x270_lcd_mode
=
{
.
pixclock
=
50000
,
.
pixclock
=
50000
,
.
bpp
=
16
,
.
bpp
=
16
,
...
@@ -307,40 +464,96 @@ static struct pxafb_mode_info em_x270_lcd_mode = {
...
@@ -307,40 +464,96 @@ static struct pxafb_mode_info em_x270_lcd_mode = {
static
struct
pxafb_mach_info
em_x270_lcd
=
{
static
struct
pxafb_mach_info
em_x270_lcd
=
{
.
modes
=
&
em_x270_lcd_mode
,
.
modes
=
&
em_x270_lcd_mode
,
.
num_modes
=
1
,
.
num_modes
=
1
,
.
cmap_inverse
=
0
,
.
lcd_conn
=
LCD_COLOR_TFT_16BPP
,
.
cmap_static
=
0
,
.
lccr0
=
LCCR0_PAS
,
.
lccr3
=
LCCR3_PixClkDiv
(
0x01
)
|
LCCR3_Acb
(
0xff
),
};
};
static
void
__init
em_x270_init_lcd
(
void
)
static
void
__init
em_x270_init
(
void
)
{
{
/* setup LCD */
set_pxa_fb_info
(
&
em_x270_lcd
);
set_pxa_fb_info
(
&
em_x270_lcd
);
}
#else
static
inline
void
em_x270_init_lcd
(
void
)
{}
#endif
/* register EM-X270 platform devices */
#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
platform_add_devices
(
platform_devices
,
ARRAY_SIZE
(
platform_devices
));
static
void
__init
em_x270_init_ac97
(
void
)
{
pxa_set_ac97_info
(
NULL
);
pxa_set_ac97_info
(
NULL
);
}
#else
static
inline
void
em_x270_init_ac97
(
void
)
{}
#endif
#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
static
unsigned
int
em_x270_matrix_keys
[]
=
{
KEY
(
0
,
0
,
KEY_A
),
KEY
(
1
,
0
,
KEY_UP
),
KEY
(
2
,
1
,
KEY_B
),
KEY
(
0
,
2
,
KEY_LEFT
),
KEY
(
1
,
1
,
KEY_ENTER
),
KEY
(
2
,
0
,
KEY_RIGHT
),
KEY
(
0
,
1
,
KEY_C
),
KEY
(
1
,
2
,
KEY_DOWN
),
KEY
(
2
,
2
,
KEY_D
),
};
/* set MCI and OHCI platform parameters */
struct
pxa27x_keypad_platform_data
em_x270_keypad_info
=
{
pxa_set_mci_info
(
&
em_x270_mci_platform_data
);
/* code map for the matrix keys */
pxa_set_ohci_info
(
&
em_x270_ohci_platform_data
);
.
matrix_key_rows
=
3
,
.
matrix_key_cols
=
3
,
.
matrix_key_map
=
em_x270_matrix_keys
,
.
matrix_key_map_size
=
ARRAY_SIZE
(
em_x270_matrix_keys
),
};
/* setup STUART GPIOs */
static
void
__init
em_x270_init_keypad
(
void
)
pxa_gpio_mode
(
GPIO46_STRXD_MD
);
{
pxa_gpio_mode
(
GPIO47_STTXD_MD
);
pxa_set_keypad_info
(
&
em_x270_keypad_info
);
}
#else
static
inline
void
em_x270_init_keypad
(
void
)
{}
#endif
/* setup BTUART GPIOs */
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
pxa_gpio_mode
(
GPIO42_BTRXD_MD
);
static
struct
gpio_keys_button
gpio_keys_button
[]
=
{
pxa_gpio_mode
(
GPIO43_BTTXD_MD
);
[
0
]
=
{
pxa_gpio_mode
(
GPIO44_BTCTS_MD
);
.
desc
=
"sleep/wakeup"
,
pxa_gpio_mode
(
GPIO45_BTRTS_MD
);
.
code
=
KEY_SUSPEND
,
.
type
=
EV_PWR
,
.
gpio
=
1
,
.
wakeup
=
1
,
},
};
static
struct
gpio_keys_platform_data
em_x270_gpio_keys_data
=
{
.
buttons
=
gpio_keys_button
,
.
nbuttons
=
1
,
};
/* Setup interrupt for dm9000 */
static
struct
platform_device
em_x270_gpio_keys
=
{
set_irq_type
(
EM_X270_ETHIRQ
,
IRQT_RISING
);
.
name
=
"gpio-keys"
,
.
id
=
-
1
,
.
dev
=
{
.
platform_data
=
&
em_x270_gpio_keys_data
,
},
};
static
void
__init
em_x270_init_gpio_keys
(
void
)
{
platform_device_register
(
&
em_x270_gpio_keys
);
}
#else
static
inline
void
em_x270_init_gpio_keys
(
void
)
{}
#endif
static
void
__init
em_x270_init
(
void
)
{
pxa2xx_mfp_config
(
ARRAY_AND_SIZE
(
em_x270_pin_config
));
em_x270_init_dm9000
();
em_x270_init_rtc
();
em_x270_init_nand
();
em_x270_init_lcd
();
em_x270_init_mmc
();
em_x270_init_ohci
();
em_x270_init_keypad
();
em_x270_init_gpio_keys
();
em_x270_init_ac97
();
}
}
MACHINE_START
(
EM_X270
,
"Compulab EM-
x
270"
)
MACHINE_START
(
EM_X270
,
"Compulab EM-
X
270"
)
.
boot_params
=
0xa0000100
,
.
boot_params
=
0xa0000100
,
.
phys_io
=
0x40000000
,
.
phys_io
=
0x40000000
,
.
io_pg_offst
=
(
io_p2v
(
0x40000000
)
>>
18
)
&
0xfffc
,
.
io_pg_offst
=
(
io_p2v
(
0x40000000
)
>>
18
)
&
0xfffc
,
...
...
arch/arm/mach-pxa/pxa25x.c
View file @
a9da4f7e
...
@@ -109,6 +109,52 @@ static const struct clkops clk_pxa25x_lcd_ops = {
...
@@ -109,6 +109,52 @@ static const struct clkops clk_pxa25x_lcd_ops = {
.
getrate
=
clk_pxa25x_lcd_getrate
,
.
getrate
=
clk_pxa25x_lcd_getrate
,
};
};
static
unsigned
long
gpio12_config_32k
[]
=
{
GPIO12_32KHz
,
};
static
unsigned
long
gpio12_config_gpio
[]
=
{
GPIO12_GPIO
,
};
static
void
clk_gpio12_enable
(
struct
clk
*
clk
)
{
pxa2xx_mfp_config
(
gpio12_config_32k
,
1
);
}
static
void
clk_gpio12_disable
(
struct
clk
*
clk
)
{
pxa2xx_mfp_config
(
gpio12_config_gpio
,
1
);
}
static
const
struct
clkops
clk_pxa25x_gpio12_ops
=
{
.
enable
=
clk_gpio12_enable
,
.
disable
=
clk_gpio12_disable
,
};
static
unsigned
long
gpio11_config_3m6
[]
=
{
GPIO11_3_6MHz
,
};
static
unsigned
long
gpio11_config_gpio
[]
=
{
GPIO11_GPIO
,
};
static
void
clk_gpio11_enable
(
struct
clk
*
clk
)
{
pxa2xx_mfp_config
(
gpio11_config_3m6
,
1
);
}
static
void
clk_gpio11_disable
(
struct
clk
*
clk
)
{
pxa2xx_mfp_config
(
gpio11_config_gpio
,
1
);
}
static
const
struct
clkops
clk_pxa25x_gpio11_ops
=
{
.
enable
=
clk_gpio11_enable
,
.
disable
=
clk_gpio11_disable
,
};
/*
/*
* 3.6864MHz -> OST, GPIO, SSP, PWM, PLLs (95.842MHz, 147.456MHz)
* 3.6864MHz -> OST, GPIO, SSP, PWM, PLLs (95.842MHz, 147.456MHz)
* 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
* 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
...
@@ -128,6 +174,8 @@ static struct clk pxa25x_clks[] = {
...
@@ -128,6 +174,8 @@ static struct clk pxa25x_clks[] = {
INIT_CKEN
(
"UARTCLK"
,
BTUART
,
14745600
,
1
,
&
pxa_device_btuart
.
dev
),
INIT_CKEN
(
"UARTCLK"
,
BTUART
,
14745600
,
1
,
&
pxa_device_btuart
.
dev
),
INIT_CKEN
(
"UARTCLK"
,
STUART
,
14745600
,
1
,
NULL
),
INIT_CKEN
(
"UARTCLK"
,
STUART
,
14745600
,
1
,
NULL
),
INIT_CKEN
(
"UDCCLK"
,
USB
,
47923000
,
5
,
&
pxa25x_device_udc
.
dev
),
INIT_CKEN
(
"UDCCLK"
,
USB
,
47923000
,
5
,
&
pxa25x_device_udc
.
dev
),
INIT_CLK
(
"GPIO11_CLK"
,
&
clk_pxa25x_gpio11_ops
,
3686400
,
0
,
NULL
),
INIT_CLK
(
"GPIO12_CLK"
,
&
clk_pxa25x_gpio12_ops
,
32768
,
0
,
NULL
),
INIT_CKEN
(
"MMCCLK"
,
MMC
,
19169000
,
0
,
&
pxa_device_mci
.
dev
),
INIT_CKEN
(
"MMCCLK"
,
MMC
,
19169000
,
0
,
&
pxa_device_mci
.
dev
),
INIT_CKEN
(
"I2CCLK"
,
I2C
,
31949000
,
0
,
&
pxa_device_i2c
.
dev
),
INIT_CKEN
(
"I2CCLK"
,
I2C
,
31949000
,
0
,
&
pxa_device_i2c
.
dev
),
...
@@ -145,7 +193,10 @@ static struct clk pxa25x_clks[] = {
...
@@ -145,7 +193,10 @@ static struct clk pxa25x_clks[] = {
INIT_CKEN
(
"FICPCLK"
,
FICP
,
47923000
,
0
,
NULL
),
INIT_CKEN
(
"FICPCLK"
,
FICP
,
47923000
,
0
,
NULL
),
};
};
static
struct
clk
gpio7_clk
=
INIT_CKOTHER
(
"GPIO7_CK"
,
&
pxa25x_clks
[
4
],
NULL
);
static
struct
clk
pxa2xx_clk_aliases
[]
=
{
INIT_CKOTHER
(
"GPIO7_CLK"
,
&
pxa25x_clks
[
4
],
NULL
),
INIT_CKOTHER
(
"SA1111_CLK"
,
&
pxa25x_clks
[
5
],
NULL
),
};
#ifdef CONFIG_PM
#ifdef CONFIG_PM
...
@@ -293,7 +344,7 @@ static int __init pxa25x_init(void)
...
@@ -293,7 +344,7 @@ static int __init pxa25x_init(void)
int
i
,
ret
=
0
;
int
i
,
ret
=
0
;
/* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
/* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
if
(
cpu_is_pxa25
x
())
if
(
cpu_is_pxa25
5
())
clks_register
(
&
pxa25x_hwuart_clk
,
1
);
clks_register
(
&
pxa25x_hwuart_clk
,
1
);
if
(
cpu_is_pxa21x
()
||
cpu_is_pxa25x
())
{
if
(
cpu_is_pxa21x
()
||
cpu_is_pxa25x
())
{
...
@@ -317,10 +368,10 @@ static int __init pxa25x_init(void)
...
@@ -317,10 +368,10 @@ static int __init pxa25x_init(void)
}
}
/* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
/* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
if
(
cpu_is_pxa25
x
())
if
(
cpu_is_pxa25
5
())
ret
=
platform_device_register
(
&
pxa_device_hwuart
);
ret
=
platform_device_register
(
&
pxa_device_hwuart
);
clks_register
(
&
gpio7_clk
,
1
);
clks_register
(
pxa2xx_clk_aliases
,
ARRAY_SIZE
(
pxa2xx_clk_aliases
)
);
return
ret
;
return
ret
;
}
}
...
...
arch/arm/mach-sa1100/clock.c
View file @
a9da4f7e
...
@@ -103,7 +103,7 @@ static void clk_gpio27_disable(void)
...
@@ -103,7 +103,7 @@ static void clk_gpio27_disable(void)
}
}
static
struct
clk
clk_gpio27
=
{
static
struct
clk
clk_gpio27
=
{
.
name
=
"
GPIO27
_CLK"
,
.
name
=
"
SA1111
_CLK"
,
.
rate
=
3686400
,
.
rate
=
3686400
,
.
enable
=
clk_gpio27_enable
,
.
enable
=
clk_gpio27_enable
,
.
disable
=
clk_gpio27_disable
,
.
disable
=
clk_gpio27_disable
,
...
...
drivers/mtd/nand/cmx270_nand.c
View file @
a9da4f7e
...
@@ -20,9 +20,11 @@
...
@@ -20,9 +20,11 @@
#include <linux/mtd/nand.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/partitions.h>
#include <linux/gpio.h>
#include <asm/io.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/irq.h>
#include <asm/mach-types.h>
#include <asm/arch/hardware.h>
#include <asm/arch/hardware.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa-regs.h>
...
@@ -30,20 +32,6 @@
...
@@ -30,20 +32,6 @@
#define GPIO_NAND_CS (11)
#define GPIO_NAND_CS (11)
#define GPIO_NAND_RB (89)
#define GPIO_NAND_RB (89)
/* This macro needed to ensure in-order operation of GPIO and local
* bus. Without both asm command and dummy uncached read there're
* states when NAND access is broken. I've looked for such macro(s) in
* include/asm-arm but found nothing approptiate.
* dmac_clean_range is close, but is makes cache invalidation
* unnecessary here and it cannot be used in module
*/
#define DRAIN_WB() \
do { \
unsigned char dummy; \
asm volatile ("mcr p15, 0, r0, c7, c10, 4":::"r0"); \
dummy=*((unsigned char*)UNCACHED_ADDR); \
} while(0)
/* MTD structure for CM-X270 board */
/* MTD structure for CM-X270 board */
static
struct
mtd_info
*
cmx270_nand_mtd
;
static
struct
mtd_info
*
cmx270_nand_mtd
;
...
@@ -103,14 +91,14 @@ static int cmx270_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
...
@@ -103,14 +91,14 @@ static int cmx270_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
static
inline
void
nand_cs_on
(
void
)
static
inline
void
nand_cs_on
(
void
)
{
{
GPCR
(
GPIO_NAND_CS
)
=
GPIO_bit
(
GPIO_NAND_CS
);
gpio_set_value
(
GPIO_NAND_CS
,
0
);
}
}
static
void
nand_cs_off
(
void
)
static
void
nand_cs_off
(
void
)
{
{
DRAIN_WB
();
dsb
();
GPSR
(
GPIO_NAND_CS
)
=
GPIO_bit
(
GPIO_NAND_CS
);
gpio_set_value
(
GPIO_NAND_CS
,
1
);
}
}
/*
/*
...
@@ -122,7 +110,7 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
...
@@ -122,7 +110,7 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
struct
nand_chip
*
this
=
mtd
->
priv
;
struct
nand_chip
*
this
=
mtd
->
priv
;
unsigned
int
nandaddr
=
(
unsigned
int
)
this
->
IO_ADDR_W
;
unsigned
int
nandaddr
=
(
unsigned
int
)
this
->
IO_ADDR_W
;
DRAIN_WB
();
dsb
();
if
(
ctrl
&
NAND_CTRL_CHANGE
)
{
if
(
ctrl
&
NAND_CTRL_CHANGE
)
{
if
(
ctrl
&
NAND_ALE
)
if
(
ctrl
&
NAND_ALE
)
...
@@ -139,12 +127,12 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
...
@@ -139,12 +127,12 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
nand_cs_off
();
nand_cs_off
();
}
}
DRAIN_WB
();
dsb
();
this
->
IO_ADDR_W
=
(
void
__iomem
*
)
nandaddr
;
this
->
IO_ADDR_W
=
(
void
__iomem
*
)
nandaddr
;
if
(
dat
!=
NAND_CMD_NONE
)
if
(
dat
!=
NAND_CMD_NONE
)
writel
((
dat
<<
16
),
this
->
IO_ADDR_W
);
writel
((
dat
<<
16
),
this
->
IO_ADDR_W
);
DRAIN_WB
();
dsb
();
}
}
/*
/*
...
@@ -152,9 +140,9 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
...
@@ -152,9 +140,9 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
*/
*/
static
int
cmx270_device_ready
(
struct
mtd_info
*
mtd
)
static
int
cmx270_device_ready
(
struct
mtd_info
*
mtd
)
{
{
DRAIN_WB
();
dsb
();
return
(
GPLR
(
GPIO_NAND_RB
)
&
GPIO_bit
(
GPIO_NAND_RB
));
return
(
gpio_get_value
(
GPIO_NAND_RB
));
}
}
/*
/*
...
@@ -168,20 +156,40 @@ static int cmx270_init(void)
...
@@ -168,20 +156,40 @@ static int cmx270_init(void)
int
mtd_parts_nb
=
0
;
int
mtd_parts_nb
=
0
;
int
ret
;
int
ret
;
if
(
!
machine_is_armcore
())
return
-
ENODEV
;
ret
=
gpio_request
(
GPIO_NAND_CS
,
"NAND CS"
);
if
(
ret
)
{
pr_warning
(
"CM-X270: failed to request NAND CS gpio
\n
"
);
return
ret
;
}
gpio_direction_output
(
GPIO_NAND_CS
,
1
);
ret
=
gpio_request
(
GPIO_NAND_RB
,
"NAND R/B"
);
if
(
ret
)
{
pr_warning
(
"CM-X270: failed to request NAND R/B gpio
\n
"
);
goto
err_gpio_request
;
}
gpio_direction_input
(
GPIO_NAND_RB
);
/* Allocate memory for MTD device structure and private data */
/* Allocate memory for MTD device structure and private data */
cmx270_nand_mtd
=
kzalloc
(
sizeof
(
struct
mtd_info
)
+
cmx270_nand_mtd
=
kzalloc
(
sizeof
(
struct
mtd_info
)
+
sizeof
(
struct
nand_chip
),
sizeof
(
struct
nand_chip
),
GFP_KERNEL
);
GFP_KERNEL
);
if
(
!
cmx270_nand_mtd
)
{
if
(
!
cmx270_nand_mtd
)
{
printk
(
"Unable to allocate CM-X270 NAND MTD device structure.
\n
"
);
pr_debug
(
"Unable to allocate CM-X270 NAND MTD device structure.
\n
"
);
return
-
ENOMEM
;
ret
=
-
ENOMEM
;
goto
err_kzalloc
;
}
}
cmx270_nand_io
=
ioremap
(
PXA_CS1_PHYS
,
12
);
cmx270_nand_io
=
ioremap
(
PXA_CS1_PHYS
,
12
);
if
(
!
cmx270_nand_io
)
{
if
(
!
cmx270_nand_io
)
{
pr
intk
(
"Unable to ioremap NAND device
\n
"
);
pr
_debug
(
"Unable to ioremap NAND device
\n
"
);
ret
=
-
EINVAL
;
ret
=
-
EINVAL
;
goto
err
1
;
goto
err
_ioremap
;
}
}
/* Get pointer to private data */
/* Get pointer to private data */
...
@@ -209,9 +217,9 @@ static int cmx270_init(void)
...
@@ -209,9 +217,9 @@ static int cmx270_init(void)
/* Scan to find existence of the device */
/* Scan to find existence of the device */
if
(
nand_scan
(
cmx270_nand_mtd
,
1
))
{
if
(
nand_scan
(
cmx270_nand_mtd
,
1
))
{
pr
intk
(
KERN_NOTICE
"No NAND device
\n
"
);
pr
_notice
(
"No NAND device
\n
"
);
ret
=
-
ENXIO
;
ret
=
-
ENXIO
;
goto
err
2
;
goto
err
_scan
;
}
}
#ifdef CONFIG_MTD_CMDLINE_PARTS
#ifdef CONFIG_MTD_CMDLINE_PARTS
...
@@ -229,18 +237,22 @@ static int cmx270_init(void)
...
@@ -229,18 +237,22 @@ static int cmx270_init(void)
}
}
/* Register the partitions */
/* Register the partitions */
pr
intk
(
KERN_NOTICE
"Using %s partition definition
\n
"
,
part_type
);
pr
_notice
(
"Using %s partition definition
\n
"
,
part_type
);
ret
=
add_mtd_partitions
(
cmx270_nand_mtd
,
mtd_parts
,
mtd_parts_nb
);
ret
=
add_mtd_partitions
(
cmx270_nand_mtd
,
mtd_parts
,
mtd_parts_nb
);
if
(
ret
)
if
(
ret
)
goto
err
2
;
goto
err
_scan
;
/* Return happy */
/* Return happy */
return
0
;
return
0
;
err
2
:
err
_scan
:
iounmap
(
cmx270_nand_io
);
iounmap
(
cmx270_nand_io
);
err
1
:
err
_ioremap
:
kfree
(
cmx270_nand_mtd
);
kfree
(
cmx270_nand_mtd
);
err_kzalloc:
gpio_free
(
GPIO_NAND_RB
);
err_gpio_request:
gpio_free
(
GPIO_NAND_CS
);
return
ret
;
return
ret
;
...
@@ -255,6 +267,9 @@ static void cmx270_cleanup(void)
...
@@ -255,6 +267,9 @@ static void cmx270_cleanup(void)
/* Release resources, unregister device */
/* Release resources, unregister device */
nand_release
(
cmx270_nand_mtd
);
nand_release
(
cmx270_nand_mtd
);
gpio_free
(
GPIO_NAND_RB
);
gpio_free
(
GPIO_NAND_CS
);
iounmap
(
cmx270_nand_io
);
iounmap
(
cmx270_nand_io
);
/* Free the MTD device structure */
/* Free the MTD device structure */
...
...
drivers/pcmcia/pxa2xx_cm_x270.c
View file @
a9da4f7e
...
@@ -5,83 +5,60 @@
...
@@ -5,83 +5,60 @@
* it under the terms of the GNU General Public License version 2 as
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* published by the Free Software Foundation.
*
*
* Compulab Ltd., 2003, 2007
* Compulab Ltd., 2003, 2007
, 2008
* Mike Rapoport <mike@compulab.co.il>
* Mike Rapoport <mike@compulab.co.il>
*
*
*/
*/
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/platform_device.h>
#include <linux/platform_device.h>
#include <linux/irq.h>
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <pcmcia/ss.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach-types.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/pxa2xx-gpio.h>
#include <asm/arch/cm-x270.h>
#include "soc_common.h"
#include "soc_common.h"
#define GPIO_PCMCIA_S0_CD_VALID (84)
#define GPIO_PCMCIA_S0_RDYINT (82)
#define GPIO_PCMCIA_RESET (53)
#define PCMCIA_S0_CD_VALID IRQ_GPIO(GPIO_PCMCIA_S0_CD_VALID)
#define PCMCIA_S0_RDYINT IRQ_GPIO(GPIO_PCMCIA_S0_RDYINT)
static
struct
pcmcia_irqs
irqs
[]
=
{
static
struct
pcmcia_irqs
irqs
[]
=
{
{
0
,
PCMCIA_S0_CD_VALID
,
"PCMCIA0 CD"
},
{
0
,
PCMCIA_S0_CD_VALID
,
"PCMCIA0 CD"
},
{
1
,
PCMCIA_S1_CD_VALID
,
"PCMCIA1 CD"
},
};
};
static
int
cmx270_pcmcia_hw_init
(
struct
soc_pcmcia_socket
*
skt
)
static
int
cmx270_pcmcia_hw_init
(
struct
soc_pcmcia_socket
*
skt
)
{
{
GPSR
(
GPIO48_nPOE
)
=
GPIO_bit
(
GPIO48_nPOE
)
|
int
ret
=
gpio_request
(
GPIO_PCMCIA_RESET
,
"PCCard reset"
);
GPIO_bit
(
GPIO49_nPWE
)
|
if
(
ret
)
GPIO_bit
(
GPIO50_nPIOR
)
|
return
ret
;
GPIO_bit
(
GPIO51_nPIOW
)
|
gpio_direction_output
(
GPIO_PCMCIA_RESET
,
0
);
GPIO_bit
(
GPIO85_nPCE_1
)
|
GPIO_bit
(
GPIO54_nPCE_2
);
skt
->
irq
=
PCMCIA_S0_RDYINT
;
ret
=
soc_pcmcia_request_irqs
(
skt
,
irqs
,
ARRAY_SIZE
(
irqs
));
pxa_gpio_mode
(
GPIO48_nPOE_MD
);
if
(
!
ret
)
pxa_gpio_mode
(
GPIO49_nPWE_MD
);
gpio_free
(
GPIO_PCMCIA_RESET
);
pxa_gpio_mode
(
GPIO50_nPIOR_MD
);
pxa_gpio_mode
(
GPIO51_nPIOW_MD
);
return
ret
;
pxa_gpio_mode
(
GPIO85_nPCE_1_MD
);
pxa_gpio_mode
(
GPIO54_nPCE_2_MD
);
pxa_gpio_mode
(
GPIO55_nPREG_MD
);
pxa_gpio_mode
(
GPIO56_nPWAIT_MD
);
pxa_gpio_mode
(
GPIO57_nIOIS16_MD
);
/* Reset signal */
pxa_gpio_mode
(
GPIO53_nPCE_2
|
GPIO_OUT
);
GPCR
(
GPIO53_nPCE_2
)
=
GPIO_bit
(
GPIO53_nPCE_2
);
set_irq_type
(
PCMCIA_S0_CD_VALID
,
IRQ_TYPE_EDGE_BOTH
);
set_irq_type
(
PCMCIA_S1_CD_VALID
,
IRQ_TYPE_EDGE_BOTH
);
/* irq's for slots: */
set_irq_type
(
PCMCIA_S0_RDYINT
,
IRQ_TYPE_EDGE_FALLING
);
set_irq_type
(
PCMCIA_S1_RDYINT
,
IRQ_TYPE_EDGE_FALLING
);
skt
->
irq
=
(
skt
->
nr
==
0
)
?
PCMCIA_S0_RDYINT
:
PCMCIA_S1_RDYINT
;
return
soc_pcmcia_request_irqs
(
skt
,
irqs
,
ARRAY_SIZE
(
irqs
));
}
}
static
void
cmx270_pcmcia_shutdown
(
struct
soc_pcmcia_socket
*
skt
)
static
void
cmx270_pcmcia_shutdown
(
struct
soc_pcmcia_socket
*
skt
)
{
{
soc_pcmcia_free_irqs
(
skt
,
irqs
,
ARRAY_SIZE
(
irqs
));
soc_pcmcia_free_irqs
(
skt
,
irqs
,
ARRAY_SIZE
(
irqs
));
gpio_free
(
GPIO_PCMCIA_RESET
);
set_irq_type
(
IRQ_TO_GPIO
(
PCMCIA_S0_CD_VALID
),
IRQ_TYPE_NONE
);
set_irq_type
(
IRQ_TO_GPIO
(
PCMCIA_S1_CD_VALID
),
IRQ_TYPE_NONE
);
set_irq_type
(
IRQ_TO_GPIO
(
PCMCIA_S0_RDYINT
),
IRQ_TYPE_NONE
);
set_irq_type
(
IRQ_TO_GPIO
(
PCMCIA_S1_RDYINT
),
IRQ_TYPE_NONE
);
}
}
static
void
cmx270_pcmcia_socket_state
(
struct
soc_pcmcia_socket
*
skt
,
static
void
cmx270_pcmcia_socket_state
(
struct
soc_pcmcia_socket
*
skt
,
struct
pcmcia_state
*
state
)
struct
pcmcia_state
*
state
)
{
{
state
->
detect
=
(
PCC_DETECT
(
skt
->
nr
)
==
0
)
?
1
:
0
;
state
->
detect
=
(
gpio_get_value
(
GPIO_PCMCIA_S0_CD_VALID
)
==
0
)
?
1
:
0
;
state
->
ready
=
(
PCC_READY
(
skt
->
nr
)
==
0
)
?
0
:
1
;
state
->
ready
=
(
gpio_get_value
(
GPIO_PCMCIA_S0_RDYINT
)
==
0
)
?
0
:
1
;
state
->
bvd1
=
1
;
state
->
bvd1
=
1
;
state
->
bvd2
=
1
;
state
->
bvd2
=
1
;
state
->
vs_3v
=
0
;
state
->
vs_3v
=
0
;
...
@@ -93,32 +70,16 @@ static void cmx270_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
...
@@ -93,32 +70,16 @@ static void cmx270_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
static
int
cmx270_pcmcia_configure_socket
(
struct
soc_pcmcia_socket
*
skt
,
static
int
cmx270_pcmcia_configure_socket
(
struct
soc_pcmcia_socket
*
skt
,
const
socket_state_t
*
state
)
const
socket_state_t
*
state
)
{
{
GPSR
(
GPIO49_nPWE
)
=
GPIO_bit
(
GPIO49_nPWE
);
pxa_gpio_mode
(
GPIO49_nPWE
|
GPIO_OUT
);
switch
(
skt
->
nr
)
{
switch
(
skt
->
nr
)
{
case
0
:
case
0
:
if
(
state
->
flags
&
SS_RESET
)
{
if
(
state
->
flags
&
SS_RESET
)
{
GPCR
(
GPIO49_nPWE
)
=
GPIO_bit
(
GPIO49_nPWE
);
gpio_set_value
(
GPIO_PCMCIA_RESET
,
1
);
GPSR
(
GPIO53_nPCE_2
)
=
GPIO_bit
(
GPIO53_nPCE_2
);
udelay
(
10
);
GPCR
(
GPIO53_nPCE_2
)
=
GPIO_bit
(
GPIO53_nPCE_2
);
GPSR
(
GPIO49_nPWE
)
=
GPIO_bit
(
GPIO49_nPWE
);
}
break
;
case
1
:
if
(
state
->
flags
&
SS_RESET
)
{
GPCR
(
GPIO49_nPWE
)
=
GPIO_bit
(
GPIO49_nPWE
);
GPSR
(
GPIO53_nPCE_2
)
=
GPIO_bit
(
GPIO53_nPCE_2
);
udelay
(
10
);
udelay
(
10
);
GPCR
(
GPIO53_nPCE_2
)
=
GPIO_bit
(
GPIO53_nPCE_2
);
gpio_set_value
(
GPIO_PCMCIA_RESET
,
0
);
GPSR
(
GPIO49_nPWE
)
=
GPIO_bit
(
GPIO49_nPWE
);
}
}
break
;
break
;
}
}
pxa_gpio_mode
(
GPIO49_nPWE_MD
);
return
0
;
return
0
;
}
}
...
@@ -139,7 +100,7 @@ static struct pcmcia_low_level cmx270_pcmcia_ops __initdata = {
...
@@ -139,7 +100,7 @@ static struct pcmcia_low_level cmx270_pcmcia_ops __initdata = {
.
configure_socket
=
cmx270_pcmcia_configure_socket
,
.
configure_socket
=
cmx270_pcmcia_configure_socket
,
.
socket_init
=
cmx270_pcmcia_socket_init
,
.
socket_init
=
cmx270_pcmcia_socket_init
,
.
socket_suspend
=
cmx270_pcmcia_socket_suspend
,
.
socket_suspend
=
cmx270_pcmcia_socket_suspend
,
.
nr
=
2
,
.
nr
=
1
,
};
};
static
struct
platform_device
*
cmx270_pcmcia_device
;
static
struct
platform_device
*
cmx270_pcmcia_device
;
...
...
include/asm-arm/arch-pxa/cm-x270.h
deleted
100644 → 0
View file @
67f5cd0f
/*
* linux/include/asm/arch-pxa/cm-x270.h
*
* Copyright Compulab Ltd., 2003, 2007
* Mike Rapoport <mike@compulab.co.il>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/* CM-x270 device physical addresses */
#define CMX270_CS1_PHYS (PXA_CS1_PHYS)
#define MARATHON_PHYS (PXA_CS2_PHYS)
#define CMX270_IDE104_PHYS (PXA_CS3_PHYS)
#define CMX270_IT8152_PHYS (PXA_CS4_PHYS)
/* Statically mapped regions */
#define CMX270_VIRT_BASE (0xe8000000)
#define CMX270_IT8152_VIRT (CMX270_VIRT_BASE)
#define CMX270_IDE104_VIRT (CMX270_IT8152_VIRT + SZ_64M)
/* GPIO related definitions */
#define GPIO_IT8152_IRQ (22)
#define IRQ_GPIO_IT8152_IRQ IRQ_GPIO(GPIO_IT8152_IRQ)
#define PME_IRQ IRQ_GPIO(0)
#define CMX270_IDE_IRQ IRQ_GPIO(100)
#define CMX270_GPIRQ1 IRQ_GPIO(101)
#define CMX270_TOUCHIRQ IRQ_GPIO(96)
#define CMX270_ETHIRQ IRQ_GPIO(10)
#define CMX270_GFXIRQ IRQ_GPIO(95)
#define CMX270_NANDIRQ IRQ_GPIO(89)
#define CMX270_MMC_IRQ IRQ_GPIO(83)
/* PCMCIA related definitions */
#define PCC_DETECT(x) (GPLR(84 - (x)) & GPIO_bit(84 - (x)))
#define PCC_READY(x) (GPLR(82 - (x)) & GPIO_bit(82 - (x)))
#define PCMCIA_S0_CD_VALID IRQ_GPIO(84)
#define PCMCIA_S0_CD_VALID_EDGE GPIO_BOTH_EDGES
#define PCMCIA_S1_CD_VALID IRQ_GPIO(83)
#define PCMCIA_S1_CD_VALID_EDGE GPIO_BOTH_EDGES
#define PCMCIA_S0_RDYINT IRQ_GPIO(82)
#define PCMCIA_S1_RDYINT IRQ_GPIO(81)
#define PCMCIA_RESET_GPIO 53
include/asm-arm/arch-pxa/hardware.h
View file @
a9da4f7e
...
@@ -69,6 +69,12 @@
...
@@ -69,6 +69,12 @@
_id == 0x212; \
_id == 0x212; \
})
})
#define __cpu_is_pxa255(id) \
({ \
unsigned int _id = (id) >> 4 & 0xfff; \
_id == 0x2d0; \
})
#define __cpu_is_pxa25x(id) \
#define __cpu_is_pxa25x(id) \
({ \
({ \
unsigned int _id = (id) >> 4 & 0xfff; \
unsigned int _id = (id) >> 4 & 0xfff; \
...
@@ -76,6 +82,7 @@
...
@@ -76,6 +82,7 @@
})
})
#else
#else
#define __cpu_is_pxa21x(id) (0)
#define __cpu_is_pxa21x(id) (0)
#define __cpu_is_pxa255(id) (0)
#define __cpu_is_pxa25x(id) (0)
#define __cpu_is_pxa25x(id) (0)
#endif
#endif
...
@@ -124,6 +131,11 @@
...
@@ -124,6 +131,11 @@
__cpu_is_pxa21x(read_cpuid_id()); \
__cpu_is_pxa21x(read_cpuid_id()); \
})
})
#define cpu_is_pxa255() \
({ \
__cpu_is_pxa255(read_cpuid_id()); \
})
#define cpu_is_pxa25x() \
#define cpu_is_pxa25x() \
({ \
({ \
__cpu_is_pxa25x(read_cpuid_id()); \
__cpu_is_pxa25x(read_cpuid_id()); \
...
...
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