Commit a6dbf93a authored by Paul Mackerras's avatar Paul Mackerras Committed by Benjamin Herrenschmidt

powerpc: Fix bug where perf_counters breaks oprofile

Currently there is a bug where if you use oprofile on a pSeries
machine, then use perf_counters, then use oprofile again, oprofile
will not work correctly; it will lose the PMU configuration the next
time the hypervisor does a partition context switch, and thereafter
won't count anything.

Maynard Johnson identified the sequence causing the problem:
- oprofile setup calls ppc_enable_pmcs(), which calls
  pseries_lpar_enable_pmcs, which tells the hypervisor that we want
  to use the PMU, and sets the "PMU in use" flag in the lppaca.
  This flag tells the hypervisor whether it needs to save and restore
  the PMU config.
- The perf_counter code sets and clears the "PMU in use" flag directly
  as it context-switches the PMU between tasks, and leaves it clear
  when it finishes.
- oprofile setup, called for a new oprofile run, calls ppc_enable_pmcs,
  which does nothing because it has already been called.  In particular
  it doesn't set the "PMU in use" flag.

This fixes the problem by arranging for ppc_enable_pmcs to always set
the "PMU in use" flag.  It makes the perf_counter code call
ppc_enable_pmcs also rather than calling the lower-level function
directly, and removes the setting of the "PMU in use" flag from
pseries_lpar_enable_pmcs, since that is now done in its caller.

This also removes the declaration of pasemi_enable_pmcs because it
isn't defined anywhere.
Reported-by: default avatarMaynard Johnson <mpjohn@us.ibm.com>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
Cc: <stable@kernel.org)
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 757cbd46
...@@ -27,10 +27,22 @@ extern perf_irq_t perf_irq; ...@@ -27,10 +27,22 @@ extern perf_irq_t perf_irq;
int reserve_pmc_hardware(perf_irq_t new_perf_irq); int reserve_pmc_hardware(perf_irq_t new_perf_irq);
void release_pmc_hardware(void); void release_pmc_hardware(void);
void ppc_enable_pmcs(void);
#ifdef CONFIG_PPC64 #ifdef CONFIG_PPC64
void power4_enable_pmcs(void); #include <asm/lppaca.h>
void pasemi_enable_pmcs(void);
static inline void ppc_set_pmu_inuse(int inuse)
{
get_lppaca()->pmcregs_in_use = inuse;
}
extern void power4_enable_pmcs(void);
#else /* CONFIG_PPC64 */
static inline void ppc_set_pmu_inuse(int inuse) { }
#endif #endif
#endif /* __KERNEL__ */ #endif /* __KERNEL__ */
......
...@@ -62,7 +62,6 @@ static inline unsigned long perf_ip_adjust(struct pt_regs *regs) ...@@ -62,7 +62,6 @@ static inline unsigned long perf_ip_adjust(struct pt_regs *regs)
{ {
return 0; return 0;
} }
static inline void perf_set_pmu_inuse(int inuse) { }
static inline void perf_get_data_addr(struct pt_regs *regs, u64 *addrp) { } static inline void perf_get_data_addr(struct pt_regs *regs, u64 *addrp) { }
static inline u32 perf_get_misc_flags(struct pt_regs *regs) static inline u32 perf_get_misc_flags(struct pt_regs *regs)
{ {
...@@ -93,11 +92,6 @@ static inline unsigned long perf_ip_adjust(struct pt_regs *regs) ...@@ -93,11 +92,6 @@ static inline unsigned long perf_ip_adjust(struct pt_regs *regs)
return 0; return 0;
} }
static inline void perf_set_pmu_inuse(int inuse)
{
get_lppaca()->pmcregs_in_use = inuse;
}
/* /*
* The user wants a data address recorded. * The user wants a data address recorded.
* If we're not doing instruction sampling, give them the SDAR * If we're not doing instruction sampling, give them the SDAR
...@@ -531,8 +525,7 @@ void hw_perf_disable(void) ...@@ -531,8 +525,7 @@ void hw_perf_disable(void)
* Check if we ever enabled the PMU on this cpu. * Check if we ever enabled the PMU on this cpu.
*/ */
if (!cpuhw->pmcs_enabled) { if (!cpuhw->pmcs_enabled) {
if (ppc_md.enable_pmcs) ppc_enable_pmcs();
ppc_md.enable_pmcs();
cpuhw->pmcs_enabled = 1; cpuhw->pmcs_enabled = 1;
} }
...@@ -594,7 +587,7 @@ void hw_perf_enable(void) ...@@ -594,7 +587,7 @@ void hw_perf_enable(void)
mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE);
mtspr(SPRN_MMCR1, cpuhw->mmcr[1]); mtspr(SPRN_MMCR1, cpuhw->mmcr[1]);
if (cpuhw->n_counters == 0) if (cpuhw->n_counters == 0)
perf_set_pmu_inuse(0); ppc_set_pmu_inuse(0);
goto out_enable; goto out_enable;
} }
...@@ -627,7 +620,7 @@ void hw_perf_enable(void) ...@@ -627,7 +620,7 @@ void hw_perf_enable(void)
* bit set and set the hardware counters to their initial values. * bit set and set the hardware counters to their initial values.
* Then unfreeze the counters. * Then unfreeze the counters.
*/ */
perf_set_pmu_inuse(1); ppc_set_pmu_inuse(1);
mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE);
mtspr(SPRN_MMCR1, cpuhw->mmcr[1]); mtspr(SPRN_MMCR1, cpuhw->mmcr[1]);
mtspr(SPRN_MMCR0, (cpuhw->mmcr[0] & ~(MMCR0_PMC1CE | MMCR0_PMCjCE)) mtspr(SPRN_MMCR0, (cpuhw->mmcr[0] & ~(MMCR0_PMC1CE | MMCR0_PMCjCE))
......
...@@ -17,6 +17,7 @@ ...@@ -17,6 +17,7 @@
#include <asm/prom.h> #include <asm/prom.h>
#include <asm/machdep.h> #include <asm/machdep.h>
#include <asm/smp.h> #include <asm/smp.h>
#include <asm/pmc.h>
#include "cacheinfo.h" #include "cacheinfo.h"
...@@ -123,6 +124,8 @@ static DEFINE_PER_CPU(char, pmcs_enabled); ...@@ -123,6 +124,8 @@ static DEFINE_PER_CPU(char, pmcs_enabled);
void ppc_enable_pmcs(void) void ppc_enable_pmcs(void)
{ {
ppc_set_pmu_inuse(1);
/* Only need to enable them once */ /* Only need to enable them once */
if (__get_cpu_var(pmcs_enabled)) if (__get_cpu_var(pmcs_enabled))
return; return;
......
...@@ -223,10 +223,6 @@ static void pseries_lpar_enable_pmcs(void) ...@@ -223,10 +223,6 @@ static void pseries_lpar_enable_pmcs(void)
set = 1UL << 63; set = 1UL << 63;
reset = 0; reset = 0;
plpar_hcall_norets(H_PERFMON, set, reset); plpar_hcall_norets(H_PERFMON, set, reset);
/* instruct hypervisor to maintain PMCs */
if (firmware_has_feature(FW_FEATURE_SPLPAR))
get_lppaca()->pmcregs_in_use = 1;
} }
static void __init pseries_discover_pic(void) static void __init pseries_discover_pic(void)
......
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