Commit a1897fa6 authored by Lennert Buytenhek's avatar Lennert Buytenhek Committed by Nicolas Pitre

[ARM] Kirkwood: clarify PCIe MEM bus/physical address distinction

Signed-off-by: default avatarLennert Buytenhek <buytenh@marvell.com>
Signed-off-by: default avatarNicolas Pitre <nico@marvell.com>
parent 35f029e2
......@@ -105,7 +105,7 @@ void __init kirkwood_setup_cpu_mbus(void)
setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE,
TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE);
setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE,
TARGET_PCIE, ATTR_PCIE_MEM, -1);
TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE);
/*
* Setup window for NAND controller.
......
......@@ -43,6 +43,7 @@
#define KIRKWOOD_REGS_SIZE SZ_1M
#define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000
#define KIRKWOOD_PCIE_MEM_BUS_BASE 0xe0000000
#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M
/*
......
......@@ -126,7 +126,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
*/
res[1].name = "PCIe Memory Space";
res[1].flags = IORESOURCE_MEM;
res[1].start = KIRKWOOD_PCIE_MEM_PHYS_BASE;
res[1].start = KIRKWOOD_PCIE_MEM_BUS_BASE;
res[1].end = res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1;
if (request_resource(&iomem_resource, &res[1]))
panic("Request PCIe Memory resource failed\n");
......
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