Commit 9fe02c03 authored by Linus Torvalds's avatar Linus Torvalds

Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm: (25 commits)
  [ARM] 5519/1: amba probe: pass "struct amba_id *" instead of void *
  [ARM] 5517/1: integrator: don't put clock lookups in __initdata
  [ARM] 5518/1: versatile: don't put clock lookups in __initdata
  [ARM] mach-l7200: fix spelling of SYS_CLOCK_OFF
  [ARM] Double check memmap is actually valid with a memmap has unexpected holes V2
  [ARM] realview: fix broadcast tick support
  [ARM] realview: remove useless smp_cross_call_done()
  [ARM] smp: fix cpumask usage in ARM SMP code
  [ARM] 5513/1: Eurotech VIPER SBC: fix compilation error
  [ARM] 5509/1: ep93xx: clkdev enable UARTS
  ARM: OMAP2/3: Change omapfb to use clkdev for dispc and rfbi, v2
  ARM: OMAP3: Fix HW SAVEANDRESTORE shift define
  ARM: OMAP3: Fix number of GPIO lines for 34xx
  [ARM] S3C: Do not set clk->owner field if unset
  [ARM] S3C2410: mach-bast.c registering i2c data too early
  [ARM] S3C24XX: Fix unused code warning in arch/arm/plat-s3c24xx/dma.c
  [ARM] S3C64XX: fix GPIO debug
  [ARM] S3C64XX: GPIO include cleanup
  [ARM] nwfpe: fix 'floatx80_is_nan' sparse warning
  [ARM] nwfpe: Add decleration for ExtendedCPDO
  ...
parents 6c2445ef 03fbdb15
...@@ -273,6 +273,7 @@ config ARCH_EP93XX ...@@ -273,6 +273,7 @@ config ARCH_EP93XX
select HAVE_CLK select HAVE_CLK
select COMMON_CLKDEV select COMMON_CLKDEV
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARCH_HAS_HOLES_MEMORYMODEL
help help
This enables support for the Cirrus EP93xx series of CPUs. This enables support for the Cirrus EP93xx series of CPUs.
...@@ -976,10 +977,9 @@ config OABI_COMPAT ...@@ -976,10 +977,9 @@ config OABI_COMPAT
UNPREDICTABLE (in fact it can be predicted that it won't work UNPREDICTABLE (in fact it can be predicted that it won't work
at all). If in doubt say Y. at all). If in doubt say Y.
config ARCH_FLATMEM_HAS_HOLES config ARCH_HAS_HOLES_MEMORYMODEL
bool bool
default y default n
depends on FLATMEM
# Discontigmem is deprecated # Discontigmem is deprecated
config ARCH_DISCONTIGMEM_ENABLE config ARCH_DISCONTIGMEM_ENABLE
......
...@@ -253,9 +253,9 @@ void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) ...@@ -253,9 +253,9 @@ void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
} }
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
void gic_raise_softirq(cpumask_t cpumask, unsigned int irq) void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
{ {
unsigned long map = *cpus_addr(cpumask); unsigned long map = *cpus_addr(*mask);
/* this always happens on GIC0 */ /* this always happens on GIC0 */
writel(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT); writel(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT);
......
...@@ -36,7 +36,7 @@ ...@@ -36,7 +36,7 @@
void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start); void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start);
void gic_cpu_init(unsigned int gic_nr, void __iomem *base); void gic_cpu_init(unsigned int gic_nr, void __iomem *base);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
void gic_raise_softirq(cpumask_t cpumask, unsigned int irq); void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
#endif #endif
#endif #endif
...@@ -53,17 +53,12 @@ extern void smp_store_cpu_info(unsigned int cpuid); ...@@ -53,17 +53,12 @@ extern void smp_store_cpu_info(unsigned int cpuid);
/* /*
* Raise an IPI cross call on CPUs in callmap. * Raise an IPI cross call on CPUs in callmap.
*/ */
extern void smp_cross_call(cpumask_t callmap); extern void smp_cross_call(const struct cpumask *mask);
/*
* Broadcast a timer interrupt to the other CPUs.
*/
extern void smp_send_timer(void);
/* /*
* Broadcast a clock event to other CPUs. * Broadcast a clock event to other CPUs.
*/ */
extern void smp_timer_broadcast(cpumask_t mask); extern void smp_timer_broadcast(const struct cpumask *mask);
/* /*
* Boot a secondary CPU, and assign it the specified idle task. * Boot a secondary CPU, and assign it the specified idle task.
...@@ -102,7 +97,8 @@ extern int platform_cpu_kill(unsigned int cpu); ...@@ -102,7 +97,8 @@ extern int platform_cpu_kill(unsigned int cpu);
extern void platform_cpu_enable(unsigned int cpu); extern void platform_cpu_enable(unsigned int cpu);
extern void arch_send_call_function_single_ipi(int cpu); extern void arch_send_call_function_single_ipi(int cpu);
extern void arch_send_call_function_ipi(cpumask_t mask); extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
/* /*
* Local timer interrupt handling function (can be IPI'ed). * Local timer interrupt handling function (can be IPI'ed).
......
...@@ -326,14 +326,14 @@ void __init smp_prepare_boot_cpu(void) ...@@ -326,14 +326,14 @@ void __init smp_prepare_boot_cpu(void)
per_cpu(cpu_data, cpu).idle = current; per_cpu(cpu_data, cpu).idle = current;
} }
static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg) static void send_ipi_message(const struct cpumask *mask, enum ipi_msg_type msg)
{ {
unsigned long flags; unsigned long flags;
unsigned int cpu; unsigned int cpu;
local_irq_save(flags); local_irq_save(flags);
for_each_cpu_mask(cpu, callmap) { for_each_cpu(cpu, mask) {
struct ipi_data *ipi = &per_cpu(ipi_data, cpu); struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
spin_lock(&ipi->lock); spin_lock(&ipi->lock);
...@@ -344,19 +344,19 @@ static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg) ...@@ -344,19 +344,19 @@ static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg)
/* /*
* Call the platform specific cross-CPU call function. * Call the platform specific cross-CPU call function.
*/ */
smp_cross_call(callmap); smp_cross_call(mask);
local_irq_restore(flags); local_irq_restore(flags);
} }
void arch_send_call_function_ipi(cpumask_t mask) void arch_send_call_function_ipi_mask(const struct cpumask *mask)
{ {
send_ipi_message(mask, IPI_CALL_FUNC); send_ipi_message(mask, IPI_CALL_FUNC);
} }
void arch_send_call_function_single_ipi(int cpu) void arch_send_call_function_single_ipi(int cpu)
{ {
send_ipi_message(cpumask_of_cpu(cpu), IPI_CALL_FUNC_SINGLE); send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
} }
void show_ipi_list(struct seq_file *p) void show_ipi_list(struct seq_file *p)
...@@ -498,17 +498,10 @@ asmlinkage void __exception do_IPI(struct pt_regs *regs) ...@@ -498,17 +498,10 @@ asmlinkage void __exception do_IPI(struct pt_regs *regs)
void smp_send_reschedule(int cpu) void smp_send_reschedule(int cpu)
{ {
send_ipi_message(cpumask_of_cpu(cpu), IPI_RESCHEDULE); send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
} }
void smp_send_timer(void) void smp_timer_broadcast(const struct cpumask *mask)
{
cpumask_t mask = cpu_online_map;
cpu_clear(smp_processor_id(), mask);
send_ipi_message(mask, IPI_TIMER);
}
void smp_timer_broadcast(cpumask_t mask)
{ {
send_ipi_message(mask, IPI_TIMER); send_ipi_message(mask, IPI_TIMER);
} }
...@@ -517,7 +510,7 @@ void smp_send_stop(void) ...@@ -517,7 +510,7 @@ void smp_send_stop(void)
{ {
cpumask_t mask = cpu_online_map; cpumask_t mask = cpu_online_map;
cpu_clear(smp_processor_id(), mask); cpu_clear(smp_processor_id(), mask);
send_ipi_message(mask, IPI_CPU_STOP); send_ipi_message(&mask, IPI_CPU_STOP);
} }
/* /*
...@@ -528,20 +521,17 @@ int setup_profiling_timer(unsigned int multiplier) ...@@ -528,20 +521,17 @@ int setup_profiling_timer(unsigned int multiplier)
return -EINVAL; return -EINVAL;
} }
static int static void
on_each_cpu_mask(void (*func)(void *), void *info, int wait, cpumask_t mask) on_each_cpu_mask(void (*func)(void *), void *info, int wait,
const struct cpumask *mask)
{ {
int ret = 0;
preempt_disable(); preempt_disable();
ret = smp_call_function_mask(mask, func, info, wait); smp_call_function_many(mask, func, info, wait);
if (cpu_isset(smp_processor_id(), mask)) if (cpumask_test_cpu(smp_processor_id(), mask))
func(info); func(info);
preempt_enable(); preempt_enable();
return ret;
} }
/**********************************************************************/ /**********************************************************************/
...@@ -602,20 +592,17 @@ void flush_tlb_all(void) ...@@ -602,20 +592,17 @@ void flush_tlb_all(void)
void flush_tlb_mm(struct mm_struct *mm) void flush_tlb_mm(struct mm_struct *mm)
{ {
cpumask_t mask = mm->cpu_vm_mask; on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, &mm->cpu_vm_mask);
on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, mask);
} }
void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
{ {
cpumask_t mask = vma->vm_mm->cpu_vm_mask;
struct tlb_args ta; struct tlb_args ta;
ta.ta_vma = vma; ta.ta_vma = vma;
ta.ta_start = uaddr; ta.ta_start = uaddr;
on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, mask); on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, &vma->vm_mm->cpu_vm_mask);
} }
void flush_tlb_kernel_page(unsigned long kaddr) void flush_tlb_kernel_page(unsigned long kaddr)
...@@ -630,14 +617,13 @@ void flush_tlb_kernel_page(unsigned long kaddr) ...@@ -630,14 +617,13 @@ void flush_tlb_kernel_page(unsigned long kaddr)
void flush_tlb_range(struct vm_area_struct *vma, void flush_tlb_range(struct vm_area_struct *vma,
unsigned long start, unsigned long end) unsigned long start, unsigned long end)
{ {
cpumask_t mask = vma->vm_mm->cpu_vm_mask;
struct tlb_args ta; struct tlb_args ta;
ta.ta_vma = vma; ta.ta_vma = vma;
ta.ta_start = start; ta.ta_start = start;
ta.ta_end = end; ta.ta_end = end;
on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, mask); on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, &vma->vm_mm->cpu_vm_mask);
} }
void flush_tlb_kernel_range(unsigned long start, unsigned long end) void flush_tlb_kernel_range(unsigned long start, unsigned long end)
......
...@@ -21,15 +21,50 @@ ...@@ -21,15 +21,50 @@
#include <asm/div64.h> #include <asm/div64.h>
#include <mach/hardware.h> #include <mach/hardware.h>
/*
* The EP93xx has two external crystal oscillators. To generate the
* required high-frequency clocks, the processor uses two phase-locked-
* loops (PLLs) to multiply the incoming external clock signal to much
* higher frequencies that are then divided down by programmable dividers
* to produce the needed clocks. The PLLs operate independently of one
* another.
*/
#define EP93XX_EXT_CLK_RATE 14745600
#define EP93XX_EXT_RTC_RATE 32768
struct clk { struct clk {
unsigned long rate; unsigned long rate;
int users; int users;
int sw_locked;
u32 enable_reg; u32 enable_reg;
u32 enable_mask; u32 enable_mask;
unsigned long (*get_rate)(struct clk *clk);
}; };
static struct clk clk_uart = {
.rate = 14745600, static unsigned long get_uart_rate(struct clk *clk);
static struct clk clk_uart1 = {
.sw_locked = 1,
.enable_reg = EP93XX_SYSCON_DEVICE_CONFIG,
.enable_mask = EP93XX_SYSCON_DEVICE_CONFIG_U1EN,
.get_rate = get_uart_rate,
};
static struct clk clk_uart2 = {
.sw_locked = 1,
.enable_reg = EP93XX_SYSCON_DEVICE_CONFIG,
.enable_mask = EP93XX_SYSCON_DEVICE_CONFIG_U2EN,
.get_rate = get_uart_rate,
};
static struct clk clk_uart3 = {
.sw_locked = 1,
.enable_reg = EP93XX_SYSCON_DEVICE_CONFIG,
.enable_mask = EP93XX_SYSCON_DEVICE_CONFIG_U3EN,
.get_rate = get_uart_rate,
}; };
static struct clk clk_pll1; static struct clk clk_pll1;
static struct clk clk_f; static struct clk clk_f;
...@@ -95,9 +130,9 @@ static struct clk clk_m2m1 = { ...@@ -95,9 +130,9 @@ static struct clk clk_m2m1 = {
{ .dev_id = dev, .con_id = con, .clk = ck } { .dev_id = dev, .con_id = con, .clk = ck }
static struct clk_lookup clocks[] = { static struct clk_lookup clocks[] = {
INIT_CK("apb:uart1", NULL, &clk_uart), INIT_CK("apb:uart1", NULL, &clk_uart1),
INIT_CK("apb:uart2", NULL, &clk_uart), INIT_CK("apb:uart2", NULL, &clk_uart2),
INIT_CK("apb:uart3", NULL, &clk_uart), INIT_CK("apb:uart3", NULL, &clk_uart3),
INIT_CK(NULL, "pll1", &clk_pll1), INIT_CK(NULL, "pll1", &clk_pll1),
INIT_CK(NULL, "fclk", &clk_f), INIT_CK(NULL, "fclk", &clk_f),
INIT_CK(NULL, "hclk", &clk_h), INIT_CK(NULL, "hclk", &clk_h),
...@@ -125,6 +160,8 @@ int clk_enable(struct clk *clk) ...@@ -125,6 +160,8 @@ int clk_enable(struct clk *clk)
u32 value; u32 value;
value = __raw_readl(clk->enable_reg); value = __raw_readl(clk->enable_reg);
if (clk->sw_locked)
__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
__raw_writel(value | clk->enable_mask, clk->enable_reg); __raw_writel(value | clk->enable_mask, clk->enable_reg);
} }
...@@ -138,13 +175,29 @@ void clk_disable(struct clk *clk) ...@@ -138,13 +175,29 @@ void clk_disable(struct clk *clk)
u32 value; u32 value;
value = __raw_readl(clk->enable_reg); value = __raw_readl(clk->enable_reg);
if (clk->sw_locked)
__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
__raw_writel(value & ~clk->enable_mask, clk->enable_reg); __raw_writel(value & ~clk->enable_mask, clk->enable_reg);
} }
} }
EXPORT_SYMBOL(clk_disable); EXPORT_SYMBOL(clk_disable);
static unsigned long get_uart_rate(struct clk *clk)
{
u32 value;
value = __raw_readl(EP93XX_SYSCON_CLOCK_CONTROL);
if (value & EP93XX_SYSCON_CLOCK_UARTBAUD)
return EP93XX_EXT_CLK_RATE;
else
return EP93XX_EXT_CLK_RATE / 2;
}
unsigned long clk_get_rate(struct clk *clk) unsigned long clk_get_rate(struct clk *clk)
{ {
if (clk->get_rate)
return clk->get_rate(clk);
return clk->rate; return clk->rate;
} }
EXPORT_SYMBOL(clk_get_rate); EXPORT_SYMBOL(clk_get_rate);
...@@ -162,7 +215,7 @@ static unsigned long calc_pll_rate(u32 config_word) ...@@ -162,7 +215,7 @@ static unsigned long calc_pll_rate(u32 config_word)
unsigned long long rate; unsigned long long rate;
int i; int i;
rate = 14745600; rate = EP93XX_EXT_CLK_RATE;
rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */ rate *= ((config_word >> 11) & 0x1f) + 1; /* X1FBD */
rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */ rate *= ((config_word >> 5) & 0x3f) + 1; /* X2FBD */
do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */ do_div(rate, (config_word & 0x1f) + 1); /* X2IPD */
...@@ -195,7 +248,7 @@ static int __init ep93xx_clock_init(void) ...@@ -195,7 +248,7 @@ static int __init ep93xx_clock_init(void)
value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1); value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
if (!(value & 0x00800000)) { /* PLL1 bypassed? */ if (!(value & 0x00800000)) { /* PLL1 bypassed? */
clk_pll1.rate = 14745600; clk_pll1.rate = EP93XX_EXT_CLK_RATE;
} else { } else {
clk_pll1.rate = calc_pll_rate(value); clk_pll1.rate = calc_pll_rate(value);
} }
...@@ -206,7 +259,7 @@ static int __init ep93xx_clock_init(void) ...@@ -206,7 +259,7 @@ static int __init ep93xx_clock_init(void)
value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2); value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2);
if (!(value & 0x00080000)) { /* PLL2 bypassed? */ if (!(value & 0x00080000)) { /* PLL2 bypassed? */
clk_pll2.rate = 14745600; clk_pll2.rate = EP93XX_EXT_CLK_RATE;
} else if (value & 0x00040000) { /* PLL2 enabled? */ } else if (value & 0x00040000) { /* PLL2 enabled? */
clk_pll2.rate = calc_pll_rate(value); clk_pll2.rate = calc_pll_rate(value);
} else { } else {
......
...@@ -159,7 +159,10 @@ ...@@ -159,7 +159,10 @@
#define EP93XX_SYSCON_CLOCK_SET1 EP93XX_SYSCON_REG(0x20) #define EP93XX_SYSCON_CLOCK_SET1 EP93XX_SYSCON_REG(0x20)
#define EP93XX_SYSCON_CLOCK_SET2 EP93XX_SYSCON_REG(0x24) #define EP93XX_SYSCON_CLOCK_SET2 EP93XX_SYSCON_REG(0x24)
#define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80) #define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80)
#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE 0x00800000 #define EP93XX_SYSCON_DEVICE_CONFIG_U3EN (1<<24)
#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE (1<<23)
#define EP93XX_SYSCON_DEVICE_CONFIG_U2EN (1<<20)
#define EP93XX_SYSCON_DEVICE_CONFIG_U1EN (1<<18)
#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) #define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
#define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000) #define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000)
......
...@@ -121,7 +121,7 @@ static struct clk uartclk = { ...@@ -121,7 +121,7 @@ static struct clk uartclk = {
.rate = 14745600, .rate = 14745600,
}; };
static struct clk_lookup lookups[] __initdata = { static struct clk_lookup lookups[] = {
{ /* UART0 */ { /* UART0 */
.dev_id = "mb:16", .dev_id = "mb:16",
.clk = &uartclk, .clk = &uartclk,
......
...@@ -18,7 +18,7 @@ ...@@ -18,7 +18,7 @@
/* IO_START and IO_BASE are defined in hardware.h */ /* IO_START and IO_BASE are defined in hardware.h */
#define SYS_CLOCK_START (IO_START + SYS_CLCOK_OFF) /* Physical address */ #define SYS_CLOCK_START (IO_START + SYS_CLOCK_OFF) /* Physical address */
#define SYS_CLOCK_BASE (IO_BASE + SYS_CLOCK_OFF) /* Virtual address */ #define SYS_CLOCK_BASE (IO_BASE + SYS_CLOCK_OFF) /* Virtual address */
/* Define the interface to the SYS_CLOCK */ /* Define the interface to the SYS_CLOCK */
......
...@@ -103,10 +103,10 @@ static struct omap_clk omap24xx_clks[] = { ...@@ -103,10 +103,10 @@ static struct omap_clk omap24xx_clks[] = {
CLK(NULL, "mdm_ick", &mdm_ick, CK_243X), CLK(NULL, "mdm_ick", &mdm_ick, CK_243X),
CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X), CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X),
/* DSS domain clocks */ /* DSS domain clocks */
CLK(NULL, "dss_ick", &dss_ick, CK_243X | CK_242X), CLK("omapfb", "ick", &dss_ick, CK_243X | CK_242X),
CLK(NULL, "dss1_fck", &dss1_fck, CK_243X | CK_242X), CLK("omapfb", "dss1_fck", &dss1_fck, CK_243X | CK_242X),
CLK(NULL, "dss2_fck", &dss2_fck, CK_243X | CK_242X), CLK("omapfb", "dss2_fck", &dss2_fck, CK_243X | CK_242X),
CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_243X | CK_242X), CLK("omapfb", "tv_fck", &dss_54m_fck, CK_243X | CK_242X),
/* L3 domain clocks */ /* L3 domain clocks */
CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X), CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X),
CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X), CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X),
...@@ -206,7 +206,7 @@ static struct omap_clk omap24xx_clks[] = { ...@@ -206,7 +206,7 @@ static struct omap_clk omap24xx_clks[] = {
CLK(NULL, "aes_ick", &aes_ick, CK_243X | CK_242X), CLK(NULL, "aes_ick", &aes_ick, CK_243X | CK_242X),
CLK(NULL, "pka_ick", &pka_ick, CK_243X | CK_242X), CLK(NULL, "pka_ick", &pka_ick, CK_243X | CK_242X),
CLK(NULL, "usb_fck", &usb_fck, CK_243X | CK_242X), CLK(NULL, "usb_fck", &usb_fck, CK_243X | CK_242X),
CLK(NULL, "usbhs_ick", &usbhs_ick, CK_243X), CLK("musb_hdrc", "ick", &usbhs_ick, CK_243X),
CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_243X), CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_243X),
CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_243X), CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_243X),
CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_243X), CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_243X),
......
...@@ -157,7 +157,7 @@ static struct omap_clk omap34xx_clks[] = { ...@@ -157,7 +157,7 @@ static struct omap_clk omap34xx_clks[] = {
CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck, CK_343X), CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck, CK_343X),
CLK(NULL, "ssi_sst_fck", &ssi_sst_fck, CK_343X), CLK(NULL, "ssi_sst_fck", &ssi_sst_fck, CK_343X),
CLK(NULL, "core_l3_ick", &core_l3_ick, CK_343X), CLK(NULL, "core_l3_ick", &core_l3_ick, CK_343X),
CLK(NULL, "hsotgusb_ick", &hsotgusb_ick, CK_343X), CLK("musb_hdrc", "ick", &hsotgusb_ick, CK_343X),
CLK(NULL, "sdrc_ick", &sdrc_ick, CK_343X), CLK(NULL, "sdrc_ick", &sdrc_ick, CK_343X),
CLK(NULL, "gpmc_fck", &gpmc_fck, CK_343X), CLK(NULL, "gpmc_fck", &gpmc_fck, CK_343X),
CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X), CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X),
...@@ -197,11 +197,11 @@ static struct omap_clk omap34xx_clks[] = { ...@@ -197,11 +197,11 @@ static struct omap_clk omap34xx_clks[] = {
CLK("omap_rng", "ick", &rng_ick, CK_343X), CLK("omap_rng", "ick", &rng_ick, CK_343X),
CLK(NULL, "sha11_ick", &sha11_ick, CK_343X), CLK(NULL, "sha11_ick", &sha11_ick, CK_343X),
CLK(NULL, "des1_ick", &des1_ick, CK_343X), CLK(NULL, "des1_ick", &des1_ick, CK_343X),
CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck, CK_343X), CLK("omapfb", "dss1_fck", &dss1_alwon_fck, CK_343X),
CLK(NULL, "dss_tv_fck", &dss_tv_fck, CK_343X), CLK("omapfb", "tv_fck", &dss_tv_fck, CK_343X),
CLK(NULL, "dss_96m_fck", &dss_96m_fck, CK_343X), CLK("omapfb", "video_fck", &dss_96m_fck, CK_343X),
CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck, CK_343X), CLK("omapfb", "dss2_fck", &dss2_alwon_fck, CK_343X),
CLK(NULL, "dss_ick", &dss_ick, CK_343X), CLK("omapfb", "ick", &dss_ick, CK_343X),
CLK(NULL, "cam_mclk", &cam_mclk, CK_343X), CLK(NULL, "cam_mclk", &cam_mclk, CK_343X),
CLK(NULL, "cam_ick", &cam_ick, CK_343X), CLK(NULL, "cam_ick", &cam_ick, CK_343X),
CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X), CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X),
......
...@@ -2182,7 +2182,7 @@ static struct clk wkup_32k_fck = { ...@@ -2182,7 +2182,7 @@ static struct clk wkup_32k_fck = {
static struct clk gpio1_dbck = { static struct clk gpio1_dbck = {
.name = "gpio1_dbck", .name = "gpio1_dbck",
.ops = &clkops_omap2_dflt_wait, .ops = &clkops_omap2_dflt,
.parent = &wkup_32k_fck, .parent = &wkup_32k_fck,
.enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO1_SHIFT, .enable_bit = OMAP3430_EN_GPIO1_SHIFT,
...@@ -2427,7 +2427,7 @@ static struct clk per_32k_alwon_fck = { ...@@ -2427,7 +2427,7 @@ static struct clk per_32k_alwon_fck = {
static struct clk gpio6_dbck = { static struct clk gpio6_dbck = {
.name = "gpio6_dbck", .name = "gpio6_dbck",
.ops = &clkops_omap2_dflt_wait, .ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO6_SHIFT, .enable_bit = OMAP3430_EN_GPIO6_SHIFT,
...@@ -2437,7 +2437,7 @@ static struct clk gpio6_dbck = { ...@@ -2437,7 +2437,7 @@ static struct clk gpio6_dbck = {
static struct clk gpio5_dbck = { static struct clk gpio5_dbck = {
.name = "gpio5_dbck", .name = "gpio5_dbck",
.ops = &clkops_omap2_dflt_wait, .ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO5_SHIFT, .enable_bit = OMAP3430_EN_GPIO5_SHIFT,
...@@ -2447,7 +2447,7 @@ static struct clk gpio5_dbck = { ...@@ -2447,7 +2447,7 @@ static struct clk gpio5_dbck = {
static struct clk gpio4_dbck = { static struct clk gpio4_dbck = {
.name = "gpio4_dbck", .name = "gpio4_dbck",
.ops = &clkops_omap2_dflt_wait, .ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO4_SHIFT, .enable_bit = OMAP3430_EN_GPIO4_SHIFT,
...@@ -2457,7 +2457,7 @@ static struct clk gpio4_dbck = { ...@@ -2457,7 +2457,7 @@ static struct clk gpio4_dbck = {
static struct clk gpio3_dbck = { static struct clk gpio3_dbck = {
.name = "gpio3_dbck", .name = "gpio3_dbck",
.ops = &clkops_omap2_dflt_wait, .ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO3_SHIFT, .enable_bit = OMAP3430_EN_GPIO3_SHIFT,
...@@ -2467,7 +2467,7 @@ static struct clk gpio3_dbck = { ...@@ -2467,7 +2467,7 @@ static struct clk gpio3_dbck = {
static struct clk gpio2_dbck = { static struct clk gpio2_dbck = {
.name = "gpio2_dbck", .name = "gpio2_dbck",
.ops = &clkops_omap2_dflt_wait, .ops = &clkops_omap2_dflt,
.parent = &per_32k_alwon_fck, .parent = &per_32k_alwon_fck,
.enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
.enable_bit = OMAP3430_EN_GPIO2_SHIFT, .enable_bit = OMAP3430_EN_GPIO2_SHIFT,
......
...@@ -354,9 +354,11 @@ static void omap_init_mcspi(void) ...@@ -354,9 +354,11 @@ static void omap_init_mcspi(void)
platform_device_register(&omap2_mcspi1); platform_device_register(&omap2_mcspi1);
platform_device_register(&omap2_mcspi2); platform_device_register(&omap2_mcspi2);
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
if (cpu_is_omap2430() || cpu_is_omap343x())
platform_device_register(&omap2_mcspi3); platform_device_register(&omap2_mcspi3);
#endif #endif
#ifdef CONFIG_ARCH_OMAP3 #ifdef CONFIG_ARCH_OMAP3
if (cpu_is_omap343x())
platform_device_register(&omap2_mcspi4); platform_device_register(&omap2_mcspi4);
#endif #endif
} }
......
...@@ -409,7 +409,7 @@ ...@@ -409,7 +409,7 @@
/* PM_PREPWSTST_CAM specific bits */ /* PM_PREPWSTST_CAM specific bits */
/* PM_PWSTCTRL_USBHOST specific bits */ /* PM_PWSTCTRL_USBHOST specific bits */
#define OMAP3430ES2_SAVEANDRESTORE_SHIFT (1 << 4) #define OMAP3430ES2_SAVEANDRESTORE_SHIFT 4
/* RM_RSTST_PER specific bits */ /* RM_RSTST_PER specific bits */
......
...@@ -187,7 +187,7 @@ int tusb6010_platform_retime(unsigned is_refclk) ...@@ -187,7 +187,7 @@ int tusb6010_platform_retime(unsigned is_refclk)
unsigned sysclk_ps; unsigned sysclk_ps;
int status; int status;
if (!refclk_psec || sysclk_ps == 0) if (!refclk_psec || fclk_ps == 0)
return -ENODEV; return -ENODEV;
sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60; sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;
......
...@@ -46,6 +46,7 @@ ...@@ -46,6 +46,7 @@
#include <mach/audio.h> #include <mach/audio.h>
#include <mach/pxafb.h> #include <mach/pxafb.h>
#include <mach/i2c.h> #include <mach/i2c.h>
#include <mach/regs-uart.h>
#include <mach/viper.h> #include <mach/viper.h>
#include <asm/setup.h> #include <asm/setup.h>
......
...@@ -750,14 +750,6 @@ void __init realview_timer_init(unsigned int timer_irq) ...@@ -750,14 +750,6 @@ void __init realview_timer_init(unsigned int timer_irq)
{ {
u32 val; u32 val;
#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
/*
* The dummy clock device has to be registered before the main device
* so that the latter will broadcast the clock events
*/
local_timer_setup();
#endif
/* /*
* set clock frequency: * set clock frequency:
* REALVIEW_REFCLK is 32KHz * REALVIEW_REFCLK is 32KHz
......
...@@ -15,16 +15,9 @@ ...@@ -15,16 +15,9 @@
/* /*
* We use IRQ1 as the IPI * We use IRQ1 as the IPI
*/ */
static inline void smp_cross_call(cpumask_t callmap) static inline void smp_cross_call(const struct cpumask *mask)
{
gic_raise_softirq(callmap, 1);
}
/*
* Do nothing on MPcore.
*/
static inline void smp_cross_call_done(cpumask_t callmap)
{ {
gic_raise_softirq(mask, 1);
} }
#endif #endif
...@@ -189,8 +189,10 @@ void __cpuinit local_timer_setup(void) ...@@ -189,8 +189,10 @@ void __cpuinit local_timer_setup(void)
struct clock_event_device *clk = &per_cpu(local_clockevent, cpu); struct clock_event_device *clk = &per_cpu(local_clockevent, cpu);
clk->name = "dummy_timer"; clk->name = "dummy_timer";
clk->features = CLOCK_EVT_FEAT_DUMMY; clk->features = CLOCK_EVT_FEAT_ONESHOT |
clk->rating = 200; CLOCK_EVT_FEAT_PERIODIC |
CLOCK_EVT_FEAT_DUMMY;
clk->rating = 400;
clk->mult = 1; clk->mult = 1;
clk->set_mode = dummy_timer_set_mode; clk->set_mode = dummy_timer_set_mode;
clk->broadcast = smp_timer_broadcast; clk->broadcast = smp_timer_broadcast;
......
...@@ -77,13 +77,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu) ...@@ -77,13 +77,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
{ {
trace_hardirqs_off(); trace_hardirqs_off();
/*
* the primary core may have used a "cross call" soft interrupt
* to get this processor out of WFI in the BootMonitor - make
* sure that we are no longer being sent this soft interrupt
*/
smp_cross_call_done(cpumask_of_cpu(cpu));
/* /*
* if any interrupts are already enabled for the primary * if any interrupts are already enabled for the primary
* core (e.g. timer irq), then they will not have been enabled * core (e.g. timer irq), then they will not have been enabled
...@@ -136,7 +129,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) ...@@ -136,7 +129,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
* Use smp_cross_call() for this, since there's little * Use smp_cross_call() for this, since there's little
* point duplicating the code here * point duplicating the code here
*/ */
smp_cross_call(cpumask_of_cpu(cpu)); smp_cross_call(cpumask_of(cpu));
timeout = jiffies + (1 * HZ); timeout = jiffies + (1 * HZ);
while (time_before(jiffies, timeout)) { while (time_before(jiffies, timeout)) {
...@@ -224,11 +217,9 @@ void __init smp_prepare_cpus(unsigned int max_cpus) ...@@ -224,11 +217,9 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
if (max_cpus > ncores) if (max_cpus > ncores)
max_cpus = ncores; max_cpus = ncores;
#ifdef CONFIG_LOCAL_TIMERS #if defined(CONFIG_LOCAL_TIMERS) || defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)
/* /*
* Enable the local timer for primary CPU. If the device is * Enable the local timer or broadcast device for the boot CPU.
* dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
* realview_timer_init
*/ */
local_timer_setup(); local_timer_setup();
#endif #endif
......
...@@ -588,8 +588,6 @@ static void __init bast_map_io(void) ...@@ -588,8 +588,6 @@ static void __init bast_map_io(void)
s3c_device_nand.dev.platform_data = &bast_nand_info; s3c_device_nand.dev.platform_data = &bast_nand_info;
s3c_i2c0_set_platdata(&bast_i2c_info);
s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
s3c24xx_init_clocks(0); s3c24xx_init_clocks(0);
s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs)); s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs));
...@@ -602,6 +600,7 @@ static void __init bast_init(void) ...@@ -602,6 +600,7 @@ static void __init bast_init(void)
sysdev_class_register(&bast_pm_sysclass); sysdev_class_register(&bast_pm_sysclass);
sysdev_register(&bast_pm_sysdev); sysdev_register(&bast_pm_sysdev);
s3c_i2c0_set_platdata(&bast_i2c_info);
s3c24xx_fb_set_platdata(&bast_fb_info); s3c24xx_fb_set_platdata(&bast_fb_info);
platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices)); platform_add_devices(bast_devices, ARRAY_SIZE(bast_devices));
......
...@@ -413,7 +413,7 @@ static struct clk ref24_clk = { ...@@ -413,7 +413,7 @@ static struct clk ref24_clk = {
.rate = 24000000, .rate = 24000000,
}; };
static struct clk_lookup lookups[] __initdata = { static struct clk_lookup lookups[] = {
{ /* UART0 */ { /* UART0 */
.dev_id = "dev:f1", .dev_id = "dev:f1",
.clk = &ref24_clk, .clk = &ref24_clk,
......
...@@ -114,4 +114,8 @@ extern unsigned int SingleCPDO(struct roundingData *roundData, ...@@ -114,4 +114,8 @@ extern unsigned int SingleCPDO(struct roundingData *roundData,
extern unsigned int DoubleCPDO(struct roundingData *roundData, extern unsigned int DoubleCPDO(struct roundingData *roundData,
const unsigned int opcode, FPREG * rFd); const unsigned int opcode, FPREG * rFd);
/* extneded_cpdo.c */
extern unsigned int ExtendedCPDO(struct roundingData *roundData,
const unsigned int opcode, FPREG * rFd);
#endif #endif
...@@ -27,10 +27,6 @@ ...@@ -27,10 +27,6 @@
#include "fpmodule.inl" #include "fpmodule.inl"
#include "softfloat.h" #include "softfloat.h"
#ifdef CONFIG_FPE_NWFPE_XP
extern flag floatx80_is_nan(floatx80);
#endif
unsigned int PerformFLT(const unsigned int opcode); unsigned int PerformFLT(const unsigned int opcode);
unsigned int PerformFIX(const unsigned int opcode); unsigned int PerformFIX(const unsigned int opcode);
......
...@@ -226,6 +226,8 @@ char floatx80_le_quiet( floatx80, floatx80 ); ...@@ -226,6 +226,8 @@ char floatx80_le_quiet( floatx80, floatx80 );
char floatx80_lt_quiet( floatx80, floatx80 ); char floatx80_lt_quiet( floatx80, floatx80 );
char floatx80_is_signaling_nan( floatx80 ); char floatx80_is_signaling_nan( floatx80 );
extern flag floatx80_is_nan(floatx80);
#endif #endif
static inline flag extractFloat32Sign(float32 a) static inline flag extractFloat32Sign(float32 a)
......
...@@ -206,9 +206,10 @@ void __init omapfb_reserve_sdram(void) ...@@ -206,9 +206,10 @@ void __init omapfb_reserve_sdram(void)
config_invalid = 1; config_invalid = 1;
return; return;
} }
if (rg.paddr) if (rg.paddr) {
reserve_bootmem(rg.paddr, rg.size, BOOTMEM_DEFAULT); reserve_bootmem(rg.paddr, rg.size, BOOTMEM_DEFAULT);
reserved += rg.size; reserved += rg.size;
}
omapfb_config.mem_desc.region[i] = rg; omapfb_config.mem_desc.region[i] = rg;
configured_regions++; configured_regions++;
} }
......
...@@ -307,7 +307,7 @@ static inline int gpio_valid(int gpio) ...@@ -307,7 +307,7 @@ static inline int gpio_valid(int gpio)
return 0; return 0;
if (cpu_is_omap24xx() && gpio < 128) if (cpu_is_omap24xx() && gpio < 128)
return 0; return 0;
if (cpu_is_omap34xx() && gpio < 160) if (cpu_is_omap34xx() && gpio < 192)
return 0; return 0;
return -1; return -1;
} }
......
...@@ -306,8 +306,6 @@ struct clk s3c24xx_uclk = { ...@@ -306,8 +306,6 @@ struct clk s3c24xx_uclk = {
int s3c24xx_register_clock(struct clk *clk) int s3c24xx_register_clock(struct clk *clk)
{ {
clk->owner = THIS_MODULE;
if (clk->enable == NULL) if (clk->enable == NULL)
clk->enable = clk_null_enable; clk->enable = clk_null_enable;
......
...@@ -1235,7 +1235,7 @@ int s3c2410_dma_getposition(unsigned int channel, dma_addr_t *src, dma_addr_t *d ...@@ -1235,7 +1235,7 @@ int s3c2410_dma_getposition(unsigned int channel, dma_addr_t *src, dma_addr_t *d
EXPORT_SYMBOL(s3c2410_dma_getposition); EXPORT_SYMBOL(s3c2410_dma_getposition);
static struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev) static inline struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev)
{ {
return container_of(dev, struct s3c2410_dma_chan, dev); return container_of(dev, struct s3c2410_dma_chan, dev);
} }
......
...@@ -57,7 +57,7 @@ ...@@ -57,7 +57,7 @@
#if 1 #if 1
#define gpio_dbg(x...) do { } while(0) #define gpio_dbg(x...) do { } while(0)
#else #else
#define gpio_dbg(x...) printk(KERN_DEBUG ## x) #define gpio_dbg(x...) printk(KERN_DEBUG x)
#endif #endif
/* The s3c64xx_gpiolib_4bit routines are to control the gpio banks where /* The s3c64xx_gpiolib_4bit routines are to control the gpio banks where
......
...@@ -61,14 +61,14 @@ ...@@ -61,14 +61,14 @@
#define S3C64XX_GPH7_ADDR_CF1 (0x06 << 28) #define S3C64XX_GPH7_ADDR_CF1 (0x06 << 28)
#define S3C64XX_GPH7_EINT_G6_7 (0x07 << 28) #define S3C64XX_GPH7_EINT_G6_7 (0x07 << 28)
#define S3C64XX_GPH8_MMC1_DATA6 (0x02 << 32) #define S3C64XX_GPH8_MMC1_DATA6 (0x02 << 0)
#define S3C64XX_GPH8_MMC2_DATA2 (0x03 << 32) #define S3C64XX_GPH8_MMC2_DATA2 (0x03 << 0)
#define S3C64XX_GPH8_I2S_V40_LRCLK (0x05 << 32) #define S3C64XX_GPH8_I2S_V40_LRCLK (0x05 << 0)
#define S3C64XX_GPH8_ADDR_CF2 (0x06 << 32) #define S3C64XX_GPH8_ADDR_CF2 (0x06 << 0)
#define S3C64XX_GPH8_EINT_G6_8 (0x07 << 32) #define S3C64XX_GPH8_EINT_G6_8 (0x07 << 0)
#define S3C64XX_GPH9_MMC1_DATA7 (0x02 << 36)
#define S3C64XX_GPH9_MMC2_DATA3 (0x03 << 36)
#define S3C64XX_GPH9_I2S_V40_DI (0x05 << 36)
#define S3C64XX_GPH9_EINT_G6_9 (0x07 << 36)
#define S3C64XX_GPH9_OUTPUT (0x01 << 4)
#define S3C64XX_GPH9_MMC1_DATA7 (0x02 << 4)
#define S3C64XX_GPH9_MMC2_DATA3 (0x03 << 4)
#define S3C64XX_GPH9_I2S_V40_DI (0x05 << 4)
#define S3C64XX_GPH9_EINT_G6_9 (0x07 << 4)
...@@ -107,7 +107,7 @@ static void amba_kmi_close(struct serio *io) ...@@ -107,7 +107,7 @@ static void amba_kmi_close(struct serio *io)
clk_disable(kmi->clk); clk_disable(kmi->clk);
} }
static int amba_kmi_probe(struct amba_device *dev, void *id) static int amba_kmi_probe(struct amba_device *dev, struct amba_id *id)
{ {
struct amba_kmi_port *kmi; struct amba_kmi_port *kmi;
struct serio *io; struct serio *io;
......
...@@ -490,7 +490,7 @@ static void mmci_check_status(unsigned long data) ...@@ -490,7 +490,7 @@ static void mmci_check_status(unsigned long data)
mod_timer(&host->timer, jiffies + HZ); mod_timer(&host->timer, jiffies + HZ);
} }
static int __devinit mmci_probe(struct amba_device *dev, void *id) static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
{ {
struct mmc_platform_data *plat = dev->dev.platform_data; struct mmc_platform_data *plat = dev->dev.platform_data;
struct mmci_host *host; struct mmci_host *host;
......
...@@ -102,7 +102,7 @@ static const struct rtc_class_ops pl030_ops = { ...@@ -102,7 +102,7 @@ static const struct rtc_class_ops pl030_ops = {
.set_alarm = pl030_set_alarm, .set_alarm = pl030_set_alarm,
}; };
static int pl030_probe(struct amba_device *dev, void *id) static int pl030_probe(struct amba_device *dev, struct amba_id *id)
{ {
struct pl030_rtc *rtc; struct pl030_rtc *rtc;
int ret; int ret;
......
...@@ -127,7 +127,7 @@ static int pl031_remove(struct amba_device *adev) ...@@ -127,7 +127,7 @@ static int pl031_remove(struct amba_device *adev)
return 0; return 0;
} }
static int pl031_probe(struct amba_device *adev, void *id) static int pl031_probe(struct amba_device *adev, struct amba_id *id)
{ {
int ret; int ret;
struct pl031_local *ldata; struct pl031_local *ldata;
......
...@@ -665,7 +665,7 @@ static struct uart_driver amba_reg = { ...@@ -665,7 +665,7 @@ static struct uart_driver amba_reg = {
.cons = AMBA_CONSOLE, .cons = AMBA_CONSOLE,
}; };
static int pl010_probe(struct amba_device *dev, void *id) static int pl010_probe(struct amba_device *dev, struct amba_id *id)
{ {
struct uart_amba_port *uap; struct uart_amba_port *uap;
void __iomem *base; void __iomem *base;
......
...@@ -729,7 +729,7 @@ static struct uart_driver amba_reg = { ...@@ -729,7 +729,7 @@ static struct uart_driver amba_reg = {
.cons = AMBA_CONSOLE, .cons = AMBA_CONSOLE,
}; };
static int pl011_probe(struct amba_device *dev, void *id) static int pl011_probe(struct amba_device *dev, struct amba_id *id)
{ {
struct uart_amba_port *uap; struct uart_amba_port *uap;
void __iomem *base; void __iomem *base;
......
...@@ -437,7 +437,7 @@ static int clcdfb_register(struct clcd_fb *fb) ...@@ -437,7 +437,7 @@ static int clcdfb_register(struct clcd_fb *fb)
return ret; return ret;
} }
static int clcdfb_probe(struct amba_device *dev, void *id) static int clcdfb_probe(struct amba_device *dev, struct amba_id *id)
{ {
struct clcd_board *board = dev->dev.platform_data; struct clcd_board *board = dev->dev.platform_data;
struct clcd_fb *fb; struct clcd_fb *fb;
......
...@@ -880,20 +880,22 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *dev) ...@@ -880,20 +880,22 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *dev)
static int get_dss_clocks(void) static int get_dss_clocks(void)
{ {
if (IS_ERR((dispc.dss_ick = clk_get(dispc.fbdev->dev, "dss_ick")))) { dispc.dss_ick = clk_get(dispc.fbdev->dev, "ick");
dev_err(dispc.fbdev->dev, "can't get dss_ick\n"); if (IS_ERR(dispc.dss_ick)) {
dev_err(dispc.fbdev->dev, "can't get ick\n");
return PTR_ERR(dispc.dss_ick); return PTR_ERR(dispc.dss_ick);
} }
if (IS_ERR((dispc.dss1_fck = clk_get(dispc.fbdev->dev, "dss1_fck")))) { dispc.dss1_fck = clk_get(dispc.fbdev->dev, "dss1_fck");
if (IS_ERR(dispc.dss1_fck)) {
dev_err(dispc.fbdev->dev, "can't get dss1_fck\n"); dev_err(dispc.fbdev->dev, "can't get dss1_fck\n");
clk_put(dispc.dss_ick); clk_put(dispc.dss_ick);
return PTR_ERR(dispc.dss1_fck); return PTR_ERR(dispc.dss1_fck);
} }
if (IS_ERR((dispc.dss_54m_fck = dispc.dss_54m_fck = clk_get(dispc.fbdev->dev, "tv_fck");
clk_get(dispc.fbdev->dev, "dss_54m_fck")))) { if (IS_ERR(dispc.dss_54m_fck)) {
dev_err(dispc.fbdev->dev, "can't get dss_54m_fck\n"); dev_err(dispc.fbdev->dev, "can't get tv_fck\n");
clk_put(dispc.dss_ick); clk_put(dispc.dss_ick);
clk_put(dispc.dss1_fck); clk_put(dispc.dss1_fck);
return PTR_ERR(dispc.dss_54m_fck); return PTR_ERR(dispc.dss_54m_fck);
......
...@@ -83,12 +83,14 @@ static inline u32 rfbi_read_reg(int idx) ...@@ -83,12 +83,14 @@ static inline u32 rfbi_read_reg(int idx)
static int rfbi_get_clocks(void) static int rfbi_get_clocks(void)
{ {
if (IS_ERR((rfbi.dss_ick = clk_get(rfbi.fbdev->dev, "dss_ick")))) { rfbi.dss_ick = clk_get(rfbi.fbdev->dev, "ick");
dev_err(rfbi.fbdev->dev, "can't get dss_ick\n"); if (IS_ERR(rfbi.dss_ick)) {
dev_err(rfbi.fbdev->dev, "can't get ick\n");
return PTR_ERR(rfbi.dss_ick); return PTR_ERR(rfbi.dss_ick);
} }
if (IS_ERR((rfbi.dss1_fck = clk_get(rfbi.fbdev->dev, "dss1_fck")))) { rfbi.dss1_fck = clk_get(rfbi.fbdev->dev, "dss1_fck");
if (IS_ERR(rfbi.dss1_fck)) {
dev_err(rfbi.fbdev->dev, "can't get dss1_fck\n"); dev_err(rfbi.fbdev->dev, "can't get dss1_fck\n");
clk_put(rfbi.dss_ick); clk_put(rfbi.dss_ick);
return PTR_ERR(rfbi.dss1_fck); return PTR_ERR(rfbi.dss1_fck);
......
...@@ -28,7 +28,7 @@ struct amba_id { ...@@ -28,7 +28,7 @@ struct amba_id {
struct amba_driver { struct amba_driver {
struct device_driver drv; struct device_driver drv;
int (*probe)(struct amba_device *, void *); int (*probe)(struct amba_device *, struct amba_id *);
int (*remove)(struct amba_device *); int (*remove)(struct amba_device *);
void (*shutdown)(struct amba_device *); void (*shutdown)(struct amba_device *);
int (*suspend)(struct amba_device *, pm_message_t); int (*suspend)(struct amba_device *, pm_message_t);
......
...@@ -1097,6 +1097,32 @@ unsigned long __init node_memmap_size_bytes(int, unsigned long, unsigned long); ...@@ -1097,6 +1097,32 @@ unsigned long __init node_memmap_size_bytes(int, unsigned long, unsigned long);
#define pfn_valid_within(pfn) (1) #define pfn_valid_within(pfn) (1)
#endif #endif
#ifdef CONFIG_ARCH_HAS_HOLES_MEMORYMODEL
/*
* pfn_valid() is meant to be able to tell if a given PFN has valid memmap
* associated with it or not. In FLATMEM, it is expected that holes always
* have valid memmap as long as there is valid PFNs either side of the hole.
* In SPARSEMEM, it is assumed that a valid section has a memmap for the
* entire section.
*
* However, an ARM, and maybe other embedded architectures in the future
* free memmap backing holes to save memory on the assumption the memmap is
* never used. The page_zone linkages are then broken even though pfn_valid()
* returns true. A walker of the full memmap must then do this additional
* check to ensure the memmap they are looking at is sane by making sure
* the zone and PFN linkages are still valid. This is expensive, but walkers
* of the full memmap are extremely rare.
*/
int memmap_valid_within(unsigned long pfn,
struct page *page, struct zone *zone);
#else
static inline int memmap_valid_within(unsigned long pfn,
struct page *page, struct zone *zone)
{
return 1;
}
#endif /* CONFIG_ARCH_HAS_HOLES_MEMORYMODEL */
#endif /* !__GENERATING_BOUNDS.H */ #endif /* !__GENERATING_BOUNDS.H */
#endif /* !__ASSEMBLY__ */ #endif /* !__ASSEMBLY__ */
#endif /* _LINUX_MMZONE_H */ #endif /* _LINUX_MMZONE_H */
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
#include <linux/stddef.h> #include <linux/stddef.h>
#include <linux/mm.h>
#include <linux/mmzone.h> #include <linux/mmzone.h>
#include <linux/module.h> #include <linux/module.h>
...@@ -72,3 +73,17 @@ struct zoneref *next_zones_zonelist(struct zoneref *z, ...@@ -72,3 +73,17 @@ struct zoneref *next_zones_zonelist(struct zoneref *z,
*zone = zonelist_zone(z); *zone = zonelist_zone(z);
return z; return z;
} }
#ifdef CONFIG_ARCH_HAS_HOLES_MEMORYMODEL
int memmap_valid_within(unsigned long pfn,
struct page *page, struct zone *zone)
{
if (page_to_pfn(page) != pfn)
return 0;
if (page_zone(page) != zone)
return 0;
return 1;
}
#endif /* CONFIG_ARCH_HAS_HOLES_MEMORYMODEL */
...@@ -509,22 +509,11 @@ static void pagetypeinfo_showblockcount_print(struct seq_file *m, ...@@ -509,22 +509,11 @@ static void pagetypeinfo_showblockcount_print(struct seq_file *m,
continue; continue;
page = pfn_to_page(pfn); page = pfn_to_page(pfn);
#ifdef CONFIG_ARCH_FLATMEM_HAS_HOLES
/* /* Watch for unexpected holes punched in the memmap */
* Ordinarily, memory holes in flatmem still have a valid if (!memmap_valid_within(pfn, page, zone))
* memmap for the PFN range. However, an architecture for
* embedded systems (e.g. ARM) can free up the memmap backing
* holes to save memory on the assumption the memmap is
* never used. The page_zone linkages are then broken even
* though pfn_valid() returns true. Skip the page if the
* linkages are broken. Even if this test passed, the impact
* is that the counters for the movable type are off but
* fragmentation monitoring is likely meaningless on small
* systems.
*/
if (page_zone(page) != zone)
continue; continue;
#endif
mtype = get_pageblock_migratetype(page); mtype = get_pageblock_migratetype(page);
if (mtype < MIGRATE_TYPES) if (mtype < MIGRATE_TYPES)
......
...@@ -1074,7 +1074,7 @@ static unsigned int __devinit aaci_size_fifo(struct aaci *aaci) ...@@ -1074,7 +1074,7 @@ static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
return i; return i;
} }
static int __devinit aaci_probe(struct amba_device *dev, void *id) static int __devinit aaci_probe(struct amba_device *dev, struct amba_id *id)
{ {
struct aaci *aaci; struct aaci *aaci;
int ret, i; int ret, i;
......
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