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linux-davinci
Commit 99c537d1 authored by Tony Lindgren's avatar Tony Lindgren
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Merge source.mvista.com:/home/git/linux-omap-2.6

parents cfd483b1 d3c38d7d
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Showing with 503 additions and 264 deletions
arch/arm/mach-omap2/clock.h
View file @ 99c537d1
......@@ -1368,7 +1368,8 @@ static struct clk mcbsp5_fck = {
};
static struct clk mcspi1_ick = {
.name = "mcspi1_ick",
.name = "mcspi_ick",
.id = 1,
.parent = &l4_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
.enable_reg = (void __iomem *)&CM_ICLKEN1_CORE,
......@@ -1377,7 +1378,8 @@ static struct clk mcspi1_ick = {
};
static struct clk mcspi1_fck = {
.name = "mcspi1_fck",
.name = "mcspi_fck",
.id = 1,
.parent = &func_48m_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
.enable_reg = (void __iomem *)&CM_FCLKEN1_CORE,
......@@ -1386,7 +1388,8 @@ static struct clk mcspi1_fck = {
};
static struct clk mcspi2_ick = {
.name = "mcspi2_ick",
.name = "mcspi_ick",
.id = 2,
.parent = &l4_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
.enable_reg = (void __iomem *)&CM_ICLKEN1_CORE,
......@@ -1395,7 +1398,8 @@ static struct clk mcspi2_ick = {
};
static struct clk mcspi2_fck = {
.name = "mcspi2_fck",
.name = "mcspi_fck",
.id = 2,
.parent = &func_48m_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
.enable_reg = (void __iomem *)&CM_FCLKEN1_CORE,
......@@ -1404,7 +1408,8 @@ static struct clk mcspi2_fck = {
};
static struct clk mcspi3_ick = {
.name = "mcspi3_ick",
.name = "mcspi_ick",
.id = 3,
.parent = &l4_ck,
.flags = CLOCK_IN_OMAP243X,
.enable_reg = (void __iomem *)&CM_ICLKEN2_CORE,
......@@ -1413,7 +1418,8 @@ static struct clk mcspi3_ick = {
};
static struct clk mcspi3_fck = {
.name = "mcspi3_fck",
.name = "mcspi_fck",
.id = 3,
.parent = &func_48m_ck,
.flags = CLOCK_IN_OMAP243X,
.enable_reg = (void __iomem *)&CM_FCLKEN2_CORE,
......
drivers/i2c/chips/menelaus.c
View file @ 99c537d1
......@@ -145,70 +145,84 @@ struct menelaus_chip {
static struct menelaus_chip menelaus;
static void menelaus_write(u8 value, u8 reg)
static int menelaus_write_reg(int reg, u8 value)
{
if (i2c_smbus_write_byte_data(&menelaus.client, reg, value) < 0)
int val = i2c_smbus_write_byte_data(&menelaus.client, reg, value);
if (val < 0) {
pr_err("write error");
return val;
}
return 0;
}
static u8 menelaus_read(u8 reg)
static int menelaus_read_reg(int reg)
{
int val = i2c_smbus_read_byte_data(&menelaus.client, reg);
if (val < 0) {
if (val < 0)
pr_err("read error");
return 0;
}
return val;
}
static void menelaus_enable_irq(int irq)
static int menelaus_enable_irq(int irq)
{
if (irq > 7)
menelaus_write(menelaus_read(MENELAUS_INT_MASK2) &
~(1 << (irq - 8)), MENELAUS_INT_MASK2);
return menelaus_write_reg(MENELAUS_INT_MASK2,
menelaus_read_reg(MENELAUS_INT_MASK2)
& ~(1 << (irq - 8)));
else
menelaus_write(menelaus_read(MENELAUS_INT_MASK1) &
~(1 << irq), MENELAUS_INT_MASK1);
return menelaus_write_reg(MENELAUS_INT_MASK1,
menelaus_read_reg(MENELAUS_INT_MASK1)
& ~(1 << irq));
}
static void menelaus_disable_irq(int irq)
static int menelaus_disable_irq(int irq)
{
if (irq > 7)
menelaus_write(menelaus_read(MENELAUS_INT_MASK2)
| (1 << (irq - 8)), MENELAUS_INT_MASK2);
return menelaus_write_reg(menelaus_read_reg(MENELAUS_INT_MASK2)
| (1 << (irq - 8)),
MENELAUS_INT_MASK2);
else
menelaus_write(menelaus_read(MENELAUS_INT_MASK1)
| (1 << irq), MENELAUS_INT_MASK1);
return menelaus_write_reg(MENELAUS_INT_MASK1,
menelaus_read_reg(MENELAUS_INT_MASK1)
| (1 << irq));
}
static void menelaus_ack_irq(int irq)
static int menelaus_ack_irq(int irq)
{
if (irq > 7)
menelaus_write(1 << (irq - 8), MENELAUS_INT_ACK2);
return menelaus_write_reg(MENELAUS_INT_ACK2, 1 << (irq - 8));
else
menelaus_write(1 << irq, MENELAUS_INT_ACK1);
return menelaus_write_reg(MENELAUS_INT_ACK1, 1 << irq);
}
/* Adds a handler for an interrupt. Does not run in interrupt context */
static int menelaus_add_irq_work(int irq, void * handler)
{
int ret = 0;
mutex_lock(&menelaus.lock);
menelaus.handlers[irq] = handler;
menelaus_enable_irq(irq);
ret = menelaus_enable_irq(irq);
mutex_unlock(&menelaus.lock);
return 0;
return ret;
}
/* Removes handler for an interrupt */
static void menelaus_remove_irq_work(int irq)
static int menelaus_remove_irq_work(int irq)
{
int ret = 0;
mutex_lock(&menelaus.lock);
menelaus_disable_irq(irq);
ret = menelaus_disable_irq(irq);
menelaus.handlers[irq] = NULL;
mutex_unlock(&menelaus.lock);
return ret;
}
/*-----------------------------------------------------------------------*/
......@@ -217,16 +231,26 @@ static void menelaus_remove_irq_work(int irq)
* Toggles the MMC slots between open-drain and push-pull mode.
* We always set both slots the same way.
*/
void menelaus_mmc_opendrain(int enable)
int menelaus_mmc_opendrain(int enable)
{
unsigned char reg = menelaus_read(MENELAUS_MCT_CTRL1);
int reg, ret = 0;
mutex_lock(&menelaus.lock);
reg = menelaus_read_reg(MENELAUS_MCT_CTRL1);
if (reg < 0) {
mutex_unlock(&menelaus.lock);
return reg;
}
if (enable)
reg |= (0x3 << 2);
else
reg &= ~(0x3 << 2);
menelaus_write(reg, MENELAUS_MCT_CTRL1);
ret = menelaus_write_reg(MENELAUS_MCT_CTRL1, reg);
mutex_unlock(&menelaus.lock);
return ret;
}
EXPORT_SYMBOL(menelaus_mmc_opendrain);
......@@ -236,12 +260,14 @@ EXPORT_SYMBOL(menelaus_mmc_opendrain);
* in each slot. In this case the cards are not seen by menelaus.
* FIXME: Add handling for D1 too
*/
static int menelaus_mmc_cd_work(struct menelaus_chip *menelaus)
static int menelaus_mmc_cd_work(struct menelaus_chip * menelaus_hw)
{
unsigned char reg;
int reg;
unsigned char card_mask = 0;
reg = menelaus_read(MENELAUS_MCT_PIN_ST);
reg = menelaus_read_reg(MENELAUS_MCT_PIN_ST);
if (reg < 0)
return reg;
if (!(reg & 0x1))
card_mask |= (1 << 0);
......@@ -249,70 +275,221 @@ static int menelaus_mmc_cd_work(struct menelaus_chip *menelaus)
if (!(reg & 0x2))
card_mask |= (1 << 1);
if (menelaus->mmc_callback)
menelaus->mmc_callback(menelaus->mmc_callback_data, card_mask);
if (menelaus_hw->mmc_callback)
menelaus_hw->mmc_callback(menelaus_hw->mmc_callback_data,
card_mask);
return 0;
}
/* Initializes MMC slots */
void menelaus_mmc_register(void (*callback)(unsigned long data, u8 card_mask), unsigned long data)
int menelaus_mmc_register(void (*callback)(unsigned long data, u8 card_mask),
unsigned long data)
{
int reg;
int reg, ret = 0;
mutex_lock(&menelaus.lock);
/* DCDC3 to 3V */
reg = menelaus_read(MENELAUS_DCDC_CTRL1);
reg = menelaus_read_reg(MENELAUS_DCDC_CTRL1);
if (reg < 0)
goto err_out;
reg |= 0x6 << 4;
menelaus_write(reg, MENELAUS_DCDC_CTRL1);
ret = menelaus_write_reg(MENELAUS_DCDC_CTRL1, reg);
if (ret < 0)
goto err_out;
reg = menelaus_read(MENELAUS_DCDC_CTRL3);
reg = menelaus_read_reg(MENELAUS_DCDC_CTRL3);
if (reg < 0)
goto err_out;
reg |= 0x6;
menelaus_write(reg, MENELAUS_DCDC_CTRL3);
ret = menelaus_write_reg(MENELAUS_DCDC_CTRL3, reg);
if (ret < 0)
goto err_out;
/* Enable both slots, do not set auto shutdown */
reg = menelaus_read(MENELAUS_MCT_CTRL3);
reg = menelaus_read_reg(MENELAUS_MCT_CTRL3);
if (reg < 0)
goto err_out;
reg |= 0x3;
menelaus_write(reg, MENELAUS_MCT_CTRL3);
ret = menelaus_write_reg(MENELAUS_MCT_CTRL3, reg);
if (ret < 0)
goto err_out;
/* Enable card detect for both slots, slot 2 powered from DCDC3 */
reg = menelaus_read(MENELAUS_MCT_CTRL2);
reg = menelaus_read_reg(MENELAUS_MCT_CTRL2);
if (reg < 0)
goto err_out;
reg |= 0xf0;
menelaus_write(reg, MENELAUS_MCT_CTRL2);
ret = menelaus_write_reg(MENELAUS_MCT_CTRL2, reg);
if (ret < 0)
goto err_out;
/* Set both slots in open-drain mode, card detect normally closed */
reg = menelaus_read(MENELAUS_MCT_CTRL1);
reg = menelaus_read_reg(MENELAUS_MCT_CTRL1);
if (reg < 0)
goto err_out;
reg |= 0xfc;
menelaus_write(reg, MENELAUS_MCT_CTRL1);
ret = menelaus_write_reg(MENELAUS_MCT_CTRL1, reg);
if (ret < 0)
goto err_out;
/* Set MMC voltage */
reg = menelaus_read(MENELAUS_LDO_CTRL7);
reg = menelaus_read_reg(MENELAUS_LDO_CTRL7);
if (reg < 0)
goto err_out;
reg |= 0x03;
menelaus_write(reg, MENELAUS_LDO_CTRL7);
ret = menelaus_write_reg(MENELAUS_LDO_CTRL7, reg);
if (ret < 0)
goto err_out;
mutex_unlock(&menelaus.lock);
menelaus.mmc_callback_data = data;
menelaus.mmc_callback = callback;
menelaus_add_irq_work(MENELAUS_MMC_S1CD_IRQ, menelaus_mmc_cd_work);
menelaus_add_irq_work(MENELAUS_MMC_S2CD_IRQ, menelaus_mmc_cd_work);
menelaus_add_irq_work(MENELAUS_MMC_S1D1_IRQ, menelaus_mmc_cd_work);
menelaus_add_irq_work(MENELAUS_MMC_S2D1_IRQ, menelaus_mmc_cd_work);
ret = menelaus_add_irq_work(MENELAUS_MMC_S1CD_IRQ,
menelaus_mmc_cd_work);
if (ret < 0)
return ret;
ret = menelaus_add_irq_work(MENELAUS_MMC_S2CD_IRQ,
menelaus_mmc_cd_work);
if (ret < 0)
return ret;
ret = menelaus_add_irq_work(MENELAUS_MMC_S1D1_IRQ,
menelaus_mmc_cd_work);
if (ret < 0)
return ret;
ret = menelaus_add_irq_work(MENELAUS_MMC_S2D1_IRQ,
menelaus_mmc_cd_work);
if (ret < 0)
return ret;
return 0;
err_out:
mutex_unlock(&menelaus.lock);
if (ret < 0)
return ret;
return reg;
}
EXPORT_SYMBOL(menelaus_mmc_register);
void menelaus_mmc_remove(void)
int menelaus_mmc_remove(void)
{
menelaus_remove_irq_work(MENELAUS_MMC_S1CD_IRQ);
menelaus_remove_irq_work(MENELAUS_MMC_S2CD_IRQ);
menelaus_remove_irq_work(MENELAUS_MMC_S1D1_IRQ);
menelaus_remove_irq_work(MENELAUS_MMC_S2D1_IRQ);
int ret;
ret = menelaus_remove_irq_work(MENELAUS_MMC_S1CD_IRQ);
if (ret < 0)
return ret;
ret = menelaus_remove_irq_work(MENELAUS_MMC_S2CD_IRQ);
if (ret < 0)
return ret;
ret = menelaus_remove_irq_work(MENELAUS_MMC_S1D1_IRQ);
if (ret < 0)
return ret;
ret = menelaus_remove_irq_work(MENELAUS_MMC_S2D1_IRQ);
if (ret < 0)
return ret;
menelaus.mmc_callback = NULL;
menelaus.mmc_callback_data = 0;
return 0;
/* FIXME: Shutdown MMC components of Menelaus */
}
EXPORT_SYMBOL(menelaus_mmc_remove);
/*-----------------------------------------------------------------------*/
int menelaus_set_vmem(unsigned int mV)
{
int reg, ret;
if (!mV)
/* We turn it off here */
return menelaus_write_reg(MENELAUS_LDO_CTRL3, 0);
mutex_lock(&menelaus.lock);
reg = menelaus_read_reg(MENELAUS_LDO_CTRL1);
/* VMEM is on LDO_CTRL1, bits 0 and 1 */
reg &= 0xfffc;
switch(mV) {
case 1500:
break;
case 1800:
reg |= 0x1;
break;
case 2500:
reg |= 0x2;
break;
case 2800:
reg |= 0x3;
break;
default:
mutex_unlock(&menelaus.lock);
return -EINVAL;
}
ret = menelaus_write_reg(MENELAUS_LDO_CTRL1, reg);
if (ret == 0)
/* We turn it on */
ret = menelaus_write_reg(MENELAUS_LDO_CTRL3, 0x2);
mutex_unlock(&menelaus.lock);
return ret;
}
EXPORT_SYMBOL(menelaus_set_vmem);
int menelaus_set_vio(unsigned int mV)
{
int reg, ret;
if (!mV)
/* We turn it off here */
return menelaus_write_reg(MENELAUS_LDO_CTRL4, 0);
mutex_lock(&menelaus.lock);
reg = menelaus_read_reg(MENELAUS_LDO_CTRL1);
if (reg < 0) {
mutex_unlock(&menelaus.lock);
return reg;
}
/* VIO is on LDO_CTRL1, bits 2 and 3 */
reg &= 0xfff3;
switch(mV) {
case 1500:
break;
case 1800:
reg |= (0x1 << 2);
break;
case 2500:
reg |= (0x2 << 2);
break;
case 2800:
reg |= (0x3 << 2);
break;
default:
mutex_unlock(&menelaus.lock);
return -EINVAL;
}
ret = menelaus_write_reg(MENELAUS_LDO_CTRL1, reg);
if (ret == 0)
/* We turn it on */
ret = menelaus_write_reg(MENELAUS_LDO_CTRL4, 0x2);
mutex_unlock(&menelaus.lock);
return ret;
}
EXPORT_SYMBOL(menelaus_set_vio);
/*-----------------------------------------------------------------------*/
/* Handles Menelaus interrupts. Does not run in interrupt context */
......@@ -320,13 +497,13 @@ static void menelaus_work(void * _menelaus)
{
struct menelaus_chip *menelaus = _menelaus;
int (*handler)(struct menelaus_chip *menelaus);
while (1) {
int i;
unsigned char isr;
isr = menelaus_read(MENELAUS_INT_STATUS1) |
(menelaus_read(MENELAUS_INT_STATUS2) << 8);
isr = menelaus_read_reg(MENELAUS_INT_STATUS1) |
(menelaus_read_reg(MENELAUS_INT_STATUS2) << 8);
if (!isr)
break;
......@@ -385,7 +562,7 @@ static int menelaus_probe(struct i2c_adapter *adapter, int address, int kind)
}
/* If a true probe check the device */
if (kind < 0 && (rev = menelaus_read(MENELAUS_REV)) < 0) {
if (kind < 0 && (rev = menelaus_read_reg(MENELAUS_REV)) < 0) {
pr_err("device not found");
err = -ENODEV;
goto fail2;
......
drivers/media/video/omap/Makefile
View file @ 99c537d1
......@@ -3,9 +3,7 @@
obj-$(CONFIG_VIDEO_OMAP_CAMERA) += omapcamera.o
obj-$(CONFIG_VIDEO_CAMERA_SENSOR_OV9640) += sensor_ov9640.o
objs-yy := camera_core.o
objs-y$(CONFIG_ARCH_OMAP16XX) += omap16xxcam.o
objs-y$(CONFIG_ARCH_OMAP16XX) += omap16xxcam.o camera_core.o
objs-y$(CONFIG_MACH_OMAP_H3) += h3_sensor_power.o
objs-y$(CONFIG_MACH_OMAP_H4) += h4_sensor_power.o
......
drivers/media/video/omap/camera_core.c
View file @ 99c537d1
......@@ -52,7 +52,7 @@
#include "camera_core.h"
struct camera_device *camera_dev;
extern struct camera_sensor camera_sensor_if;
extern struct omap_camera_sensor camera_sensor_if;
extern struct camera_hardware camera_hardware_if;
static void camera_core_sgdma_process(struct camera_device *cam);
......@@ -324,7 +324,7 @@ static void
camera_core_vbq_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
{
videobuf_waiton(vb, 0, 0);
videobuf_dma_pci_unmap(NULL, &vb->dma);
videobuf_dma_unmap(q, &vb->dma);
videobuf_dma_free(&vb->dma);
vb->state = STATE_NEEDS_INIT;
......@@ -374,7 +374,7 @@ camera_core_vbq_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
spin_unlock(&cam->img_lock);
if (vb->state == STATE_NEEDS_INIT)
err = videobuf_iolock(NULL, vb, NULL);
err = videobuf_iolock(q, vb, NULL);
if (!err)
vb->state = STATE_PREPARED;
......@@ -1054,7 +1054,7 @@ static int __init camera_core_probe(struct platform_device *pdev)
cam->xclk = cam->cam_hardware->set_xclk(cam->xclk, cam->hardware_data);
/* initialize the sensor and define a default capture format cam->pix */
cam->sensor_data = cam->cam_sensor->init(&cam->pix, &cam->pix2);
cam->sensor_data = cam->cam_sensor->init(&cam->pix);
if (!cam->sensor_data) {
cam->cam_hardware->disable(cam->hardware_data);
printk(KERN_ERR CAM_NAME ": cannot initialize sensor\n");
......
drivers/media/video/omap/camera_core.h
View file @ 99c537d1
......@@ -90,7 +90,7 @@ struct camera_device {
unsigned long xclk;
/* Pointer to the sensor interface ops */
struct camera_sensor *cam_sensor;
struct omap_camera_sensor *cam_sensor;
void *sensor_data;
/* Pointer to the camera interface hardware ops */
......
drivers/media/video/omap/sensor_if.h
View file @ 99c537d1
/*
* drivers/media/video/omap/sensor_if.h
*
......@@ -18,12 +17,12 @@
#ifndef OMAP_SENSOR_IF_H
#define OMAP_SENSOR_IF_H
#define LEN_SENSOR_NAME 31
struct camera_sensor {
#define OMAP_SENSOR_NAME_LEN 31
struct omap_camera_sensor {
unsigned int version;
char name[LEN_SENSOR_NAME + 1];
char name[OMAP_SENSOR_NAME_LEN + 1];
void *(*init)(struct v4l2_pix_format *);
int (*cleanup)(void *);
......@@ -32,17 +31,17 @@ struct camera_sensor {
int (*power_off)(void *);
int (*enum_pixformat)(struct v4l2_fmtdesc *, void *);
int (*try_format) (struct v4l2_pix_format *, void *);
int (*try_format)(struct v4l2_pix_format *, void *);
unsigned long (*calc_xclk) (struct v4l2_pix_format *,
struct v4l2_fract *, void *);
unsigned long (*calc_xclk)(struct v4l2_pix_format *,
struct v4l2_fract *, void *);
int (*configure) (struct v4l2_pix_format *, unsigned long,
struct v4l2_fract *, void *);
int (*configure)(struct v4l2_pix_format *, unsigned long,
struct v4l2_fract *, void *);
int (*query_control) (struct v4l2_queryctrl *, void *);
int (*get_control) (struct v4l2_control *, void *);
int (*set_control) (struct v4l2_control *, void *);
int (*get_control)(struct v4l2_control *, void *);
int (*set_control)(struct v4l2_control *, void *);
};
......
drivers/media/video/omap/sensor_ov9640.c
View file @ 99c537d1
......@@ -1143,7 +1143,7 @@ static struct i2c_driver ov9640sensor_i2c_driver = {
* initialization is successful.
*/
static void *
ov9640sensor_init(struct v4l2_pix_format *pix, struct v4l2_pix_format *pix2)
ov9640sensor_init(struct v4l2_pix_format *pix)
{
struct ov9640_sensor *sensor = &ov9640;
int err;
......@@ -1177,7 +1177,7 @@ ov9640sensor_init(struct v4l2_pix_format *pix, struct v4l2_pix_format *pix2)
return (void *)sensor;
}
struct camera_sensor camera_sensor_if = {
struct omap_camera_sensor camera_sensor_if = {
.version = 0x01,
.name = "OV9640",
.parallel_mode = PAR_MODE_NOBT8,
......
drivers/mmc/omap.c
View file @ 99c537d1
......@@ -39,7 +39,57 @@
#include <asm/arch/fpga.h>
#include <asm/arch/tps65010.h>
#include "omap.h"
#define OMAP_MMC_REG_CMD 0x00
#define OMAP_MMC_REG_ARGL 0x04
#define OMAP_MMC_REG_ARGH 0x08
#define OMAP_MMC_REG_CON 0x0c
#define OMAP_MMC_REG_STAT 0x10
#define OMAP_MMC_REG_IE 0x14
#define OMAP_MMC_REG_CTO 0x18
#define OMAP_MMC_REG_DTO 0x1c
#define OMAP_MMC_REG_DATA 0x20
#define OMAP_MMC_REG_BLEN 0x24
#define OMAP_MMC_REG_NBLK 0x28
#define OMAP_MMC_REG_BUF 0x2c
#define OMAP_MMC_REG_SDIO 0x34
#define OMAP_MMC_REG_REV 0x3c
#define OMAP_MMC_REG_RSP0 0x40
#define OMAP_MMC_REG_RSP1 0x44
#define OMAP_MMC_REG_RSP2 0x48
#define OMAP_MMC_REG_RSP3 0x4c
#define OMAP_MMC_REG_RSP4 0x50
#define OMAP_MMC_REG_RSP5 0x54
#define OMAP_MMC_REG_RSP6 0x58
#define OMAP_MMC_REG_RSP7 0x5c
#define OMAP_MMC_REG_IOSR 0x60
#define OMAP_MMC_REG_SYSC 0x64
#define OMAP_MMC_REG_SYSS 0x68
#define OMAP_MMC_STAT_CARD_ERR (1 << 14)
#define OMAP_MMC_STAT_CARD_IRQ (1 << 13)
#define OMAP_MMC_STAT_OCR_BUSY (1 << 12)
#define OMAP_MMC_STAT_A_EMPTY (1 << 11)
#define OMAP_MMC_STAT_A_FULL (1 << 10)
#define OMAP_MMC_STAT_CMD_CRC (1 << 8)
#define OMAP_MMC_STAT_CMD_TOUT (1 << 7)
#define OMAP_MMC_STAT_DATA_CRC (1 << 6)
#define OMAP_MMC_STAT_DATA_TOUT (1 << 5)
#define OMAP_MMC_STAT_END_BUSY (1 << 4)
#define OMAP_MMC_STAT_END_OF_DATA (1 << 3)
#define OMAP_MMC_STAT_CARD_BUSY (1 << 2)
#define OMAP_MMC_STAT_END_OF_CMD (1 << 0)
#define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG_##reg)
#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG_##reg)
/*
* Command types
*/
#define OMAP_MMC_CMDTYPE_BC 0
#define OMAP_MMC_CMDTYPE_BCR 1
#define OMAP_MMC_CMDTYPE_AC 2
#define OMAP_MMC_CMDTYPE_ADTC 3
#define DRIVER_NAME "mmci-omap"
#define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
......@@ -61,8 +111,9 @@ struct mmc_omap_host {
unsigned char id; /* 16xx chips have 2 MMC blocks */
struct clk * iclk;
struct clk * fclk;
struct resource *res;
void __iomem *base;
struct resource *mem_res;
void __iomem *virt_base;
unsigned int phys_base;
int irq;
unsigned char bus_mode;
unsigned char hw_bus_mode;
......@@ -192,16 +243,16 @@ mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd)
clk_enable(host->fclk);
OMAP_MMC_WRITE(host->base, CTO, 200);
OMAP_MMC_WRITE(host->base, ARGL, cmd->arg & 0xffff);
OMAP_MMC_WRITE(host->base, ARGH, cmd->arg >> 16);
OMAP_MMC_WRITE(host->base, IE,
OMAP_MMC_WRITE(host, CTO, 200);
OMAP_MMC_WRITE(host, ARGL, cmd->arg & 0xffff);
OMAP_MMC_WRITE(host, ARGH, cmd->arg >> 16);
OMAP_MMC_WRITE(host, IE,
OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL |
OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT |
OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT |
OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR |
OMAP_MMC_STAT_END_OF_DATA);
OMAP_MMC_WRITE(host->base, CMD, cmdreg);
OMAP_MMC_WRITE(host, CMD, cmdreg);
}
static void
......@@ -297,22 +348,22 @@ mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
if (cmd->flags & MMC_RSP_136) {
/* response type 2 */
cmd->resp[3] =
OMAP_MMC_READ(host->base, RSP0) |
(OMAP_MMC_READ(host->base, RSP1) << 16);
OMAP_MMC_READ(host, RSP0) |
(OMAP_MMC_READ(host, RSP1) << 16);
cmd->resp[2] =
OMAP_MMC_READ(host->base, RSP2) |
(OMAP_MMC_READ(host->base, RSP3) << 16);
OMAP_MMC_READ(host, RSP2) |
(OMAP_MMC_READ(host, RSP3) << 16);
cmd->resp[1] =
OMAP_MMC_READ(host->base, RSP4) |
(OMAP_MMC_READ(host->base, RSP5) << 16);
OMAP_MMC_READ(host, RSP4) |
(OMAP_MMC_READ(host, RSP5) << 16);
cmd->resp[0] =
OMAP_MMC_READ(host->base, RSP6) |
(OMAP_MMC_READ(host->base, RSP7) << 16);
OMAP_MMC_READ(host, RSP6) |
(OMAP_MMC_READ(host, RSP7) << 16);
} else {
/* response types 1, 1b, 3, 4, 5, 6 */
cmd->resp[0] =
OMAP_MMC_READ(host->base, RSP6) |
(OMAP_MMC_READ(host->base, RSP7) << 16);
OMAP_MMC_READ(host, RSP6) |
(OMAP_MMC_READ(host, RSP7) << 16);
}
}
......@@ -355,9 +406,9 @@ mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
host->data->bytes_xfered += n;
if (write) {
__raw_writesw(host->base + OMAP_MMC_REG_DATA, host->buffer, n);
__raw_writesw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
} else {
__raw_readsw(host->base + OMAP_MMC_REG_DATA, host->buffer, n);
__raw_readsw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
}
}
......@@ -387,11 +438,11 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id, struct pt_regs *regs)
int transfer_error;
if (host->cmd == NULL && host->data == NULL) {
status = OMAP_MMC_READ(host->base, STAT);
status = OMAP_MMC_READ(host, STAT);
dev_info(mmc_dev(host->mmc),"spurious irq 0x%04x\n", status);
if (status != 0) {
OMAP_MMC_WRITE(host->base, STAT, status);
OMAP_MMC_WRITE(host->base, IE, 0);
OMAP_MMC_WRITE(host, STAT, status);
OMAP_MMC_WRITE(host, IE, 0);
}
return IRQ_HANDLED;
}
......@@ -400,8 +451,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id, struct pt_regs *regs)
end_transfer = 0;
transfer_error = 0;
while ((status = OMAP_MMC_READ(host->base, STAT)) != 0) {
OMAP_MMC_WRITE(host->base, STAT, status);
while ((status = OMAP_MMC_READ(host, STAT)) != 0) {
OMAP_MMC_WRITE(host, STAT, status);
#ifdef CONFIG_MMC_DEBUG
dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ",
status, host->cmd != NULL ? host->cmd->opcode : -1);
......@@ -471,8 +522,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id, struct pt_regs *regs)
if (status & OMAP_MMC_STAT_CARD_ERR) {
if (host->cmd && host->cmd->opcode == MMC_STOP_TRANSMISSION) {
u32 response = OMAP_MMC_READ(host->base, RSP6)
| (OMAP_MMC_READ(host->base, RSP7) << 16);
u32 response = OMAP_MMC_READ(host, RSP6)
| (OMAP_MMC_READ(host, RSP7) << 16);
/* STOP sometimes sets must-ignore bits */
if (!(response & (R1_CC_ERROR
| R1_ILLEGAL_COMMAND
......@@ -582,7 +633,7 @@ mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
int dst_port = 0;
int sync_dev = 0;
data_addr = io_v2p((u32) host->base) + OMAP_MMC_REG_DATA;
data_addr = host->phys_base + OMAP_MMC_REG_DATA;
frame = 1 << data->blksz_bits;
count = sg_dma_len(sg);
......@@ -644,7 +695,7 @@ mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
if (unlikely(count > 0xffff))
BUG();
OMAP_MMC_WRITE(host->base, BUF, buf);
OMAP_MMC_WRITE(host, BUF, buf);
omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16,
frame, count, OMAP_DMA_SYNC_FRAME,
sync_dev, 0);
......@@ -729,11 +780,11 @@ static inline void set_cmd_timeout(struct mmc_omap_host *host, struct mmc_reques
{
u16 reg;
reg = OMAP_MMC_READ(host->base, SDIO);
reg = OMAP_MMC_READ(host, SDIO);
reg &= ~(1 << 5);
OMAP_MMC_WRITE(host->base, SDIO, reg);
OMAP_MMC_WRITE(host, SDIO, reg);
/* Set maximum timeout */
OMAP_MMC_WRITE(host->base, CTO, 0xff);
OMAP_MMC_WRITE(host, CTO, 0xff);
}
static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req)
......@@ -747,14 +798,14 @@ static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_reque
timeout = req->data->timeout_clks + req->data->timeout_ns / 500;
/* Check if we need to use timeout multiplier register */
reg = OMAP_MMC_READ(host->base, SDIO);
reg = OMAP_MMC_READ(host, SDIO);
if (timeout > 0xffff) {
reg |= (1 << 5);
timeout /= 1024;
} else
reg &= ~(1 << 5);
OMAP_MMC_WRITE(host->base, SDIO, reg);
OMAP_MMC_WRITE(host->base, DTO, timeout);
OMAP_MMC_WRITE(host, SDIO, reg);
OMAP_MMC_WRITE(host, DTO, timeout);
}
static void
......@@ -766,9 +817,9 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
host->data = data;
if (data == NULL) {
OMAP_MMC_WRITE(host->base, BLEN, 0);
OMAP_MMC_WRITE(host->base, NBLK, 0);
OMAP_MMC_WRITE(host->base, BUF, 0);
OMAP_MMC_WRITE(host, BLEN, 0);
OMAP_MMC_WRITE(host, NBLK, 0);
OMAP_MMC_WRITE(host, BUF, 0);
host->dma_in_use = 0;
set_cmd_timeout(host, req);
return;
......@@ -777,8 +828,8 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
block_size = 1 << data->blksz_bits;
OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1);
OMAP_MMC_WRITE(host->base, BLEN, block_size - 1);
OMAP_MMC_WRITE(host, NBLK, data->blocks - 1);
OMAP_MMC_WRITE(host, BLEN, block_size - 1);
set_data_timeout(host, req);
/* cope with calling layer confusion; it issues "single
......@@ -820,7 +871,7 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
/* Revert to PIO? */
if (!use_dma) {
OMAP_MMC_WRITE(host->base, BUF, 0x1f1f);
OMAP_MMC_WRITE(host, BUF, 0x1f1f);
host->total_bytes_left = data->blocks * block_size;
host->sg_len = sg_len;
mmc_omap_sg_to_buf(host);
......@@ -846,7 +897,6 @@ static void mmc_omap_request(struct mmc_host *mmc, struct mmc_request *req)
static void innovator_fpga_socket_power(int on)
{
#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX)
if (on) {
fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3),
OMAP1510_FPGA_POWER);
......@@ -872,11 +922,12 @@ static void mmc_omap_power(struct mmc_omap_host *host, int on)
/* GPIO 4 of TPS65010 sends SD_EN signal */
tps65010_set_gpio_out_value(GPIO4, HIGH);
else if (cpu_is_omap24xx()) {
u16 reg = OMAP_MMC_READ(host->base, CON);
OMAP_MMC_WRITE(host->base, CON, reg | (1 << 11));
u16 reg = OMAP_MMC_READ(host, CON);
OMAP_MMC_WRITE(host, CON, reg | (1 << 11));
} else
if (host->power_pin >= 0)
omap_set_gpio_dataout(host->power_pin, 1);
msleep(1);
} else {
if (machine_is_omap_innovator())
innovator_fpga_socket_power(0);
......@@ -885,8 +936,8 @@ static void mmc_omap_power(struct mmc_omap_host *host, int on)
else if (machine_is_omap_h3())
tps65010_set_gpio_out_value(GPIO4, LOW);
else if (cpu_is_omap24xx()) {
u16 reg = OMAP_MMC_READ(host->base, CON);
OMAP_MMC_WRITE(host->base, CON, reg & ~(1 << 11));
u16 reg = OMAP_MMC_READ(host, CON);
OMAP_MMC_WRITE(host, CON, reg & ~(1 << 11));
} else
if (host->power_pin >= 0)
omap_set_gpio_dataout(host->power_pin, 0);
......@@ -896,30 +947,31 @@ static void mmc_omap_power(struct mmc_omap_host *host, int on)
static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
struct mmc_omap_host *host = mmc_priv(mmc);
int fclk_rate;
int dsor;
int realclock, i;
int freq, i;
realclock = ios->clock;
freq = ios->clock;
if (ios->clock == 0)
dsor = 0;
else {
int func_clk_rate = clk_get_rate(host->fclk);
/* At least on OMAP2420, the divisor must be != 0 for the
* initialization sequence to complete successfully. */
if (freq == 0)
freq = 4000000;
dsor = func_clk_rate / realclock;
if (dsor < 1)
dsor = 1;
fclk_rate = clk_get_rate(host->fclk);
dsor = fclk_rate / freq;
if (dsor < 1)
dsor = 1;
if (func_clk_rate / dsor > realclock)
dsor++;
if (dsor > 250)
dsor = 250;
if (fclk_rate / dsor > freq)
dsor++;
if (ios->bus_width == MMC_BUS_WIDTH_4)
dsor |= 1 << 15;
}
if (dsor > 250)
dsor = 250;
dsor++;
if (ios->bus_width == MMC_BUS_WIDTH_4)
dsor |= 1 << 15;
switch (ios->power_mode) {
case MMC_POWER_OFF:
......@@ -928,7 +980,7 @@ static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
case MMC_POWER_UP:
case MMC_POWER_ON:
mmc_omap_power(host, 1);
dsor |= 1<<11;
dsor |= 1 << 11;
break;
}
......@@ -942,14 +994,15 @@ static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
* which results in the while loop below getting stuck.
* Writing to the CON register twice seems to do the trick. */
for (i = 0; i < 2; i++)
OMAP_MMC_WRITE(host->base, CON, dsor);
OMAP_MMC_WRITE(host, CON, dsor);
if (ios->power_mode == MMC_POWER_UP) {
/* Send clock cycles, poll completion */
OMAP_MMC_WRITE(host->base, IE, 0);
OMAP_MMC_WRITE(host->base, STAT, 0xffff);
OMAP_MMC_WRITE(host->base, CMD, 1<<7);
while (0 == (OMAP_MMC_READ(host->base, STAT) & 1));
OMAP_MMC_WRITE(host->base, STAT, 1);
OMAP_MMC_WRITE(host, IE, 0);
OMAP_MMC_WRITE(host, STAT, 0xffff);
OMAP_MMC_WRITE(host, CMD, 1 << 7);
printk("CMD %04x\n", OMAP_MMC_READ(host, CMD));
while ((OMAP_MMC_READ(host, STAT) & 1) == 0);
OMAP_MMC_WRITE(host, STAT, 1);
}
clk_disable(host->fclk);
}
......@@ -972,25 +1025,29 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
struct omap_mmc_conf *minfo = pdev->dev.platform_data;
struct mmc_host *mmc;
struct mmc_omap_host *host = NULL;
struct resource *r;
struct resource *res;
int ret = 0;
int irq;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (minfo == NULL) {
dev_err(&pdev->dev, "platform data missing\n");
return -ENXIO;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
irq = platform_get_irq(pdev, 0);
if (!r || irq < 0)
if (res == NULL || irq < 0)
return -ENXIO;
r = request_mem_region(pdev->resource[0].start,
pdev->resource[0].end - pdev->resource[0].start + 1,
pdev->name);
if (!r)
res = request_mem_region(res->start, res->end - res->start + 1,
pdev->name);
if (res == NULL)
return -EBUSY;
mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev);
if (!mmc) {
if (mmc == NULL) {
ret = -ENOMEM;
goto out;
goto err_free_mem_region;
}
host = mmc_priv(mmc);
......@@ -998,17 +1055,18 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
spin_lock_init(&host->dma_lock);
init_timer(&host->dma_timer);
host->dma_timer.function = mmc_omap_dma_timer;
host->dma_timer.data = (unsigned long) host;
host->id = pdev->id;
host->res = r;
host->mem_res = res;
host->irq = irq;
if (cpu_is_omap24xx()) {
host->iclk = clk_get(&pdev->dev, "mmc_ick");
if (IS_ERR(host->iclk))
goto out;
goto err_free_mmc_host;
clk_enable(host->iclk);
}
......@@ -1016,10 +1074,9 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
host->fclk = clk_get(&pdev->dev, "mmc_ck");
else
host->fclk = clk_get(&pdev->dev, "mmc_fck");
if (IS_ERR(host->fclk)) {
ret = PTR_ERR(host->fclk);
goto out;
goto err_free_iclk;
}
/* REVISIT:
......@@ -1032,8 +1089,9 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
host->use_dma = 1;
host->dma_ch = -1;
host->irq = pdev->resource[1].start;
host->base = (void __iomem*)IO_ADDRESS(r->start);
host->irq = irq;
host->phys_base = host->mem_res->start;
host->virt_base = (void __iomem *) IO_ADDRESS(host->phys_base);
if (minfo->wire4)
mmc->caps |= MMC_CAP_4_BIT_DATA;
......@@ -1041,7 +1099,7 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
mmc->ops = &mmc_omap_ops;
mmc->f_min = 400000;
mmc->f_max = 24000000;
mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
/* Use scatterlist DMA to reduce per-transfer costs.
* NOTE max_seg_size assumption that small blocks aren't
......@@ -1056,20 +1114,18 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
if ((ret = omap_request_gpio(host->power_pin)) != 0) {
dev_err(mmc_dev(host->mmc),
"Unable to get GPIO pin for MMC power\n");
goto out;
goto err_free_fclk;
}
omap_set_gpio_direction(host->power_pin, 0);
}
ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host);
if (ret)
goto out;
goto err_free_power_gpio;
host->dev = &pdev->dev;
platform_set_drvdata(pdev, host);
mmc_add_host(mmc);
if (host->switch_pin >= 0) {
INIT_WORK(&host->switch_work, mmc_omap_switch_handler, host);
init_timer(&host->switch_timer);
......@@ -1107,10 +1163,10 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
schedule_work(&host->switch_work);
}
mmc_add_host(mmc);
no_switch:
return 0;
out:
/* FIXME: Free other resources too. */
if (host) {
if (host->iclk && !IS_ERR(host->iclk))
......@@ -1119,6 +1175,21 @@ out:
clk_put(host->fclk);
mmc_free_host(host->mmc);
}
err_free_power_gpio:
if (host->power_pin >= 0)
omap_free_gpio(host->power_pin);
err_free_fclk:
clk_put(host->fclk);
err_free_iclk:
if (host->iclk != NULL) {
clk_disable(host->iclk);
clk_put(host->iclk);
}
err_free_mmc_host:
mmc_free_host(host->mmc);
err_free_mem_region:
release_mem_region(res->start, res->end - res->start + 1);
return ret;
}
......@@ -1128,30 +1199,31 @@ static int mmc_omap_remove(struct platform_device *pdev)
platform_set_drvdata(pdev, NULL);
if (host) {
mmc_remove_host(host->mmc);
free_irq(host->irq, host);
if (host->power_pin >= 0)
omap_free_gpio(host->power_pin);
if (host->switch_pin >= 0) {
device_remove_file(&pdev->dev, &dev_attr_enable_poll);
device_remove_file(&pdev->dev, &dev_attr_cover_switch);
free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
omap_free_gpio(host->switch_pin);
host->switch_pin = -1;
del_timer_sync(&host->switch_timer);
flush_scheduled_work();
}
if (host->iclk && !IS_ERR(host->iclk))
clk_put(host->iclk);
if (host->fclk && !IS_ERR(host->fclk))
clk_put(host->fclk);
mmc_free_host(host->mmc);
BUG_ON(host == NULL);
mmc_remove_host(host->mmc);
free_irq(host->irq, host);
if (host->power_pin >= 0)
omap_free_gpio(host->power_pin);
if (host->switch_pin >= 0) {
device_remove_file(&pdev->dev, &dev_attr_enable_poll);
device_remove_file(&pdev->dev, &dev_attr_cover_switch);
free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
omap_free_gpio(host->switch_pin);
host->switch_pin = -1;
del_timer_sync(&host->switch_timer);
flush_scheduled_work();
}
if (host->iclk && !IS_ERR(host->iclk))
clk_put(host->iclk);
if (host->fclk && !IS_ERR(host->fclk))
clk_put(host->fclk);
release_mem_region(pdev->resource[0].start,
pdev->resource[0].end - pdev->resource[0].start + 1);
pdev->resource[0].end - pdev->resource[0].start + 1);
mmc_free_host(host->mmc);
return 0;
}
......
drivers/mmc/omap.h deleted 100644 → 0
View file @ cfd483b1
#ifndef DRIVERS_MEDIA_MMC_OMAP_H
#define DRIVERS_MEDIA_MMC_OMAP_H
#define OMAP_MMC_REG_CMD 0x00
#define OMAP_MMC_REG_ARGL 0x04
#define OMAP_MMC_REG_ARGH 0x08
#define OMAP_MMC_REG_CON 0x0c
#define OMAP_MMC_REG_STAT 0x10
#define OMAP_MMC_REG_IE 0x14
#define OMAP_MMC_REG_CTO 0x18
#define OMAP_MMC_REG_DTO 0x1c
#define OMAP_MMC_REG_DATA 0x20
#define OMAP_MMC_REG_BLEN 0x24
#define OMAP_MMC_REG_NBLK 0x28
#define OMAP_MMC_REG_BUF 0x2c
#define OMAP_MMC_REG_SDIO 0x34
#define OMAP_MMC_REG_REV 0x3c
#define OMAP_MMC_REG_RSP0 0x40
#define OMAP_MMC_REG_RSP1 0x44
#define OMAP_MMC_REG_RSP2 0x48
#define OMAP_MMC_REG_RSP3 0x4c
#define OMAP_MMC_REG_RSP4 0x50
#define OMAP_MMC_REG_RSP5 0x54
#define OMAP_MMC_REG_RSP6 0x58
#define OMAP_MMC_REG_RSP7 0x5c
#define OMAP_MMC_REG_IOSR 0x60
#define OMAP_MMC_REG_SYSC 0x64
#define OMAP_MMC_REG_SYSS 0x68
#define OMAP_MMC_STAT_CARD_ERR (1 << 14)
#define OMAP_MMC_STAT_CARD_IRQ (1 << 13)
#define OMAP_MMC_STAT_OCR_BUSY (1 << 12)
#define OMAP_MMC_STAT_A_EMPTY (1 << 11)
#define OMAP_MMC_STAT_A_FULL (1 << 10)
#define OMAP_MMC_STAT_CMD_CRC (1 << 8)
#define OMAP_MMC_STAT_CMD_TOUT (1 << 7)
#define OMAP_MMC_STAT_DATA_CRC (1 << 6)
#define OMAP_MMC_STAT_DATA_TOUT (1 << 5)
#define OMAP_MMC_STAT_END_BUSY (1 << 4)
#define OMAP_MMC_STAT_END_OF_DATA (1 << 3)
#define OMAP_MMC_STAT_CARD_BUSY (1 << 2)
#define OMAP_MMC_STAT_END_OF_CMD (1 << 0)
#define OMAP_MMC_READ(base, reg) __raw_readw((base) + OMAP_MMC_REG_##reg)
#define OMAP_MMC_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MMC_REG_##reg)
/*
* Command types
*/
#define OMAP_MMC_CMDTYPE_BC 0
#define OMAP_MMC_CMDTYPE_BCR 1
#define OMAP_MMC_CMDTYPE_AC 2
#define OMAP_MMC_CMDTYPE_ADTC 3
#endif
drivers/spi/omap2_mcspi.c
View file @ 99c537d1
......@@ -28,6 +28,8 @@
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/spi/spi.h>
......@@ -84,6 +86,8 @@ struct omap2_mcspi {
spinlock_t lock;
struct list_head msg_queue;
struct spi_master *master;
struct clk *ick;
struct clk *fck;
};
struct omap2_mcspi_cs {
......@@ -456,7 +460,7 @@ static int __devinit omap2_mcspi_probe(struct platform_device *pdev)
return -EINVAL;
master = spi_alloc_master(&pdev->dev, sizeof *mcspi);
if (!master) {
if (master == NULL) {
dev_err(&pdev->dev, "master allocation failed\n");
return -ENOMEM;
}
......@@ -485,28 +489,56 @@ static int __devinit omap2_mcspi_probe(struct platform_device *pdev)
spin_lock_init(&mcspi->lock);
INIT_LIST_HEAD(&mcspi->msg_queue);
mcspi->ick = clk_get(&pdev->dev, "mcspi_ick");
if (IS_ERR(mcspi->ick)) {
dev_err(&pdev->dev, "can't get mcspi_ick\n");
status = PTR_ERR(mcspi->ick);
goto err1;
}
clk_enable(mcspi->ick);
mcspi->fck = clk_get(&pdev->dev, "mcspi_fck");
if (IS_ERR(mcspi->fck)) {
dev_err(&pdev->dev, "can't get mcspi_fck\n");
status = PTR_ERR(mcspi->fck);
goto err2;
}
clk_enable(mcspi->fck);
if (omap2_mcspi_reset(master) < 0)
goto err1;
goto err3;
status = spi_register_master(master);
if (status < 0)
goto err1;
goto err3;
return status;
err1:
err3:
clk_disable(mcspi->fck);
clk_put(mcspi->fck);
err2:
clk_disable(mcspi->ick);
clk_put(mcspi->ick);
err1:
class_device_put(&master->cdev);
err0:
err0:
return status;
}
static int __devexit omap2_mcspi_remove(struct platform_device *pdev)
{
struct spi_master *master;
struct omap2_mcspi *mcspi;
master = dev_get_drvdata(&pdev->dev);
spi_unregister_master(master);
mcspi = class_get_devdata(&master->cdev);
clk_disable(mcspi->fck);
clk_put(mcspi->fck);
clk_disable(mcspi->ick);
clk_put(mcspi->ick);
class_device_put(&master->cdev);
return 0;
}
......
include/asm-arm/arch-omap/board.h
View file @ 99c537d1
......@@ -23,6 +23,7 @@
#define OMAP_TAG_UART 0x4f07
#define OMAP_TAG_FBMEM 0x4f08
#define OMAP_TAG_STI_CONSOLE 0x4f09
#define OMAP_TAG_CAMERA_SENSOR 0x4f0a
#define OMAP_TAG_BOOT_REASON 0x4f80
#define OMAP_TAG_FLASH_PART 0x4f81
......@@ -62,6 +63,12 @@ struct omap_sti_console_config {
u8 channel;
};
struct omap_camera_sensor_config {
u16 reset_gpio;
int (*power_on)(void * data);
int (*power_off)(void * data);
};
struct omap_usb_config {
/* Configure drivers according to the connectors on your board:
* - "A" connector (rectagular)
......
include/asm-arm/arch-omap/menelaus.h
View file @ 99c537d1
......@@ -7,10 +7,13 @@
#ifndef __ASM_ARCH_MENELAUS_H
#define __ASM_ARCH_MENELAUS_H
extern void menelaus_mmc_register(void (*callback)(unsigned long data, u8 card_mask),
extern int menelaus_mmc_register(void (*callback)(unsigned long data, u8 card_mask),
unsigned long data);
extern void menelaus_mmc_remove(void);
extern void menelaus_mmc_opendrain(int enable);
extern int menelaus_mmc_remove(void);
extern int menelaus_mmc_opendrain(int enable);
extern int menelaus_set_vmem(unsigned int mV);
extern int menelaus_set_vio(unsigned int mV);
#if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_MENELAUS)
#define omap_has_menelaus() 1
......
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