Commit 992426bf authored by Ben Dooks's avatar Ben Dooks

ARM: SAMSUNG: Remove dma-plat.h to allow plat-s3c64xx to be removed

dma-plat.h is the last file left in plat-s3c64xx, but to remove it we
must also change the use of dma-plat.h by the core code and the s3c24xx
implementation.

Rename the s3c24xx dma-plat.h in the common plat-samsung directory as it
may be used for other ports. Move the specific dma bits into the
mach-s3c64xx directory and update the build as needed.
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
parent 431fb7df
...@@ -21,7 +21,7 @@ ...@@ -21,7 +21,7 @@
#include <mach/dma.h> #include <mach/dma.h>
#include <plat/cpu.h> #include <plat/cpu.h>
#include <plat/dma-plat.h> #include <plat/dma-s3c24xx.h>
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
#include <mach/regs-gpio.h> #include <mach/regs-gpio.h>
......
...@@ -20,7 +20,7 @@ ...@@ -20,7 +20,7 @@
#include <mach/dma.h> #include <mach/dma.h>
#include <plat/dma-plat.h> #include <plat/dma-s3c24xx.h>
#include <plat/cpu.h> #include <plat/cpu.h>
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
......
...@@ -20,7 +20,7 @@ ...@@ -20,7 +20,7 @@
#include <mach/map.h> #include <mach/map.h>
#include <mach/dma.h> #include <mach/dma.h>
#include <plat/dma-plat.h> #include <plat/dma-s3c24xx.h>
#include <plat/cpu.h> #include <plat/cpu.h>
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
......
...@@ -20,7 +20,7 @@ ...@@ -20,7 +20,7 @@
#include <mach/dma.h> #include <mach/dma.h>
#include <plat/dma-plat.h> #include <plat/dma-s3c24xx.h>
#include <plat/cpu.h> #include <plat/cpu.h>
#include <plat/regs-serial.h> #include <plat/regs-serial.h>
......
...@@ -27,7 +27,6 @@ ...@@ -27,7 +27,6 @@
#include <mach/map.h> #include <mach/map.h>
#include <mach/irqs.h> #include <mach/irqs.h>
#include <plat/dma-plat.h>
#include <mach/regs-sys.h> #include <mach/regs-sys.h>
#include <asm/hardware/pl080.h> #include <asm/hardware/pl080.h>
......
...@@ -67,4 +67,61 @@ static __inline__ bool s3c_dma_has_circular(void) ...@@ -67,4 +67,61 @@ static __inline__ bool s3c_dma_has_circular(void)
#include <plat/dma.h> #include <plat/dma.h>
#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */
struct s3c64xx_dma_buff;
/** s3c64xx_dma_buff - S3C64XX DMA buffer descriptor
* @next: Pointer to next buffer in queue or ring.
* @pw: Client provided identifier
* @lli: Pointer to hardware descriptor this buffer is associated with.
* @lli_dma: Hardare address of the descriptor.
*/
struct s3c64xx_dma_buff {
struct s3c64xx_dma_buff *next;
void *pw;
struct pl080s_lli *lli;
dma_addr_t lli_dma;
};
struct s3c64xx_dmac;
struct s3c2410_dma_chan {
unsigned char number; /* number of this dma channel */
unsigned char in_use; /* channel allocated */
unsigned char bit; /* bit for enable/disable/etc */
unsigned char hw_width;
unsigned char peripheral;
unsigned int flags;
enum s3c2410_dmasrc source;
dma_addr_t dev_addr;
struct s3c2410_dma_client *client;
struct s3c64xx_dmac *dmac; /* pointer to controller */
void __iomem *regs;
/* cdriver callbacks */
s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */
s3c2410_dma_opfn_t op_fn; /* channel op callback */
/* buffer list and information */
struct s3c64xx_dma_buff *curr; /* current dma buffer */
struct s3c64xx_dma_buff *next; /* next buffer to load */
struct s3c64xx_dma_buff *end; /* end of queue */
/* note, when channel is running in circular mode, curr is the
* first buffer enqueued, end is the last and curr is where the
* last buffer-done event is set-at. The buffers are not freed
* and the last buffer hardware descriptor points back to the
* first.
*/
};
#include <plat/dma-core.h>
#endif /* __ASM_ARCH_IRQ_H */ #endif /* __ASM_ARCH_IRQ_H */
...@@ -20,8 +20,6 @@ struct s3c2410_dma_buf; ...@@ -20,8 +20,6 @@ struct s3c2410_dma_buf;
#include <mach/dma.h> #include <mach/dma.h>
#include <mach/irqs.h> #include <mach/irqs.h>
#include <plat/dma-plat.h>
/* dma channel state information */ /* dma channel state information */
struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS]; struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS];
struct s3c2410_dma_chan *s3c_dma_chan_map[DMACH_MAX]; struct s3c2410_dma_chan *s3c_dma_chan_map[DMACH_MAX];
......
...@@ -33,7 +33,7 @@ ...@@ -33,7 +33,7 @@
#include <mach/dma.h> #include <mach/dma.h>
#include <mach/map.h> #include <mach/map.h>
#include <plat/dma-plat.h> #include <plat/dma-s3c24xx.h>
#include <plat/regs-dma.h> #include <plat/regs-dma.h>
/* io map for dma */ /* io map for dma */
......
/* linux/arch/arm/plat-s3c64xx/include/plat/dma-plat.h
*
* Copyright 2009 Openmoko, Inc.
* Copyright 2009 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
* S3C64XX DMA core
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */
struct s3c64xx_dma_buff;
/** s3c64xx_dma_buff - S3C64XX DMA buffer descriptor
* @next: Pointer to next buffer in queue or ring.
* @pw: Client provided identifier
* @lli: Pointer to hardware descriptor this buffer is associated with.
* @lli_dma: Hardare address of the descriptor.
*/
struct s3c64xx_dma_buff {
struct s3c64xx_dma_buff *next;
void *pw;
struct pl080s_lli *lli;
dma_addr_t lli_dma;
};
struct s3c64xx_dmac;
struct s3c2410_dma_chan {
unsigned char number; /* number of this dma channel */
unsigned char in_use; /* channel allocated */
unsigned char bit; /* bit for enable/disable/etc */
unsigned char hw_width;
unsigned char peripheral;
unsigned int flags;
enum s3c2410_dmasrc source;
dma_addr_t dev_addr;
struct s3c2410_dma_client *client;
struct s3c64xx_dmac *dmac; /* pointer to controller */
void __iomem *regs;
/* cdriver callbacks */
s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */
s3c2410_dma_opfn_t op_fn; /* channel op callback */
/* buffer list and information */
struct s3c64xx_dma_buff *curr; /* current dma buffer */
struct s3c64xx_dma_buff *next; /* next buffer to load */
struct s3c64xx_dma_buff *end; /* end of queue */
/* note, when channel is running in circular mode, curr is the
* first buffer enqueued, end is the last and curr is where the
* last buffer-done event is set-at. The buffers are not freed
* and the last buffer hardware descriptor points back to the
* first.
*/
};
#include <plat/dma-core.h>
/* linux/arch/arm/plat-s3c24xx/include/plat/dma-plat.h /* linux/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
* *
* Copyright (C) 2006 Simtec Electronics * Copyright (C) 2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk> * Ben Dooks <ben@simtec.co.uk>
* *
* Samsung S3C24XX DMA support * Samsung S3C24XX DMA support - per SoC functions
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
......
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