Commit 8d82ffd1 authored by Wolfgang Grandegger's avatar Wolfgang Grandegger Committed by Kumar Gala

powerpc: Document new FSL I2C bindings and cleanup

This patch documents the new bindings for the MPC I2C bus driver.
Furthermore, it removes obsolete FSL device related definitions
for I2C.
Signed-off-by: default avatarWolfgang Grandegger <wg@grandegger.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 52ce67f1
......@@ -7,8 +7,10 @@ Required properties :
Recommended properties :
- compatible : Should be "fsl-i2c" for parts compatible with
Freescale I2C specifications.
- compatible : compatibility list with 2 entries, the first should
be "fsl,CHIP-i2c" where CHIP is the name of a compatible processor,
e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one
should be "fsl-i2c".
- interrupts : <a b> where a is the interrupt number and b is a
field that represents an encoding of the sense and level
information for the interrupt. This should be encoded based on
......@@ -16,17 +18,31 @@ Recommended properties :
controller you have.
- interrupt-parent : the phandle for the interrupt controller that
services interrupts for this device.
- dfsrr : boolean; if defined, indicates that this I2C device has
a digital filter sampling rate register
- fsl5200-clocking : boolean; if defined, indicated that this device
uses the FSL 5200 clocking mechanism.
Example :
i2c@3000 {
interrupt-parent = <40000>;
interrupts = <1b 3>;
reg = <3000 18>;
device_type = "i2c";
compatible = "fsl-i2c";
dfsrr;
- fsl,preserve-clocking : boolean; if defined, the clock settings
from the bootloader are preserved (not touched).
- clock-frequency : desired I2C bus clock frequency in Hz.
Examples :
i2c@3d00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
cell-index = <0>;
reg = <0x3d00 0x40>;
interrupts = <2 15 0>;
interrupt-parent = <&mpc5200_pic>;
fsl,preserve-clocking;
};
i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl,mpc8544-i2c", "fsl-i2c";
reg = <0x3100 0x100>;
interrupts = <43 2>;
interrupt-parent = <&mpic>;
clock-frequency = <400000>;
};
......@@ -43,10 +43,6 @@
*
*/
/* Flags related to I2C device features */
#define FSL_I2C_DEV_SEPARATE_DFSRR 0x00000001
#define FSL_I2C_DEV_CLOCK_5200 0x00000002
enum fsl_usb2_operating_modes {
FSL_USB2_MPH_HOST,
FSL_USB2_DR_HOST,
......
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