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linux
linux-davinci
Commits
8118aea2
Commit
8118aea2
authored
Mar 09, 2009
by
Eric Miao
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Merge branch 'fix' of
git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
into devel
parents
432dc14f
26a55226
Changes
5
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5 changed files
with
18 additions
and
11 deletions
+18
-11
arch/arm/mach-pxa/dma.c
arch/arm/mach-pxa/dma.c
+10
-8
arch/arm/mach-pxa/include/mach/regs-ac97.h
arch/arm/mach-pxa/include/mach/regs-ac97.h
+2
-0
arch/arm/mach-pxa/include/mach/regs-ssp.h
arch/arm/mach-pxa/include/mach/regs-ssp.h
+3
-0
arch/arm/mach-pxa/pxa300.c
arch/arm/mach-pxa/pxa300.c
+2
-2
arch/arm/mach-pxa/pxa320.c
arch/arm/mach-pxa/pxa320.c
+1
-1
No files found.
arch/arm/mach-pxa/dma.c
View file @
8118aea2
...
...
@@ -121,20 +121,22 @@ int __init pxa_init_dma(int num_ch)
if
(
dma_channels
==
NULL
)
return
-
ENOMEM
;
ret
=
request_irq
(
IRQ_DMA
,
dma_irq_handler
,
IRQF_DISABLED
,
"DMA"
,
NULL
);
if
(
ret
)
{
printk
(
KERN_CRIT
"Wow! Can't register IRQ for DMA
\n
"
);
kfree
(
dma_channels
);
return
ret
;
}
/* dma channel priorities on pxa2xx processors:
* ch 0 - 3, 16 - 19 <--> (0) DMA_PRIO_HIGH
* ch 4 - 7, 20 - 23 <--> (1) DMA_PRIO_MEDIUM
* ch 8 - 15, 24 - 31 <--> (2) DMA_PRIO_LOW
*/
for
(
i
=
0
;
i
<
num_ch
;
i
++
)
for
(
i
=
0
;
i
<
num_ch
;
i
++
)
{
DCSR
(
i
)
=
0
;
dma_channels
[
i
].
prio
=
min
((
i
&
0xf
)
>>
2
,
DMA_PRIO_LOW
);
}
ret
=
request_irq
(
IRQ_DMA
,
dma_irq_handler
,
IRQF_DISABLED
,
"DMA"
,
NULL
);
if
(
ret
)
{
printk
(
KERN_CRIT
"Wow! Can't register IRQ for DMA
\n
"
);
kfree
(
dma_channels
);
return
ret
;
}
num_dma_channels
=
num_ch
;
return
0
;
...
...
arch/arm/mach-pxa/include/mach/regs-ac97.h
View file @
8118aea2
#ifndef __ASM_ARCH_REGS_AC97_H
#define __ASM_ARCH_REGS_AC97_H
#include <mach/hardware.h>
/*
* AC97 Controller registers
*/
...
...
arch/arm/mach-pxa/include/mach/regs-ssp.h
View file @
8118aea2
...
...
@@ -41,6 +41,9 @@
#elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
#define SSCR0_SCR (0x000fff00)
/* Serial Clock Rate (mask) */
#define SSCR0_SerClkDiv(x) (((x) - 1) << 8)
/* Divisor [1..4096] */
#endif
#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
#define SSCR0_EDSS (1 << 20)
/* Extended data size select */
#define SSCR0_NCS (1 << 21)
/* Network clock select */
#define SSCR0_RIM (1 << 22)
/* Receive FIFO overrrun interrupt mask */
...
...
arch/arm/mach-pxa/pxa300.c
View file @
8118aea2
...
...
@@ -88,13 +88,13 @@ static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
static
DEFINE_PXA3_CKEN
(
common_nand
,
NAND
,
156000000
,
0
);
static
struct
clk_lookup
common_clkregs
[]
=
{
INIT_CLKREG
(
&
clk_common_nand
,
"pxa3xx-nand"
,
"NANDCLK"
),
INIT_CLKREG
(
&
clk_common_nand
,
"pxa3xx-nand"
,
NULL
),
};
static
DEFINE_PXA3_CKEN
(
pxa310_mmc3
,
MMC3
,
19500000
,
0
);
static
struct
clk_lookup
pxa310_clkregs
[]
=
{
INIT_CLKREG
(
&
clk_pxa310_mmc3
,
"pxa2xx-mci.2"
,
"MMCCLK"
),
INIT_CLKREG
(
&
clk_pxa310_mmc3
,
"pxa2xx-mci.2"
,
NULL
),
};
static
int
__init
pxa300_init
(
void
)
...
...
arch/arm/mach-pxa/pxa320.c
View file @
8118aea2
...
...
@@ -83,7 +83,7 @@ static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
static
DEFINE_PXA3_CKEN
(
pxa320_nand
,
NAND
,
104000000
,
0
);
static
struct
clk_lookup
pxa320_clkregs
[]
=
{
INIT_CLKREG
(
&
clk_pxa320_nand
,
"pxa3xx-nand"
,
"NANDCLK"
),
INIT_CLKREG
(
&
clk_pxa320_nand
,
"pxa3xx-nand"
,
NULL
),
};
static
int
__init
pxa320_init
(
void
)
...
...
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