Commit 6d98bda7 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Linus Torvalds

powerpc: Fix IDE legacy vs. native fixups

PowerMac and CHRP/BriQ platforms have quirks to switch some IDE
controllers from legacy mode to fully native mode. Those quirks
however will not work properly anymore due to a change to the
generic code to better handle legacy IDE resources.

This fixes it by moving those quirk to "early" quirks (so they
run before resources are probed for the devices) and clearing
all BARs after the conversion to force a reallocation of sane
values.
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: default avatarAlan Cox <alan@redhat.com>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 7fd27255
...@@ -317,8 +317,12 @@ chrp_find_bridges(void) ...@@ -317,8 +317,12 @@ chrp_find_bridges(void)
/* SL82C105 IDE Control/Status Register */ /* SL82C105 IDE Control/Status Register */
#define SL82C105_IDECSR 0x40 #define SL82C105_IDECSR 0x40
/* Fixup for Winbond ATA quirk, required for briq */ /* Fixup for Winbond ATA quirk, required for briq mostly because the
void chrp_pci_fixup_winbond_ata(struct pci_dev *sl82c105) * 8259 is configured for level sensitive IRQ 14 and so wants the
* ATA controller to be set to fully native mode or bad things
* will happen.
*/
static void __devinit chrp_pci_fixup_winbond_ata(struct pci_dev *sl82c105)
{ {
u8 progif; u8 progif;
...@@ -334,9 +338,14 @@ void chrp_pci_fixup_winbond_ata(struct pci_dev *sl82c105) ...@@ -334,9 +338,14 @@ void chrp_pci_fixup_winbond_ata(struct pci_dev *sl82c105)
sl82c105->class |= 0x05; sl82c105->class |= 0x05;
/* Disable SL82C105 second port */ /* Disable SL82C105 second port */
pci_write_config_word(sl82c105, SL82C105_IDECSR, 0x0003); pci_write_config_word(sl82c105, SL82C105_IDECSR, 0x0003);
/* Clear IO BARs, they will be reassigned */
pci_write_config_dword(sl82c105, PCI_BASE_ADDRESS_0, 0);
pci_write_config_dword(sl82c105, PCI_BASE_ADDRESS_1, 0);
pci_write_config_dword(sl82c105, PCI_BASE_ADDRESS_2, 0);
pci_write_config_dword(sl82c105, PCI_BASE_ADDRESS_3, 0);
} }
} }
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
chrp_pci_fixup_winbond_ata); chrp_pci_fixup_winbond_ata);
/* Pegasos2 firmware version 20040810 configures the built-in IDE controller /* Pegasos2 firmware version 20040810 configures the built-in IDE controller
...@@ -345,7 +354,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, ...@@ -345,7 +354,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
* mode as well. The same fixup must be done to the class-code property in * mode as well. The same fixup must be done to the class-code property in
* the IDE node /pci@80000000/ide@C,1 * the IDE node /pci@80000000/ide@C,1
*/ */
static void chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide) static void __devinit chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide)
{ {
u8 progif; u8 progif;
struct pci_dev *viaisa; struct pci_dev *viaisa;
...@@ -366,4 +375,4 @@ static void chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide) ...@@ -366,4 +375,4 @@ static void chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide)
pci_dev_put(viaisa); pci_dev_put(viaisa);
} }
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, chrp_pci_fixup_vt8231_ata); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, chrp_pci_fixup_vt8231_ata);
...@@ -1243,15 +1243,22 @@ void pmac_pci_fixup_pciata(struct pci_dev* dev) ...@@ -1243,15 +1243,22 @@ void pmac_pci_fixup_pciata(struct pci_dev* dev)
good: good:
pci_read_config_byte(dev, PCI_CLASS_PROG, &progif); pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
if ((progif & 5) != 5) { if ((progif & 5) != 5) {
printk(KERN_INFO "Forcing PCI IDE into native mode: %s\n", printk(KERN_INFO "PCI: %s Forcing PCI IDE into native mode\n",
pci_name(dev)); pci_name(dev));
(void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5); (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) || if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
(progif & 5) != 5) (progif & 5) != 5)
printk(KERN_ERR "Rewrite of PROGIF failed !\n"); printk(KERN_ERR "Rewrite of PROGIF failed !\n");
else {
/* Clear IO BARs, they will be reassigned */
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_2, 0);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_3, 0);
}
} }
} }
DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pmac_pci_fixup_pciata); DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, pmac_pci_fixup_pciata);
#endif #endif
/* /*
......
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