Commit 6c288e1e authored by Tony Lindgren's avatar Tony Lindgren

Sync mach-omap2/irq.c with mainline

Remove now unncessary casts and use the same order for include files.
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent ca6bc50f
...@@ -13,9 +13,10 @@ ...@@ -13,9 +13,10 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/io.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <asm/mach/irq.h> #include <asm/mach/irq.h>
#include <linux/io.h>
/* selected INTC register offsets */ /* selected INTC register offsets */
...@@ -51,12 +52,12 @@ static struct omap_irq_bank { ...@@ -51,12 +52,12 @@ static struct omap_irq_bank {
static void intc_bank_write_reg(u32 val, struct omap_irq_bank *bank, u16 reg) static void intc_bank_write_reg(u32 val, struct omap_irq_bank *bank, u16 reg)
{ {
__raw_writel(val, (__force void __iomem *)(bank->base_reg + reg)); __raw_writel(val, bank->base_reg + reg);
} }
static u32 intc_bank_read_reg(struct omap_irq_bank *bank, u16 reg) static u32 intc_bank_read_reg(struct omap_irq_bank *bank, u16 reg)
{ {
return __raw_readl((__force void __iomem *)(bank->base_reg + reg)); return __raw_readl(bank->base_reg + reg);
} }
/* XXX: FIQ and additional INTC support (only MPU at the moment) */ /* XXX: FIQ and additional INTC support (only MPU at the moment) */
......
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