Add support for the Xenon state saving/restoring

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

arch/arm/kernel/asm-offsets.c

@@ -57,6 +57,9 @@ int main(void)
   DEFINE(TI_TP_VALUE,		offsetof(struct thread_info, tp_value));
   DEFINE(TI_FPSTATE,		offsetof(struct thread_info, fpstate));
   DEFINE(TI_VFPSTATE,		offsetof(struct thread_info, vfpstate));
+#ifdef CONFIG_ARM_XENON
+  DEFINE(TI_XENONSTATE,		offsetof(struct thread_info, xenonstate));
+#endif
 #ifdef CONFIG_IWMMXT
   DEFINE(TI_IWMMXT_STATE,	offsetof(struct thread_info, fpstate.iwmmxt));
 #endif

arch/arm/kernel/entry-armv.S

@@ -560,6 +560,12 @@ ENTRY(__switch_to)
 	add	ip, r1, #TI_CPU_SAVE
 	ldr	r3, [r2, #TI_TP_VALUE]
 	stmia	ip!, {r4 - sl, fp, sp, lr}	@ Store most regs on stack
+#ifdef CONFIG_ARM_XENON
+	mrc	p14, 6, r4, c1, c0, 0		@ current xenon state
+	ldr	r5, [r2, #TI_XENONSTATE]	@ value to restore
+	str	r4, [r1, #TI_XENONSTATE]	@ save current
+	mcr	p14, 6, r5, c1, c0, 0		@ restore new value
+#endif
 #ifndef CONFIG_MMU
 	add	r2, r2, #TI_CPU_DOMAIN
 #else

arch/arm/mm/Kconfig

@@ -413,6 +413,13 @@ config ARM_THUMB
 
 	  If you don't know what this all is, saying Y is a safe choice.
 
+config ARM_XENON
+	bool "Enable Xenon extension"
+	depends on CPU_V7
+	help
+	  Say Y here if you have a CPU with Xenon extension and code to make
+	  use of it. Say N for code that can run on CPUs without Xenon.
+
 config CPU_BIG_ENDIAN
 	bool "Build big-endian kernel"
 	depends on ARCH_SUPPORTS_BIG_ENDIAN

include/asm-arm/thread_info.h

@@ -61,6 +61,9 @@ struct thread_info {
 	unsigned long		tp_value;
 	union fp_state		fpstate __attribute__((aligned(8)));
 	union vfp_state		vfpstate;
+#ifdef CONFIG_ARM_XENON
+	unsigned long		xenonstate;	/* Jazelle-X handler base register */
+#endif
 	struct restart_block	restart_block;
 };