[ARM] omap: make sure virtual mmio addresses are __iomem pointer-like

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

arch/arm/plat-omap/include/mach/fpga.h

@@ -34,7 +34,7 @@ extern void omap1510_fpga_init_irq(void);
  * ---------------------------------------------------------------------------
  */
 /* maps in the FPGA registers and the ETHR registers */
-#define H2P2_DBG_FPGA_BASE		0xE8000000	/* VA */
+#define H2P2_DBG_FPGA_BASE		((void __iomem *)0xE8000000)	/* VA */
 #define H2P2_DBG_FPGA_SIZE		SZ_4K				/* SIZE */
 #define H2P2_DBG_FPGA_START		0x04000000			/* PA */
 
@@ -85,9 +85,9 @@ struct h2p2_dbg_fpga {
  *  OMAP-1510 FPGA
  * ---------------------------------------------------------------------------
  */
-#define OMAP1510_FPGA_BASE			0xE8000000	/* Virtual */
+#define OMAP1510_FPGA_BASE		((void __iomem *)0xE8000000)	/* VA */
 #define OMAP1510_FPGA_SIZE		SZ_4K
-#define OMAP1510_FPGA_START			0x08000000	/* Physical */
+#define OMAP1510_FPGA_START		0x08000000			/* PA */
 
 /* Revision */
 #define OMAP1510_FPGA_REV_LOW			(OMAP1510_FPGA_BASE + 0x0)

arch/arm/plat-omap/include/mach/hardware.h

@@ -89,7 +89,7 @@
 #define DPLL_CTL		(0xfffecf00)
 
 /* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
-#define DSP_CONFIG_REG_BASE     (0xe1008000)
+#define DSP_CONFIG_REG_BASE     ((void __iomem *)0xe1008000)
 #define DSP_CKCTL		(DSP_CONFIG_REG_BASE + 0x0)
 #define DSP_IDLECT1		(DSP_CONFIG_REG_BASE + 0x4)
 #define DSP_IDLECT2		(DSP_CONFIG_REG_BASE + 0x8)