Commit 5f30f1fb authored by Thomas Gleixner's avatar Thomas Gleixner

Merge branch 'rt/irq' into rt/base

parents a277055e 9135967b
...@@ -381,8 +381,9 @@ static int xscale_pmu_start(void) ...@@ -381,8 +381,9 @@ static int xscale_pmu_start(void)
{ {
int ret; int ret;
u32 pmnc = read_pmnc(); u32 pmnc = read_pmnc();
unsigned long irq_flags = IRQF_DISABLED | IRQF_NODELAY;
ret = request_irq(XSCALE_PMU_IRQ, xscale_pmu_interrupt, IRQF_DISABLED, ret = request_irq(XSCALE_PMU_IRQ, xscale_pmu_interrupt, irq_flags,
"XScale PMU", (void *)results); "XScale PMU", (void *)results);
if (ret < 0) { if (ret < 0) {
......
...@@ -72,6 +72,7 @@ static irqreturn_t math_error_irq(int cpl, void *dev_id) ...@@ -72,6 +72,7 @@ static irqreturn_t math_error_irq(int cpl, void *dev_id)
static struct irqaction fpu_irq = { static struct irqaction fpu_irq = {
.handler = math_error_irq, .handler = math_error_irq,
.name = "fpu", .name = "fpu",
.flags = IRQF_NODELAY,
}; };
#endif #endif
...@@ -81,6 +82,7 @@ static struct irqaction fpu_irq = { ...@@ -81,6 +82,7 @@ static struct irqaction fpu_irq = {
static struct irqaction irq2 = { static struct irqaction irq2 = {
.handler = no_action, .handler = no_action,
.name = "cascade", .name = "cascade",
.flags = IRQF_NODELAY,
}; };
DEFINE_PER_CPU(vector_irq_t, vector_irq) = { DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
......
...@@ -643,11 +643,13 @@ out_unlock: ...@@ -643,11 +643,13 @@ out_unlock:
static struct irqaction master_action = { static struct irqaction master_action = {
.handler = piix4_master_intr, .handler = piix4_master_intr,
.name = "PIIX4-8259", .name = "PIIX4-8259",
.flags = IRQF_NODELAY,
}; };
static struct irqaction cascade_action = { static struct irqaction cascade_action = {
.handler = no_action, .handler = no_action,
.name = "cascade", .name = "cascade",
.flags = IRQF_NODELAY,
}; };
......
...@@ -50,15 +50,19 @@ ...@@ -50,15 +50,19 @@
* IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is * IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is
* registered first in an shared interrupt is considered for * registered first in an shared interrupt is considered for
* performance reasons) * performance reasons)
* IRQF_NODELAY - Interrupt is not force threaded
*/ */
#define IRQF_DISABLED 0x00000020 #define IRQF_DISABLED 0x00000020
#define IRQF_SAMPLE_RANDOM 0x00000040 #define IRQF_SAMPLE_RANDOM 0x00000040
#define IRQF_SHARED 0x00000080 #define IRQF_SHARED 0x00000080
#define IRQF_PROBE_SHARED 0x00000100 #define IRQF_PROBE_SHARED 0x00000100
#define IRQF_TIMER 0x00000200 #define __IRQF_TIMER 0x00000200
#define IRQF_PERCPU 0x00000400 #define IRQF_PERCPU 0x00000400
#define IRQF_NOBALANCING 0x00000800 #define IRQF_NOBALANCING 0x00000800
#define IRQF_IRQPOLL 0x00001000 #define IRQF_IRQPOLL 0x00001000
#define IRQF_NODELAY 0x00002000
#define IRQF_TIMER (__IRQF_TIMER | IRQF_NODELAY)
/* /*
* Bits used by threaded handlers: * Bits used by threaded handlers:
......
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