Commit 5ee613b6 authored by Ingo Molnar's avatar Ingo Molnar

x86: idle wakeup event in the HLT loop

do a proper idle-wakeup event on HLT as well - some CPUs stop the TSC
in HLT too, not just when going through the ACPI methods.

(the ACPI idle code already does this.)

[ update the 64-bit side too, as noticed by Jiri Slaby. ]
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 53d517cd
...@@ -113,9 +113,18 @@ void default_idle(void) ...@@ -113,9 +113,18 @@ void default_idle(void)
smp_mb(); smp_mb();
local_irq_disable(); local_irq_disable();
if (!need_resched()) if (!need_resched()) {
ktime_t t0, t1;
u64 t0n, t1n;
t0 = ktime_get();
t0n = ktime_to_ns(t0);
safe_halt(); /* enables interrupts racelessly */ safe_halt(); /* enables interrupts racelessly */
else local_irq_disable();
t1 = ktime_get();
t1n = ktime_to_ns(t1);
sched_clock_idle_wakeup_event(t1n - t0n);
}
local_irq_enable(); local_irq_enable();
current_thread_info()->status |= TS_POLLING; current_thread_info()->status |= TS_POLLING;
} else { } else {
......
...@@ -116,9 +116,16 @@ static void default_idle(void) ...@@ -116,9 +116,16 @@ static void default_idle(void)
smp_mb(); smp_mb();
local_irq_disable(); local_irq_disable();
if (!need_resched()) { if (!need_resched()) {
/* Enables interrupts one instruction before HLT. ktime_t t0, t1;
x86 special cases this so there is no race. */ u64 t0n, t1n;
safe_halt();
t0 = ktime_get();
t0n = ktime_to_ns(t0);
safe_halt(); /* enables interrupts racelessly */
local_irq_disable();
t1 = ktime_get();
t1n = ktime_to_ns(t1);
sched_clock_idle_wakeup_event(t1n - t0n);
} else } else
local_irq_enable(); local_irq_enable();
current_thread_info()->status |= TS_POLLING; current_thread_info()->status |= TS_POLLING;
......
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