Commit 5d418355 authored by Catalin Marinas's avatar Catalin Marinas

Add the ARM specific barriers

There are three barriers - ISB, DMB and DSB for different
scenarious. This patch adds their definitions in the system.h file.
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 86306145
...@@ -193,11 +193,19 @@ extern unsigned int user_debug; ...@@ -193,11 +193,19 @@ extern unsigned int user_debug;
#endif #endif
#if __LINUX_ARM_ARCH__ >= 6 #if __LINUX_ARM_ARCH__ >= 6
#define mb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ #define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
: : "r" (0) : "memory")
#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
: : "r" (0) : "memory")
#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
: : "r" (0) : "memory") : : "r" (0) : "memory")
#else #else
#define mb() __asm__ __volatile__ ("" : : : "memory") #define isb() __asm__ __volatile__ ("" : : : "memory")
#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
: : "r" (0) : "memory")
#define dmb() __asm__ __volatile__ ("" : : : "memory")
#endif #endif
#define mb() dmb()
#define rmb() mb() #define rmb() mb()
#define wmb() mb() #define wmb() mb()
#define read_barrier_depends() do { } while(0) #define read_barrier_depends() do { } while(0)
......
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