Commit 59abbd1e authored by David S. Miller's avatar David S. Miller

sparc64: Initial hw perf counter support.

Only supports one simple counter and only UltraSPARC-IIIi chips.
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5686f9c3
......@@ -7,4 +7,7 @@ extern void nmi_adjust_hz(unsigned int new_hz);
extern atomic_t nmi_active;
extern void start_nmi_watchdog(void *unused);
extern void stop_nmi_watchdog(void *unused);
#endif /* __NMI_H */
......@@ -5,4 +5,10 @@ extern void set_perf_counter_pending(void);
#define PERF_COUNTER_INDEX_OFFSET 0
#ifdef CONFIG_PERF_COUNTERS
extern void init_hw_perf_counters(void);
#else
static inline void init_hw_perf_counters(void) { }
#endif
#endif
......@@ -103,3 +103,6 @@ obj-$(CONFIG_SUN_LDOMS) += ldc.o vio.o viohs.o ds.o
obj-$(CONFIG_AUDIT) += audit.o
audit--$(CONFIG_AUDIT) := compat_audit.o
obj-$(CONFIG_COMPAT) += $(audit--y)
pc--$(CONFIG_PERF_COUNTERS) := perf_counter.o
obj-$(CONFIG_SPARC64) += $(pc--y)
......@@ -19,6 +19,7 @@
#include <linux/delay.h>
#include <linux/smp.h>
#include <asm/perf_counter.h>
#include <asm/ptrace.h>
#include <asm/local.h>
#include <asm/pcr.h>
......@@ -156,7 +157,7 @@ static void report_broken_nmi(int cpu, int *prev_nmi_count)
atomic_dec(&nmi_active);
}
static void stop_nmi_watchdog(void *unused)
void stop_nmi_watchdog(void *unused)
{
pcr_ops->write(PCR_PIC_PRIV);
__get_cpu_var(wd_enabled) = 0;
......@@ -210,7 +211,7 @@ error:
return err;
}
static void start_nmi_watchdog(void *unused)
void start_nmi_watchdog(void *unused)
{
__get_cpu_var(wd_enabled) = 1;
atomic_inc(&nmi_active);
......@@ -263,6 +264,9 @@ int __init nmi_init(void)
atomic_set(&nmi_active, -1);
}
}
if (!err)
init_hw_perf_counters();
return err;
}
......
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