Remove various references to the paging system and TLBs

There shouldn't be any references to paging or TLBs in the MMU-less
case.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

arch/arm/kernel/process.c

@@ -79,12 +79,14 @@ void arm_machine_restart(char mode)
 	 */
 	cpu_proc_fin();
 
+#ifdef CONFIG_MMU
 	/*
 	 * Tell the mm system that we are going to reboot -
 	 * we may need it to insert some 1:1 mappings so that
 	 * soft boot works.
 	 */
 	setup_mm_for_reboot(mode);
+#endif
 
 	/*
 	 * Now call the architecture specific reboot code.

arch/arm/mm/mm.h

 /* the upper-most page table pointer */
+#ifdef CONFIG_MMU
 extern pmd_t *top_pmd;
 
 #define TOP_PTE(x)	pte_offset_kernel(top_pmd, x)
@@ -12,6 +13,7 @@ static inline pmd_t *pmd_off_k(unsigned long virt)
 {
 	return pmd_off(pgd_offset_k(virt), virt);
 }
+#endif
 
 struct map_desc;
 struct meminfo;

arch/arm/mm/proc-syms.c

@@ -31,12 +31,14 @@ EXPORT_SYMBOL(__cpuc_coherent_kern_range);
 EXPORT_SYMBOL(cpu_cache);
 #endif
 
+#ifdef CONFIG_MMU
 #ifndef MULTI_USER
 EXPORT_SYMBOL(__cpu_clear_user_page);
 EXPORT_SYMBOL(__cpu_copy_user_page);
 #else
 EXPORT_SYMBOL(cpu_user);
 #endif
+#endif
 
 /*
  * No module should need to touch the TLB (and currently

include/asm-arm/io.h

@@ -263,9 +263,11 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
 #define BIOVEC_MERGEABLE(vec1, vec2)	\
 	((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2)))
 
+#ifdef CONFIG_MMU
 #define ARCH_HAS_VALID_PHYS_ADDR_RANGE
 extern int valid_phys_addr_range(unsigned long addr, size_t size);
 extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
+#endif
 
 /*
  * Convert a physical pointer to a virtual kernel pointer for /dev/mem

include/asm-arm/procinfo.h

@@ -37,7 +37,9 @@ struct proc_info_list {
 	unsigned int		elf_hwcap;
 	const char		*cpu_name;
 	struct processor	*proc;
+#ifdef CONFIG_MMU
 	struct cpu_tlb_fns	*tlb;
+#endif
 	struct cpu_user_fns	*user;
 	struct cpu_cache_fns	*cache;
 };