Commit 3eeebf17 authored by Paul Mundt's avatar Paul Mundt

sh: Kill off long-dead HD64465 cchip support.

This code has been dead for many years. The last update it received
was in 2003 in order to update it for the driver model changes, though
it had already been in disarray and unused before that point. The only
boards that ever used this chip have not had users in many years either,
so it is finally safe to just kill it off and move on with life.
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 5ff0594e
...@@ -47,9 +47,7 @@ Next, for companion chips: ...@@ -47,9 +47,7 @@ Next, for companion chips:
`-- sh `-- sh
`-- cchips `-- cchips
`-- hd6446x `-- hd6446x
|-- hd64461 `-- hd64461
| `-- cchip-specific files
`-- hd64465
`-- cchip-specific files `-- cchip-specific files
... and so on. Headers for the companion chips are treated the same way as ... and so on. Headers for the companion chips are treated the same way as
......
...@@ -22,20 +22,6 @@ config HD64461 ...@@ -22,20 +22,6 @@ config HD64461
Say Y if you want support for the HD64461. Say Y if you want support for the HD64461.
Otherwise, say N. Otherwise, say N.
config HD64465
bool "Hitachi HD64465 companion chip support"
---help---
The Hitachi HD64465 provides an interface for
the SH7750 CPU, supporting a LCD controller,
CRT color controller, IrDA, USB, PCMCIA,
keyboard controller, and a printer interface.
More information is available at
<http://global.hitachi.com/New/cnews/E/1998/981019B.html>.
Say Y if you want support for the HD64465.
Otherwise, say N.
endchoice endchoice
# These will also be split into the Kconfig's below # These will also be split into the Kconfig's below
...@@ -61,23 +47,4 @@ config HD64461_ENABLER ...@@ -61,23 +47,4 @@ config HD64461_ENABLER
via the HD64461 companion chip. via the HD64461 companion chip.
Otherwise, say N. Otherwise, say N.
config HD64465_IOBASE
hex "HD64465 start address"
depends on HD64465
default "0xb0000000"
help
The default setting of the HD64465 IO base address is 0xb0000000.
Do not change this unless you know what you are doing.
config HD64465_IRQ
int "HD64465 IRQ"
depends on HD64465
default "5"
help
The default setting of the HD64465 IRQ is 5.
Do not change this unless you know what you are doing.
endmenu endmenu
obj-$(CONFIG_HD64461) += hd64461.o obj-$(CONFIG_HD64461) += hd64461.o
obj-$(CONFIG_HD64465) += hd64465/
EXTRA_CFLAGS += -Werror EXTRA_CFLAGS += -Werror
#
# Makefile for the HD64465
#
obj-y := setup.o io.o gpio.o
/*
* $Id: gpio.c,v 1.4 2003/05/19 22:24:18 lethal Exp $
* by Greg Banks <gbanks@pocketpenguins.com>
* (c) 2000 PocketPenguins Inc
*
* GPIO pin support for HD64465 companion chip.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <asm/io.h>
#include <asm/hd64465/gpio.h>
#define _PORTOF(portpin) (((portpin)>>3)&0x7)
#define _PINOF(portpin) ((portpin)&0x7)
/* Register addresses parametrised on port */
#define GPIO_CR(port) (HD64465_REG_GPACR+((port)<<1))
#define GPIO_DR(port) (HD64465_REG_GPADR+((port)<<1))
#define GPIO_ICR(port) (HD64465_REG_GPAICR+((port)<<1))
#define GPIO_ISR(port) (HD64465_REG_GPAISR+((port)<<1))
#define GPIO_NPORTS 5
#define MODNAME "hd64465_gpio"
EXPORT_SYMBOL(hd64465_gpio_configure);
EXPORT_SYMBOL(hd64465_gpio_get_pin);
EXPORT_SYMBOL(hd64465_gpio_get_port);
EXPORT_SYMBOL(hd64465_gpio_register_irq);
EXPORT_SYMBOL(hd64465_gpio_set_pin);
EXPORT_SYMBOL(hd64465_gpio_set_port);
EXPORT_SYMBOL(hd64465_gpio_unregister_irq);
/* TODO: each port should be protected with a spinlock */
void hd64465_gpio_configure(int portpin, int direction)
{
unsigned short cr;
unsigned int shift = (_PINOF(portpin)<<1);
cr = inw(GPIO_CR(_PORTOF(portpin)));
cr &= ~(3<<shift);
cr |= direction<<shift;
outw(cr, GPIO_CR(_PORTOF(portpin)));
}
void hd64465_gpio_set_pin(int portpin, unsigned int value)
{
unsigned short d;
unsigned short mask = 1<<(_PINOF(portpin));
d = inw(GPIO_DR(_PORTOF(portpin)));
if (value)
d |= mask;
else
d &= ~mask;
outw(d, GPIO_DR(_PORTOF(portpin)));
}
unsigned int hd64465_gpio_get_pin(int portpin)
{
return inw(GPIO_DR(_PORTOF(portpin))) & (1<<(_PINOF(portpin)));
}
/* TODO: for cleaner atomicity semantics, add a mask to this routine */
void hd64465_gpio_set_port(int port, unsigned int value)
{
outw(value, GPIO_DR(port));
}
unsigned int hd64465_gpio_get_port(int port)
{
return inw(GPIO_DR(port));
}
static struct {
void (*func)(int portpin, void *dev);
void *dev;
} handlers[GPIO_NPORTS * 8];
static irqreturn_t hd64465_gpio_interrupt(int irq, void *dev)
{
unsigned short port, pin, isr, mask, portpin;
for (port=0 ; port<GPIO_NPORTS ; port++) {
isr = inw(GPIO_ISR(port));
for (pin=0 ; pin<8 ; pin++) {
mask = 1<<pin;
if (isr & mask) {
portpin = (port<<3)|pin;
if (handlers[portpin].func != 0)
handlers[portpin].func(portpin, handlers[portpin].dev);
else
printk(KERN_NOTICE "unexpected GPIO interrupt, pin %c%d\n",
port+'A', (int)pin);
}
}
/* Write 1s back to ISR to clear it? That's what the manual says.. */
outw(isr, GPIO_ISR(port));
}
return IRQ_HANDLED;
}
void hd64465_gpio_register_irq(int portpin, int mode,
void (*handler)(int portpin, void *dev), void *dev)
{
unsigned long flags;
unsigned short icr, mask;
if (handler == 0)
return;
local_irq_save(flags);
handlers[portpin].func = handler;
handlers[portpin].dev = dev;
/*
* Configure Interrupt Control Register
*/
icr = inw(GPIO_ICR(_PORTOF(portpin)));
mask = (1<<_PINOF(portpin));
/* unmask interrupt */
icr &= ~mask;
/* set TS bit */
mask <<= 8;
icr &= ~mask;
if (mode == HD64465_GPIO_RISING)
icr |= mask;
outw(icr, GPIO_ICR(_PORTOF(portpin)));
local_irq_restore(flags);
}
void hd64465_gpio_unregister_irq(int portpin)
{
unsigned long flags;
unsigned short icr;
local_irq_save(flags);
/*
* Configure Interrupt Control Register
*/
icr = inw(GPIO_ICR(_PORTOF(portpin)));
icr |= (1<<_PINOF(portpin)); /* mask interrupt */
outw(icr, GPIO_ICR(_PORTOF(portpin)));
handlers[portpin].func = 0;
handlers[portpin].dev = 0;
local_irq_restore(flags);
}
static int __init hd64465_gpio_init(void)
{
if (!request_region(HD64465_REG_GPACR, 0x1000, MODNAME))
return -EBUSY;
if (request_irq(HD64465_IRQ_GPIO, hd64465_gpio_interrupt,
IRQF_DISABLED, MODNAME, 0))
goto out_irqfailed;
printk("HD64465 GPIO layer on irq %d\n", HD64465_IRQ_GPIO);
return 0;
out_irqfailed:
release_region(HD64465_REG_GPACR, 0x1000);
return -EINVAL;
}
static void __exit hd64465_gpio_exit(void)
{
release_region(HD64465_REG_GPACR, 0x1000);
free_irq(HD64465_IRQ_GPIO, 0);
}
module_init(hd64465_gpio_init);
module_exit(hd64465_gpio_exit);
MODULE_LICENSE("GPL");
/*
* $Id: io.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
* by Greg Banks <gbanks@pocketpenguins.com>
* (c) 2000 PocketPenguins Inc
*
* Derived from io_hd64461.c, which bore the message:
* Copyright (C) 2000 YAEGASHI Takeshi
*
* Typical I/O routines for HD64465 system.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <asm/io.h>
#include <asm/hd64465/hd64465.h>
#define HD64465_DEBUG 0
#if HD64465_DEBUG
#define DPRINTK(args...) printk(args)
#define DIPRINTK(n, args...) if (hd64465_io_debug>(n)) printk(args)
#else
#define DPRINTK(args...)
#define DIPRINTK(n, args...)
#endif
/* This is a hack suitable only for debugging IO port problems */
int hd64465_io_debug;
EXPORT_SYMBOL(hd64465_io_debug);
/* Low iomap maps port 0-1K to addresses in 8byte chunks */
#define HD64465_IOMAP_LO_THRESH 0x400
#define HD64465_IOMAP_LO_SHIFT 3
#define HD64465_IOMAP_LO_MASK ((1<<HD64465_IOMAP_LO_SHIFT)-1)
#define HD64465_IOMAP_LO_NMAP (HD64465_IOMAP_LO_THRESH>>HD64465_IOMAP_LO_SHIFT)
static unsigned long hd64465_iomap_lo[HD64465_IOMAP_LO_NMAP];
static unsigned char hd64465_iomap_lo_shift[HD64465_IOMAP_LO_NMAP];
/* High iomap maps port 1K-64K to addresses in 1K chunks */
#define HD64465_IOMAP_HI_THRESH 0x10000
#define HD64465_IOMAP_HI_SHIFT 10
#define HD64465_IOMAP_HI_MASK ((1<<HD64465_IOMAP_HI_SHIFT)-1)
#define HD64465_IOMAP_HI_NMAP (HD64465_IOMAP_HI_THRESH>>HD64465_IOMAP_HI_SHIFT)
static unsigned long hd64465_iomap_hi[HD64465_IOMAP_HI_NMAP];
static unsigned char hd64465_iomap_hi_shift[HD64465_IOMAP_HI_NMAP];
#define PORT2ADDR(x) (sh_mv.mv_isa_port2addr(x))
void hd64465_port_map(unsigned short baseport, unsigned int nports,
unsigned long addr, unsigned char shift)
{
unsigned int port, endport = baseport + nports;
DPRINTK("hd64465_port_map(base=0x%04hx, n=0x%04hx, addr=0x%08lx,endport=0x%04x)\n",
baseport, nports, addr,endport);
for (port = baseport ;
port < endport && port < HD64465_IOMAP_LO_THRESH ;
port += (1<<HD64465_IOMAP_LO_SHIFT)) {
DPRINTK(" maplo[0x%x] = 0x%08lx\n", port, addr);
hd64465_iomap_lo[port>>HD64465_IOMAP_LO_SHIFT] = addr;
hd64465_iomap_lo_shift[port>>HD64465_IOMAP_LO_SHIFT] = shift;
addr += (1<<(HD64465_IOMAP_LO_SHIFT));
}
for (port = max_t(unsigned int, baseport, HD64465_IOMAP_LO_THRESH);
port < endport && port < HD64465_IOMAP_HI_THRESH ;
port += (1<<HD64465_IOMAP_HI_SHIFT)) {
DPRINTK(" maphi[0x%x] = 0x%08lx\n", port, addr);
hd64465_iomap_hi[port>>HD64465_IOMAP_HI_SHIFT] = addr;
hd64465_iomap_hi_shift[port>>HD64465_IOMAP_HI_SHIFT] = shift;
addr += (1<<(HD64465_IOMAP_HI_SHIFT));
}
}
EXPORT_SYMBOL(hd64465_port_map);
void hd64465_port_unmap(unsigned short baseport, unsigned int nports)
{
unsigned int port, endport = baseport + nports;
DPRINTK("hd64465_port_unmap(base=0x%04hx, n=0x%04hx)\n",
baseport, nports);
for (port = baseport ;
port < endport && port < HD64465_IOMAP_LO_THRESH ;
port += (1<<HD64465_IOMAP_LO_SHIFT)) {
hd64465_iomap_lo[port>>HD64465_IOMAP_LO_SHIFT] = 0;
}
for (port = max_t(unsigned int, baseport, HD64465_IOMAP_LO_THRESH);
port < endport && port < HD64465_IOMAP_HI_THRESH ;
port += (1<<HD64465_IOMAP_HI_SHIFT)) {
hd64465_iomap_hi[port>>HD64465_IOMAP_HI_SHIFT] = 0;
}
}
EXPORT_SYMBOL(hd64465_port_unmap);
unsigned long hd64465_isa_port2addr(unsigned long port)
{
unsigned long addr = 0;
unsigned char shift;
/* handle remapping of low IO ports */
if (port < HD64465_IOMAP_LO_THRESH) {
addr = hd64465_iomap_lo[port >> HD64465_IOMAP_LO_SHIFT];
shift = hd64465_iomap_lo_shift[port >> HD64465_IOMAP_LO_SHIFT];
if (addr != 0)
addr += (port & HD64465_IOMAP_LO_MASK) << shift;
else
printk(KERN_NOTICE "io_hd64465: access to un-mapped port %lx\n", port);
} else if (port < HD64465_IOMAP_HI_THRESH) {
addr = hd64465_iomap_hi[port >> HD64465_IOMAP_HI_SHIFT];
shift = hd64465_iomap_hi_shift[port >> HD64465_IOMAP_HI_SHIFT];
if (addr != 0)
addr += (port & HD64465_IOMAP_HI_MASK) << shift;
else
printk(KERN_NOTICE "io_hd64465: access to un-mapped port %lx\n", port);
}
/* HD64465 internal devices (0xb0000000) */
else if (port < 0x20000)
addr = CONFIG_HD64465_IOBASE + port - 0x10000;
/* Whole physical address space (0xa0000000) */
else
addr = P2SEGADDR(port);
DIPRINTK(2, "PORT2ADDR(0x%08lx) = 0x%08lx\n", port, addr);
return addr;
}
static inline void delay(void)
{
ctrl_inw(0xa0000000);
}
unsigned char hd64465_inb(unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
unsigned long b = (addr == 0 ? 0 : *(volatile unsigned char*)addr);
DIPRINTK(0, "inb(%08lx) = %02x\n", addr, (unsigned)b);
return b;
}
unsigned char hd64465_inb_p(unsigned long port)
{
unsigned long v;
unsigned long addr = PORT2ADDR(port);
v = (addr == 0 ? 0 : *(volatile unsigned char*)addr);
delay();
DIPRINTK(0, "inb_p(%08lx) = %02x\n", addr, (unsigned)v);
return v;
}
unsigned short hd64465_inw(unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
unsigned long b = (addr == 0 ? 0 : *(volatile unsigned short*)addr);
DIPRINTK(0, "inw(%08lx) = %04lx\n", addr, b);
return b;
}
unsigned int hd64465_inl(unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
unsigned int b = (addr == 0 ? 0 : *(volatile unsigned long*)addr);
DIPRINTK(0, "inl(%08lx) = %08x\n", addr, b);
return b;
}
void hd64465_outb(unsigned char b, unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
DIPRINTK(0, "outb(%02x, %08lx)\n", (unsigned)b, addr);
if (addr != 0)
*(volatile unsigned char*)addr = b;
}
void hd64465_outb_p(unsigned char b, unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
DIPRINTK(0, "outb_p(%02x, %08lx)\n", (unsigned)b, addr);
if (addr != 0)
*(volatile unsigned char*)addr = b;
delay();
}
void hd64465_outw(unsigned short b, unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
DIPRINTK(0, "outw(%04x, %08lx)\n", (unsigned)b, addr);
if (addr != 0)
*(volatile unsigned short*)addr = b;
}
void hd64465_outl(unsigned int b, unsigned long port)
{
unsigned long addr = PORT2ADDR(port);
DIPRINTK(0, "outl(%08x, %08lx)\n", b, addr);
if (addr != 0)
*(volatile unsigned long*)addr = b;
}
/*
* $Id: setup.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
*
* Setup and IRQ handling code for the HD64465 companion chip.
* by Greg Banks <gbanks@pocketpenguins.com>
* Copyright (c) 2000 PocketPenguins Inc
*
* Derived from setup_hd64461.c which bore the message:
* Copyright (C) 2000 YAEGASHI Takeshi
*/
#include <linux/sched.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/hd64465/hd64465.h>
static void disable_hd64465_irq(unsigned int irq)
{
unsigned short nimr;
unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask);
nimr = inw(HD64465_REG_NIMR);
nimr |= mask;
outw(nimr, HD64465_REG_NIMR);
}
static void enable_hd64465_irq(unsigned int irq)
{
unsigned short nimr;
unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask);
nimr = inw(HD64465_REG_NIMR);
nimr &= ~mask;
outw(nimr, HD64465_REG_NIMR);
}
static void mask_and_ack_hd64465(unsigned int irq)
{
disable_hd64465_irq(irq);
}
static void end_hd64465_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_hd64465_irq(irq);
}
static unsigned int startup_hd64465_irq(unsigned int irq)
{
enable_hd64465_irq(irq);
return 0;
}
static void shutdown_hd64465_irq(unsigned int irq)
{
disable_hd64465_irq(irq);
}
static struct hw_interrupt_type hd64465_irq_type = {
.typename = "HD64465-IRQ",
.startup = startup_hd64465_irq,
.shutdown = shutdown_hd64465_irq,
.enable = enable_hd64465_irq,
.disable = disable_hd64465_irq,
.ack = mask_and_ack_hd64465,
.end = end_hd64465_irq,
};
static irqreturn_t hd64465_interrupt(int irq, void *dev_id)
{
printk(KERN_INFO
"HD64465: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
inw(HD64465_REG_NIRR), inw(HD64465_REG_NIMR));
return IRQ_NONE;
}
/*
* Support for a secondary IRQ demux step. This is necessary
* because the HD64465 presents a very thin interface to the
* PCMCIA bus; a lot of features (such as remapping interrupts)
* normally done in hardware by other PCMCIA host bridges is
* instead done in software.
*/
static struct {
int (*func)(int, void *);
void *dev;
} hd64465_demux[HD64465_IRQ_NUM];
void hd64465_register_irq_demux(int irq,
int (*demux)(int irq, void *dev), void *dev)
{
hd64465_demux[irq - HD64465_IRQ_BASE].func = demux;
hd64465_demux[irq - HD64465_IRQ_BASE].dev = dev;
}
EXPORT_SYMBOL(hd64465_register_irq_demux);
void hd64465_unregister_irq_demux(int irq)
{
hd64465_demux[irq - HD64465_IRQ_BASE].func = 0;
}
EXPORT_SYMBOL(hd64465_unregister_irq_demux);
int hd64465_irq_demux(int irq)
{
if (irq == CONFIG_HD64465_IRQ) {
unsigned short i, bit;
unsigned short nirr = inw(HD64465_REG_NIRR);
unsigned short nimr = inw(HD64465_REG_NIMR);
pr_debug("hd64465_irq_demux, nirr=%04x, nimr=%04x\n", nirr, nimr);
nirr &= ~nimr;
for (bit = 1, i = 0 ; i < HD64465_IRQ_NUM ; bit <<= 1, i++)
if (nirr & bit)
break;
if (i < HD64465_IRQ_NUM) {
irq = HD64465_IRQ_BASE + i;
if (hd64465_demux[i].func != 0)
irq = hd64465_demux[i].func(irq, hd64465_demux[i].dev);
}
}
return irq;
}
static struct irqaction irq0 = {
.handler = hd64465_interrupt,
.flags = IRQF_DISABLED,
.mask = CPU_MASK_NONE,
.name = "HD64465",
};
static int __init setup_hd64465(void)
{
int i;
unsigned short rev;
unsigned short smscr;
if (!MACH_HD64465)
return 0;
printk(KERN_INFO "HD64465 configured at 0x%x on irq %d(mapped into %d to %d)\n",
CONFIG_HD64465_IOBASE,
CONFIG_HD64465_IRQ,
HD64465_IRQ_BASE,
HD64465_IRQ_BASE+HD64465_IRQ_NUM-1);
if (inw(HD64465_REG_SDID) != HD64465_SDID) {
printk(KERN_ERR "HD64465 device ID not found, check base address\n");
}
rev = inw(HD64465_REG_SRR);
printk(KERN_INFO "HD64465 hardware revision %d.%d\n", (rev >> 8) & 0xff, rev & 0xff);
outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */
for (i = 0; i < HD64465_IRQ_NUM ; i++) {
irq_desc[HD64465_IRQ_BASE + i].chip = &hd64465_irq_type;
}
setup_irq(CONFIG_HD64465_IRQ, &irq0);
/* wake up the UART from STANDBY at this point */
smscr = inw(HD64465_REG_SMSCR);
outw(smscr & (~HD64465_SMSCR_UARTST), HD64465_REG_SMSCR);
/* remap IO ports for first ISA serial port to HD64465 UART */
hd64465_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
return 0;
}
module_init(setup_hd64465);
#ifndef _ASM_SH_HD64465_GPIO_
#define _ASM_SH_HD64465_GPIO_ 1
/*
* $Id: gpio.h,v 1.3 2003/05/04 19:30:14 lethal Exp $
*
* Hitachi HD64465 companion chip: General Purpose IO pins support.
* This layer enables other device drivers to configure GPIO
* pins, get and set their values, and register an interrupt
* routine for when input pins change in hardware.
*
* by Greg Banks <gbanks@pocketpenguins.com>
* (c) 2000 PocketPenguins Inc.
*/
#include <asm/hd64465.h>
/* Macro to construct a portpin number (used in all
* subsequent functions) from a port letter and a pin
* number, e.g. HD64465_GPIO_PORTPIN('A', 5).
*/
#define HD64465_GPIO_PORTPIN(port,pin) (((port)-'A')<<3|(pin))
/* Pin configuration constants for _configure() */
#define HD64465_GPIO_FUNCTION2 0 /* use the pin's *other* function */
#define HD64465_GPIO_OUT 1 /* output */
#define HD64465_GPIO_IN_PULLUP 2 /* input, pull-up MOS on */
#define HD64465_GPIO_IN 3 /* input */
/* Configure a pin's direction */
extern void hd64465_gpio_configure(int portpin, int direction);
/* Get, set value */
extern void hd64465_gpio_set_pin(int portpin, unsigned int value);
extern unsigned int hd64465_gpio_get_pin(int portpin);
extern void hd64465_gpio_set_port(int port, unsigned int value);
extern unsigned int hd64465_gpio_get_port(int port);
/* mode constants for _register_irq() */
#define HD64465_GPIO_FALLING 0
#define HD64465_GPIO_RISING 1
/* Interrupt on external value change */
extern void hd64465_gpio_register_irq(int portpin, int mode,
void (*handler)(int portpin, void *dev), void *dev);
extern void hd64465_gpio_unregister_irq(int portpin);
#endif /* _ASM_SH_HD64465_GPIO_ */
This diff is collapsed.
/*
* include/asm-sh/hd64465/io.h
*
* By Greg Banks <gbanks@pocketpenguins.com>
* (c) 2000 PocketPenguins Inc.
*
* Derived from io_hd64461.h, which bore the message:
* Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* IO functions for an HD64465 "Windows CE Intelligent Peripheral Controller".
*/
#ifndef _ASM_SH_IO_HD64465_H
#define _ASM_SH_IO_HD64465_H
extern unsigned char hd64465_inb(unsigned long port);
extern unsigned short hd64465_inw(unsigned long port);
extern unsigned int hd64465_inl(unsigned long port);
extern void hd64465_outb(unsigned char value, unsigned long port);
extern void hd64465_outw(unsigned short value, unsigned long port);
extern void hd64465_outl(unsigned int value, unsigned long port);
extern unsigned char hd64465_inb_p(unsigned long port);
extern void hd64465_outb_p(unsigned char value, unsigned long port);
extern unsigned long hd64465_isa_port2addr(unsigned long offset);
extern int hd64465_irq_demux(int irq);
/* Provision for generic secondary demux step -- used by PCMCIA code */
extern void hd64465_register_irq_demux(int irq,
int (*demux)(int irq, void *dev), void *dev);
extern void hd64465_unregister_irq_demux(int irq);
/* Set this variable to 1 to see port traffic */
extern int hd64465_io_debug;
/* Map a range of ports to a range of kernel virtual memory.
*/
extern void hd64465_port_map(unsigned short baseport, unsigned int nports,
unsigned long addr, unsigned char shift);
extern void hd64465_port_unmap(unsigned short baseport, unsigned int nports);
#endif /* _ASM_SH_IO_HD64465_H */
...@@ -7,8 +7,6 @@ ...@@ -7,8 +7,6 @@
#ifndef _ASM_SERIAL_H #ifndef _ASM_SERIAL_H
#define _ASM_SERIAL_H #define _ASM_SERIAL_H
#include <linux/kernel.h>
/* /*
* This assumes you have a 1.8432 MHz clock for your UART. * This assumes you have a 1.8432 MHz clock for your UART.
* *
...@@ -18,19 +16,4 @@ ...@@ -18,19 +16,4 @@
*/ */
#define BASE_BAUD ( 1843200 / 16 ) #define BASE_BAUD ( 1843200 / 16 )
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
#ifdef CONFIG_HD64465
#include <asm/hd64465/hd64465.h>
#define SERIAL_PORT_DFNS \
/* UART CLK PORT IRQ FLAGS */ \
{ 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */
#else
#define SERIAL_PORT_DFNS
#endif
#endif /* _ASM_SERIAL_H */ #endif /* _ASM_SERIAL_H */
...@@ -13,7 +13,6 @@ RTS7751R2D SH_RTS7751R2D ...@@ -13,7 +13,6 @@ RTS7751R2D SH_RTS7751R2D
# List of companion chips / MFDs. # List of companion chips / MFDs.
# #
HD64461 HD64461 HD64461 HD64461
HD64465 HD64465
# #
# List of boards. # List of boards.
......
...@@ -188,10 +188,6 @@ config PCMCIA_M8XX ...@@ -188,10 +188,6 @@ config PCMCIA_M8XX
This driver is also available as a module called m8xx_pcmcia. This driver is also available as a module called m8xx_pcmcia.
config HD64465_PCMCIA
tristate "HD64465 host bridge support"
depends on HD64465 && PCMCIA
config PCMCIA_AU1X00 config PCMCIA_AU1X00
tristate "Au1x00 pcmcia support" tristate "Au1x00 pcmcia support"
depends on SOC_AU1X00 && PCMCIA depends on SOC_AU1X00 && PCMCIA
......
...@@ -22,7 +22,6 @@ obj-$(CONFIG_I82365) += i82365.o ...@@ -22,7 +22,6 @@ obj-$(CONFIG_I82365) += i82365.o
obj-$(CONFIG_I82092) += i82092.o obj-$(CONFIG_I82092) += i82092.o
obj-$(CONFIG_TCIC) += tcic.o obj-$(CONFIG_TCIC) += tcic.o
obj-$(CONFIG_PCMCIA_M8XX) += m8xx_pcmcia.o obj-$(CONFIG_PCMCIA_M8XX) += m8xx_pcmcia.o
obj-$(CONFIG_HD64465_PCMCIA) += hd64465_ss.o
obj-$(CONFIG_PCMCIA_SA1100) += sa11xx_core.o sa1100_cs.o obj-$(CONFIG_PCMCIA_SA1100) += sa11xx_core.o sa1100_cs.o
obj-$(CONFIG_PCMCIA_SA1111) += sa11xx_core.o sa1111_cs.o obj-$(CONFIG_PCMCIA_SA1111) += sa11xx_core.o sa1111_cs.o
obj-$(CONFIG_M32R_PCC) += m32r_pcc.o obj-$(CONFIG_M32R_PCC) += m32r_pcc.o
......
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