Commit 3dbd10f3 authored by Hannes Reinecke's avatar Hannes Reinecke Committed by James Bottomley

[SCSI] aic7xxx: teach aicasm to not emit unused debug code/data

Add a 'count' variable to each symbol which gets increased every time
the symbol is referenced.  And then modify the register definition to
include counts for symbols which are referenced from the source code
only and not from the sequencer code.

This will give us an automatic usage count for the symbols with only
minimal hand-crafting.
Signed-off-by: default avatarJames Bottomley <James.Bottomley@HansenPartnership.com>
parent a198c3d0
This diff is collapsed.
...@@ -238,6 +238,7 @@ register SXFRCTL2 { ...@@ -238,6 +238,7 @@ register SXFRCTL2 {
register OPTIONMODE { register OPTIONMODE {
address 0x008 address 0x008
access_mode RW access_mode RW
count 2
field AUTORATEEN 0x80 field AUTORATEEN 0x80
field AUTOACKEN 0x40 field AUTOACKEN 0x40
field ATNMGMNTEN 0x20 field ATNMGMNTEN 0x20
...@@ -254,6 +255,7 @@ register TARGCRCCNT { ...@@ -254,6 +255,7 @@ register TARGCRCCNT {
address 0x00a address 0x00a
size 2 size 2
access_mode RW access_mode RW
count 2
} }
/* /*
...@@ -344,6 +346,7 @@ register SSTAT2 { ...@@ -344,6 +346,7 @@ register SSTAT2 {
register SSTAT3 { register SSTAT3 {
address 0x00e address 0x00e
access_mode RO access_mode RO
count 2
mask SCSICNT 0xf0 mask SCSICNT 0xf0
mask OFFCNT 0x0f mask OFFCNT 0x0f
mask U2OFFCNT 0x7f mask U2OFFCNT 0x7f
...@@ -367,6 +370,7 @@ register SCSIID_ULTRA2 { ...@@ -367,6 +370,7 @@ register SCSIID_ULTRA2 {
register SIMODE0 { register SIMODE0 {
address 0x010 address 0x010
access_mode RW access_mode RW
count 2
field ENSELDO 0x40 field ENSELDO 0x40
field ENSELDI 0x20 field ENSELDI 0x20
field ENSELINGO 0x10 field ENSELINGO 0x10
...@@ -429,6 +433,7 @@ register SHADDR { ...@@ -429,6 +433,7 @@ register SHADDR {
register SELTIMER { register SELTIMER {
address 0x018 address 0x018
access_mode RW access_mode RW
count 1
field STAGE6 0x20 field STAGE6 0x20
field STAGE5 0x10 field STAGE5 0x10
field STAGE4 0x08 field STAGE4 0x08
...@@ -467,6 +472,7 @@ register TARGID { ...@@ -467,6 +472,7 @@ register TARGID {
address 0x01b address 0x01b
size 2 size 2
access_mode RW access_mode RW
count 14
} }
/* /*
...@@ -480,6 +486,7 @@ register TARGID { ...@@ -480,6 +486,7 @@ register TARGID {
register SPIOCAP { register SPIOCAP {
address 0x01b address 0x01b
access_mode RW access_mode RW
count 10
field SOFT1 0x80 field SOFT1 0x80
field SOFT0 0x40 field SOFT0 0x40
field SOFTCMDEN 0x20 field SOFTCMDEN 0x20
...@@ -492,6 +499,7 @@ register SPIOCAP { ...@@ -492,6 +499,7 @@ register SPIOCAP {
register BRDCTL { register BRDCTL {
address 0x01d address 0x01d
count 11
field BRDDAT7 0x80 field BRDDAT7 0x80
field BRDDAT6 0x40 field BRDDAT6 0x40
field BRDDAT5 0x20 field BRDDAT5 0x20
...@@ -534,6 +542,7 @@ register BRDCTL { ...@@ -534,6 +542,7 @@ register BRDCTL {
*/ */
register SEECTL { register SEECTL {
address 0x01e address 0x01e
count 11
field EXTARBACK 0x80 field EXTARBACK 0x80
field EXTARBREQ 0x40 field EXTARBREQ 0x40
field SEEMS 0x20 field SEEMS 0x20
...@@ -570,6 +579,7 @@ register SBLKCTL { ...@@ -570,6 +579,7 @@ register SBLKCTL {
register SEQCTL { register SEQCTL {
address 0x060 address 0x060
access_mode RW access_mode RW
count 15
field PERRORDIS 0x80 field PERRORDIS 0x80
field PAUSEDIS 0x40 field PAUSEDIS 0x40
field FAILDIS 0x20 field FAILDIS 0x20
...@@ -590,6 +600,7 @@ register SEQCTL { ...@@ -590,6 +600,7 @@ register SEQCTL {
register SEQRAM { register SEQRAM {
address 0x061 address 0x061
access_mode RW access_mode RW
count 2
} }
/* /*
...@@ -604,6 +615,7 @@ register SEQADDR0 { ...@@ -604,6 +615,7 @@ register SEQADDR0 {
register SEQADDR1 { register SEQADDR1 {
address 0x063 address 0x063
access_mode RW access_mode RW
count 8
mask SEQADDR1_MASK 0x01 mask SEQADDR1_MASK 0x01
} }
...@@ -649,6 +661,7 @@ register NONE { ...@@ -649,6 +661,7 @@ register NONE {
register FLAGS { register FLAGS {
address 0x06b address 0x06b
access_mode RO access_mode RO
count 18
field ZERO 0x02 field ZERO 0x02
field CARRY 0x01 field CARRY 0x01
} }
...@@ -671,6 +684,7 @@ register FUNCTION1 { ...@@ -671,6 +684,7 @@ register FUNCTION1 {
register STACK { register STACK {
address 0x06f address 0x06f
access_mode RO access_mode RO
count 5
} }
const STACK_SIZE 4 const STACK_SIZE 4
...@@ -692,6 +706,7 @@ register BCTL { ...@@ -692,6 +706,7 @@ register BCTL {
register DSCOMMAND0 { register DSCOMMAND0 {
address 0x084 address 0x084
access_mode RW access_mode RW
count 7
field CACHETHEN 0x80 /* Cache Threshold enable */ field CACHETHEN 0x80 /* Cache Threshold enable */
field DPARCKEN 0x40 /* Data Parity Check Enable */ field DPARCKEN 0x40 /* Data Parity Check Enable */
field MPARCKEN 0x20 /* Memory Parity Check Enable */ field MPARCKEN 0x20 /* Memory Parity Check Enable */
...@@ -717,6 +732,7 @@ register DSCOMMAND1 { ...@@ -717,6 +732,7 @@ register DSCOMMAND1 {
register BUSTIME { register BUSTIME {
address 0x085 address 0x085
access_mode RW access_mode RW
count 2
mask BOFF 0xf0 mask BOFF 0xf0
mask BON 0x0f mask BON 0x0f
} }
...@@ -727,6 +743,7 @@ register BUSTIME { ...@@ -727,6 +743,7 @@ register BUSTIME {
register BUSSPD { register BUSSPD {
address 0x086 address 0x086
access_mode RW access_mode RW
count 2
mask DFTHRSH 0xc0 mask DFTHRSH 0xc0
mask STBOFF 0x38 mask STBOFF 0x38
mask STBON 0x07 mask STBON 0x07
...@@ -737,6 +754,7 @@ register BUSSPD { ...@@ -737,6 +754,7 @@ register BUSSPD {
/* aic7850/55/60/70/80/95 only */ /* aic7850/55/60/70/80/95 only */
register DSPCISTATUS { register DSPCISTATUS {
address 0x086 address 0x086
count 4
mask DFTHRSH_100 0xc0 mask DFTHRSH_100 0xc0
} }
...@@ -758,6 +776,7 @@ const SEQ_MAILBOX_SHIFT 0 ...@@ -758,6 +776,7 @@ const SEQ_MAILBOX_SHIFT 0
register HCNTRL { register HCNTRL {
address 0x087 address 0x087
access_mode RW access_mode RW
count 14
field POWRDN 0x40 field POWRDN 0x40
field SWINT 0x10 field SWINT 0x10
field IRQMS 0x08 field IRQMS 0x08
...@@ -869,6 +888,7 @@ register INTSTAT { ...@@ -869,6 +888,7 @@ register INTSTAT {
register ERROR { register ERROR {
address 0x092 address 0x092
access_mode RO access_mode RO
count 26
field CIOPARERR 0x80 /* Ultra2 only */ field CIOPARERR 0x80 /* Ultra2 only */
field PCIERRSTAT 0x40 /* PCI only */ field PCIERRSTAT 0x40 /* PCI only */
field MPARERR 0x20 /* PCI only */ field MPARERR 0x20 /* PCI only */
...@@ -885,6 +905,7 @@ register ERROR { ...@@ -885,6 +905,7 @@ register ERROR {
register CLRINT { register CLRINT {
address 0x092 address 0x092
access_mode WO access_mode WO
count 24
field CLRPARERR 0x10 /* PCI only */ field CLRPARERR 0x10 /* PCI only */
field CLRBRKADRINT 0x08 field CLRBRKADRINT 0x08
field CLRSCSIINT 0x04 field CLRSCSIINT 0x04
...@@ -943,6 +964,7 @@ register DFDAT { ...@@ -943,6 +964,7 @@ register DFDAT {
register SCBCNT { register SCBCNT {
address 0x09a address 0x09a
access_mode RW access_mode RW
count 1
field SCBAUTO 0x80 field SCBAUTO 0x80
mask SCBCNT_MASK 0x1f mask SCBCNT_MASK 0x1f
} }
...@@ -954,6 +976,7 @@ register SCBCNT { ...@@ -954,6 +976,7 @@ register SCBCNT {
register QINFIFO { register QINFIFO {
address 0x09b address 0x09b
access_mode RW access_mode RW
count 12
} }
/* /*
...@@ -972,11 +995,13 @@ register QINCNT { ...@@ -972,11 +995,13 @@ register QINCNT {
register QOUTFIFO { register QOUTFIFO {
address 0x09d address 0x09d
access_mode WO access_mode WO
count 7
} }
register CRCCONTROL1 { register CRCCONTROL1 {
address 0x09d address 0x09d
access_mode RW access_mode RW
count 3
field CRCONSEEN 0x80 field CRCONSEEN 0x80
field CRCVALCHKEN 0x40 field CRCVALCHKEN 0x40
field CRCENDCHKEN 0x20 field CRCENDCHKEN 0x20
...@@ -1013,6 +1038,7 @@ register SCSIPHASE { ...@@ -1013,6 +1038,7 @@ register SCSIPHASE {
register SFUNCT { register SFUNCT {
address 0x09f address 0x09f
access_mode RW access_mode RW
count 4
field ALT_MODE 0x80 field ALT_MODE 0x80
} }
...@@ -1095,6 +1121,7 @@ scb { ...@@ -1095,6 +1121,7 @@ scb {
} }
SCB_SCSIOFFSET { SCB_SCSIOFFSET {
size 1 size 1
count 1
} }
SCB_NEXT { SCB_NEXT {
size 1 size 1
...@@ -1118,6 +1145,7 @@ const SG_SIZEOF 0x08 /* sizeof(struct ahc_dma) */ ...@@ -1118,6 +1145,7 @@ const SG_SIZEOF 0x08 /* sizeof(struct ahc_dma) */
register SEECTL_2840 { register SEECTL_2840 {
address 0x0c0 address 0x0c0
access_mode RW access_mode RW
count 2
field CS_2840 0x04 field CS_2840 0x04
field CK_2840 0x02 field CK_2840 0x02
field DO_2840 0x01 field DO_2840 0x01
...@@ -1126,6 +1154,7 @@ register SEECTL_2840 { ...@@ -1126,6 +1154,7 @@ register SEECTL_2840 {
register STATUS_2840 { register STATUS_2840 {
address 0x0c1 address 0x0c1
access_mode RW access_mode RW
count 4
field EEPROM_TF 0x80 field EEPROM_TF 0x80
mask BIOS_SEL 0x60 mask BIOS_SEL 0x60
mask ADSEL 0x1e mask ADSEL 0x1e
...@@ -1161,6 +1190,7 @@ register CCSGCTL { ...@@ -1161,6 +1190,7 @@ register CCSGCTL {
register CCSCBCNT { register CCSCBCNT {
address 0xEF address 0xEF
count 1
} }
register CCSCBCTL { register CCSCBCTL {
...@@ -1187,6 +1217,7 @@ register CCSCBRAM { ...@@ -1187,6 +1217,7 @@ register CCSCBRAM {
register SCBBADDR { register SCBBADDR {
address 0x0F0 address 0x0F0
access_mode RW access_mode RW
count 3
} }
register CCSCBPTR { register CCSCBPTR {
...@@ -1195,6 +1226,7 @@ register CCSCBPTR { ...@@ -1195,6 +1226,7 @@ register CCSCBPTR {
register HNSCB_QOFF { register HNSCB_QOFF {
address 0x0F4 address 0x0F4
count 4
} }
register SNSCB_QOFF { register SNSCB_QOFF {
...@@ -1234,6 +1266,7 @@ register DFF_THRSH { ...@@ -1234,6 +1266,7 @@ register DFF_THRSH {
mask WR_DFTHRSH_85 0x50 mask WR_DFTHRSH_85 0x50
mask WR_DFTHRSH_90 0x60 mask WR_DFTHRSH_90 0x60
mask WR_DFTHRSH_MAX 0x70 mask WR_DFTHRSH_MAX 0x70
count 4
} }
register SG_CACHE_PRE { register SG_CACHE_PRE {
...@@ -1287,6 +1320,7 @@ scratch_ram { ...@@ -1287,6 +1320,7 @@ scratch_ram {
ULTRA_ENB { ULTRA_ENB {
alias CMDSIZE_TABLE alias CMDSIZE_TABLE
size 2 size 2
count 2
} }
/* /*
* Bit vector of targets that have disconnection disabled as set by * Bit vector of targets that have disconnection disabled as set by
...@@ -1296,6 +1330,7 @@ scratch_ram { ...@@ -1296,6 +1330,7 @@ scratch_ram {
*/ */
DISC_DSB { DISC_DSB {
size 2 size 2
count 6
} }
CMDSIZE_TABLE_TAIL { CMDSIZE_TABLE_TAIL {
size 4 size 4
...@@ -1323,6 +1358,7 @@ scratch_ram { ...@@ -1323,6 +1358,7 @@ scratch_ram {
/* Parameters for DMA Logic */ /* Parameters for DMA Logic */
DMAPARAMS { DMAPARAMS {
size 1 size 1
count 12
field PRELOADEN 0x80 field PRELOADEN 0x80
field WIDEODD 0x40 field WIDEODD 0x40
field SCSIEN 0x20 field SCSIEN 0x20
...@@ -1441,6 +1477,7 @@ scratch_ram { ...@@ -1441,6 +1477,7 @@ scratch_ram {
} }
ARG_1 { ARG_1 {
size 1 size 1
count 1
mask SEND_MSG 0x80 mask SEND_MSG 0x80
mask SEND_SENSE 0x40 mask SEND_SENSE 0x40
mask SEND_REJ 0x20 mask SEND_REJ 0x20
...@@ -1495,6 +1532,7 @@ scratch_ram { ...@@ -1495,6 +1532,7 @@ scratch_ram {
size 1 size 1
field HA_274_EXTENDED_TRANS 0x01 field HA_274_EXTENDED_TRANS 0x01
alias INITIATOR_TAG alias INITIATOR_TAG
count 1
} }
SEQ_FLAGS2 { SEQ_FLAGS2 {
...@@ -1518,6 +1556,7 @@ scratch_ram { ...@@ -1518,6 +1556,7 @@ scratch_ram {
*/ */
SCSICONF { SCSICONF {
size 1 size 1
count 12
field TERM_ENB 0x80 field TERM_ENB 0x80
field RESET_SCSI 0x40 field RESET_SCSI 0x40
field ENSPCHK 0x20 field ENSPCHK 0x20
...@@ -1527,16 +1566,19 @@ scratch_ram { ...@@ -1527,16 +1566,19 @@ scratch_ram {
INTDEF { INTDEF {
address 0x05c address 0x05c
size 1 size 1
count 1
field EDGE_TRIG 0x80 field EDGE_TRIG 0x80
mask VECTOR 0x0f mask VECTOR 0x0f
} }
HOSTCONF { HOSTCONF {
address 0x05d address 0x05d
size 1 size 1
count 1
} }
HA_274_BIOSCTRL { HA_274_BIOSCTRL {
address 0x05f address 0x05f
size 1 size 1
count 1
mask BIOSMODE 0x30 mask BIOSMODE 0x30
mask BIOSDISABLED 0x30 mask BIOSDISABLED 0x30
field CHANNEL_B_PRIMARY 0x08 field CHANNEL_B_PRIMARY 0x08
...@@ -1552,6 +1594,7 @@ scratch_ram { ...@@ -1552,6 +1594,7 @@ scratch_ram {
*/ */
TARG_OFFSET { TARG_OFFSET {
size 16 size 16
count 1
} }
} }
......
...@@ -362,7 +362,7 @@ output_code() ...@@ -362,7 +362,7 @@ output_code()
" *\n" " *\n"
"%s */\n", versions); "%s */\n", versions);
fprintf(ofile, "static uint8_t seqprog[] = {\n"); fprintf(ofile, "static const uint8_t seqprog[] = {\n");
for (cur_instr = STAILQ_FIRST(&seq_program); for (cur_instr = STAILQ_FIRST(&seq_program);
cur_instr != NULL; cur_instr != NULL;
cur_instr = STAILQ_NEXT(cur_instr, links)) { cur_instr = STAILQ_NEXT(cur_instr, links)) {
...@@ -415,7 +415,7 @@ output_code() ...@@ -415,7 +415,7 @@ output_code()
} }
fprintf(ofile, fprintf(ofile,
"static struct patch {\n" "static const struct patch {\n"
" %spatch_func_t *patch_func;\n" " %spatch_func_t *patch_func;\n"
" uint32_t begin :10,\n" " uint32_t begin :10,\n"
" skip_instr :10,\n" " skip_instr :10,\n"
...@@ -435,7 +435,7 @@ output_code() ...@@ -435,7 +435,7 @@ output_code()
fprintf(ofile, "\n};\n\n"); fprintf(ofile, "\n};\n\n");
fprintf(ofile, fprintf(ofile,
"static struct cs {\n" "static const struct cs {\n"
" uint16_t begin;\n" " uint16_t begin;\n"
" uint16_t end;\n" " uint16_t end;\n"
"} critical_sections[] = {\n"); "} critical_sections[] = {\n");
......
...@@ -143,6 +143,8 @@ void yyerror(const char *string); ...@@ -143,6 +143,8 @@ void yyerror(const char *string);
%token <value> T_ADDRESS %token <value> T_ADDRESS
%token T_COUNT
%token T_ACCESS_MODE %token T_ACCESS_MODE
%token T_MODES %token T_MODES
...@@ -353,6 +355,7 @@ reg_attribute_list: ...@@ -353,6 +355,7 @@ reg_attribute_list:
reg_attribute: reg_attribute:
reg_address reg_address
| size | size
| count
| access_mode | access_mode
| modes | modes
| field_defn | field_defn
...@@ -393,6 +396,13 @@ size: ...@@ -393,6 +396,13 @@ size:
} }
; ;
count:
T_COUNT T_NUMBER
{
cur_symbol->count += $2;
}
;
access_mode: access_mode:
T_ACCESS_MODE T_MODE T_ACCESS_MODE T_MODE
{ {
...@@ -801,6 +811,7 @@ scratch_ram: ...@@ -801,6 +811,7 @@ scratch_ram:
cur_symtype = SRAMLOC; cur_symtype = SRAMLOC;
cur_symbol->type = SRAMLOC; cur_symbol->type = SRAMLOC;
initialize_symbol(cur_symbol); initialize_symbol(cur_symbol);
cur_symbol->count += 1;
} }
reg_address reg_address
{ {
...@@ -832,6 +843,7 @@ scb: ...@@ -832,6 +843,7 @@ scb:
initialize_symbol(cur_symbol); initialize_symbol(cur_symbol);
/* 64 bytes of SCB space */ /* 64 bytes of SCB space */
cur_symbol->info.rinfo->size = 64; cur_symbol->info.rinfo->size = 64;
cur_symbol->count += 1;
} }
reg_address reg_address
{ {
......
...@@ -162,6 +162,7 @@ register { return T_REGISTER; } ...@@ -162,6 +162,7 @@ register { return T_REGISTER; }
const { yylval.value = FALSE; return T_CONST; } const { yylval.value = FALSE; return T_CONST; }
download { return T_DOWNLOAD; } download { return T_DOWNLOAD; }
address { return T_ADDRESS; } address { return T_ADDRESS; }
count { return T_COUNT; }
access_mode { return T_ACCESS_MODE; } access_mode { return T_ACCESS_MODE; }
modes { return T_MODES; } modes { return T_MODES; }
RW|RO|WO { RW|RO|WO {
......
...@@ -77,6 +77,7 @@ symbol_create(char *name) ...@@ -77,6 +77,7 @@ symbol_create(char *name)
if (new_symbol->name == NULL) if (new_symbol->name == NULL)
stop("Unable to strdup symbol name", EX_SOFTWARE); stop("Unable to strdup symbol name", EX_SOFTWARE);
new_symbol->type = UNINITIALIZED; new_symbol->type = UNINITIALIZED;
new_symbol->count = 1;
return (new_symbol); return (new_symbol);
} }
...@@ -198,6 +199,12 @@ symtable_get(char *name) ...@@ -198,6 +199,12 @@ symtable_get(char *name)
} }
} }
memcpy(&stored_ptr, data.data, sizeof(stored_ptr)); memcpy(&stored_ptr, data.data, sizeof(stored_ptr));
stored_ptr->count++;
data.data = &stored_ptr;
if (symtable->put(symtable, &key, &data, /*flags*/0) !=0) {
perror("Symtable put failed");
exit(EX_SOFTWARE);
}
return (stored_ptr); return (stored_ptr);
} }
...@@ -370,7 +377,7 @@ aic_print_reg_dump_start(FILE *dfile, symbol_node_t *regnode) ...@@ -370,7 +377,7 @@ aic_print_reg_dump_start(FILE *dfile, symbol_node_t *regnode)
return; return;
fprintf(dfile, fprintf(dfile,
"static %sreg_parse_entry_t %s_parse_table[] = {\n", "static const %sreg_parse_entry_t %s_parse_table[] = {\n",
prefix, prefix,
regnode->symbol->name); regnode->symbol->name);
} }
...@@ -472,6 +479,7 @@ symtable_dump(FILE *ofile, FILE *dfile) ...@@ -472,6 +479,7 @@ symtable_dump(FILE *ofile, FILE *dfile)
DBT key; DBT key;
DBT data; DBT data;
int flag; int flag;
int reg_count = 0, reg_used = 0;
u_int i; u_int i;
if (symtable == NULL) if (symtable == NULL)
...@@ -541,6 +549,9 @@ symtable_dump(FILE *ofile, FILE *dfile) ...@@ -541,6 +549,9 @@ symtable_dump(FILE *ofile, FILE *dfile)
int num_entries; int num_entries;
num_entries = 0; num_entries = 0;
reg_count++;
if (curnode->symbol->count == 1)
break;
fields = &curnode->symbol->info.rinfo->fields; fields = &curnode->symbol->info.rinfo->fields;
SLIST_FOREACH(fieldnode, fields, links) { SLIST_FOREACH(fieldnode, fields, links) {
if (num_entries == 0) if (num_entries == 0)
...@@ -553,11 +564,14 @@ symtable_dump(FILE *ofile, FILE *dfile) ...@@ -553,11 +564,14 @@ symtable_dump(FILE *ofile, FILE *dfile)
} }
aic_print_reg_dump_end(ofile, dfile, aic_print_reg_dump_end(ofile, dfile,
curnode, num_entries); curnode, num_entries);
reg_used++;
} }
default: default:
break; break;
} }
} }
fprintf(stderr, "%s: %d of %d register definitions used\n", appname,
reg_used, reg_count);
/* Fold in the masks and bits */ /* Fold in the masks and bits */
while (SLIST_FIRST(&masks) != NULL) { while (SLIST_FIRST(&masks) != NULL) {
...@@ -646,7 +660,6 @@ symtable_dump(FILE *ofile, FILE *dfile) ...@@ -646,7 +660,6 @@ symtable_dump(FILE *ofile, FILE *dfile)
free(curnode); free(curnode);
} }
fprintf(ofile, "\n\n/* Downloaded Constant Definitions */\n"); fprintf(ofile, "\n\n/* Downloaded Constant Definitions */\n");
for (i = 0; SLIST_FIRST(&download_constants) != NULL; i++) { for (i = 0; SLIST_FIRST(&download_constants) != NULL; i++) {
......
...@@ -128,6 +128,7 @@ typedef struct expression_info { ...@@ -128,6 +128,7 @@ typedef struct expression_info {
typedef struct symbol { typedef struct symbol {
char *name; char *name;
symtype type; symtype type;
int count;
union { union {
struct reg_info *rinfo; struct reg_info *rinfo;
struct field_info *finfo; struct field_info *finfo;
......
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