Commit 3c5639c6 authored by Bryan Wu's avatar Bryan Wu Committed by Tony Lindgren

MUSB: Coding style cleanup, kill all CPP style comments

Coding style cleanup, kill all CPP style comments
Signed-off-by: default avatarBryan Wu <bryan.wu@analog.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 8491be31
...@@ -401,7 +401,7 @@ cppi_dump_tx(int level, struct cppi_channel *c, const char *tag) ...@@ -401,7 +401,7 @@ cppi_dump_tx(int level, struct cppi_channel *c, const char *tag)
musb_readl(c->stateRam, 4 * 4), /* flags */ musb_readl(c->stateRam, 4 * 4), /* flags */
musb_readl(c->stateRam, 5 * 4), /* len */ musb_readl(c->stateRam, 5 * 4), /* len */
// dummy/unused word 6 /* dummy/unused word 6 */
musb_readl(c->stateRam, 7 * 4) /* completion */ musb_readl(c->stateRam, 7 * 4) /* completion */
); );
} }
...@@ -963,13 +963,13 @@ static int cppi_channel_program(struct dma_channel *pChannel, ...@@ -963,13 +963,13 @@ static int cppi_channel_program(struct dma_channel *pChannel,
WARN("%cX DMA%d not cleaned up after abort!\n", WARN("%cX DMA%d not cleaned up after abort!\n",
otgChannel->transmit ? 'T' : 'R', otgChannel->transmit ? 'T' : 'R',
otgChannel->chNo); otgChannel->chNo);
//WARN_ON(1); /* WARN_ON(1); */
break; break;
case MUSB_DMA_STATUS_BUSY: case MUSB_DMA_STATUS_BUSY:
WARN("program active channel? %cX DMA%d\n", WARN("program active channel? %cX DMA%d\n",
otgChannel->transmit ? 'T' : 'R', otgChannel->transmit ? 'T' : 'R',
otgChannel->chNo); otgChannel->chNo);
//WARN_ON(1); /* WARN_ON(1); */
break; break;
case MUSB_DMA_STATUS_UNKNOWN: case MUSB_DMA_STATUS_UNKNOWN:
DBG(1, "%cX DMA%d not allocated!\n", DBG(1, "%cX DMA%d not allocated!\n",
...@@ -1206,7 +1206,7 @@ void cppi_completion(struct musb *musb, u32 rx, u32 tx) ...@@ -1206,7 +1206,7 @@ void cppi_completion(struct musb *musb, u32 rx, u32 tx)
* *
* REVISIT have observed bit 18 set; huh?? * REVISIT have observed bit 18 set; huh??
*/ */
// if ((bdPtr->hOptions & CPPI_EOQ_MASK)) /* if ((bdPtr->hOptions & CPPI_EOQ_MASK)) */
txState->completionPtr = bdPtr->dma; txState->completionPtr = bdPtr->dma;
/* stop scanning on end-of-segment */ /* stop scanning on end-of-segment */
...@@ -1216,7 +1216,7 @@ void cppi_completion(struct musb *musb, u32 rx, u32 tx) ...@@ -1216,7 +1216,7 @@ void cppi_completion(struct musb *musb, u32 rx, u32 tx)
/* on end of segment, maybe go to next one */ /* on end of segment, maybe go to next one */
if (bReqComplete) { if (bReqComplete) {
//cppi_dump_tx(4, txChannel, "/complete"); /* cppi_dump_tx(4, txChannel, "/complete"); */
/* transfer more, or report completion */ /* transfer more, or report completion */
if (txChannel->currOffset if (txChannel->currOffset
...@@ -1416,7 +1416,7 @@ static int cppi_channel_abort(struct dma_channel *channel) ...@@ -1416,7 +1416,7 @@ static int cppi_channel_abort(struct dma_channel *channel)
musb_writel(regBase, DAVINCI_TXCPPI_INTCLR_REG, musb_writel(regBase, DAVINCI_TXCPPI_INTCLR_REG,
(1 << otgCh->chNo)); (1 << otgCh->chNo));
// REVISIT put timeouts on these controller handshakes /* REVISIT put timeouts on these controller handshakes */
cppi_dump_tx(6, otgCh, " (teardown)"); cppi_dump_tx(6, otgCh, " (teardown)");
......
...@@ -29,7 +29,7 @@ ...@@ -29,7 +29,7 @@
/* CPPI data structure definitions */ /* CPPI data structure definitions */
#define CPPI_DESCRIPTOR_ALIGN 16 // bytes; 5-dec docs say 4-byte align #define CPPI_DESCRIPTOR_ALIGN 16 /* bytes; 5-dec docs say 4-byte align */
struct cppi_descriptor { struct cppi_descriptor {
/* Hardware Overlay */ /* Hardware Overlay */
......
...@@ -530,7 +530,7 @@ static irqreturn_t musb_stage0_irq(struct musb * musb, u8 int_usb, ...@@ -530,7 +530,7 @@ static irqreturn_t musb_stage0_irq(struct musb * musb, u8 int_usb,
s = "<AValid"; break; s = "<AValid"; break;
case 2 << MUSB_DEVCTL_VBUS_SHIFT: case 2 << MUSB_DEVCTL_VBUS_SHIFT:
s = "<VBusValid"; break; s = "<VBusValid"; break;
//case 3 << MUSB_DEVCTL_VBUS_SHIFT: /* case 3 << MUSB_DEVCTL_VBUS_SHIFT: */
default: default:
s = "VALID"; break; s = "VALID"; break;
}; s; }), }; s; }),
...@@ -555,7 +555,7 @@ static irqreturn_t musb_stage0_irq(struct musb * musb, u8 int_usb, ...@@ -555,7 +555,7 @@ static irqreturn_t musb_stage0_irq(struct musb * musb, u8 int_usb,
#ifdef CONFIG_USB_MUSB_OTG #ifdef CONFIG_USB_MUSB_OTG
/* flush endpoints when transitioning from Device Mode */ /* flush endpoints when transitioning from Device Mode */
if (is_peripheral_active(musb)) { if (is_peripheral_active(musb)) {
// REVISIT HNP; just force disconnect /* REVISIT HNP; just force disconnect */
} }
musb_writew(mbase, MUSB_INTRTXE, musb->epmask); musb_writew(mbase, MUSB_INTRTXE, musb->epmask);
musb_writew(mbase, MUSB_INTRRXE, musb->epmask & 0xfffe); musb_writew(mbase, MUSB_INTRRXE, musb->epmask & 0xfffe);
...@@ -682,8 +682,10 @@ static irqreturn_t musb_stage2_irq(struct musb * musb, u8 int_usb, ...@@ -682,8 +682,10 @@ static irqreturn_t musb_stage2_irq(struct musb * musb, u8 int_usb,
for (epnum = 1; (epnum < musb->nr_endpoints) for (epnum = 1; (epnum < musb->nr_endpoints)
&& (musb->epmask >= (1 << epnum)); && (musb->epmask >= (1 << epnum));
epnum++, ep++) { epnum++, ep++) {
// FIXME handle framecounter wraps (12 bits) /*
// eliminate duplicated StartUrb logic * FIXME handle framecounter wraps (12 bits)
* eliminate duplicated StartUrb logic
*/
if (ep->dwWaitFrame >= frame) { if (ep->dwWaitFrame >= frame) {
ep->dwWaitFrame = 0; ep->dwWaitFrame = 0;
printk("SOF --> periodic TX%s on %d\n", printk("SOF --> periodic TX%s on %d\n",
...@@ -813,7 +815,7 @@ void musb_start(struct musb *musb) ...@@ -813,7 +815,7 @@ void musb_start(struct musb *musb)
| MUSB_POWER_SOFTCONN | MUSB_POWER_SOFTCONN
| MUSB_POWER_HSENAB | MUSB_POWER_HSENAB
/* ENSUSPEND wedges tusb */ /* ENSUSPEND wedges tusb */
// | MUSB_POWER_ENSUSPEND /* | MUSB_POWER_ENSUSPEND */
); );
musb->is_active = 0; musb->is_active = 0;
...@@ -1143,7 +1145,7 @@ static int __init ep_config_from_table(struct musb *musb) ...@@ -1143,7 +1145,7 @@ static int __init ep_config_from_table(struct musb *musb)
offset = fifo_setup(musb, hw_ep, &ep0_cfg, 0); offset = fifo_setup(musb, hw_ep, &ep0_cfg, 0);
// assert(offset > 0) /* assert(offset > 0) */
/* NOTE: for RTL versions >= 1.400 EPINFO and RAMINFO would /* NOTE: for RTL versions >= 1.400 EPINFO and RAMINFO would
* be better than static MUSB_C_NUM_EPS and DYN_FIFO_SIZE... * be better than static MUSB_C_NUM_EPS and DYN_FIFO_SIZE...
...@@ -1497,7 +1499,7 @@ irqreturn_t musb_interrupt(struct musb *musb) ...@@ -1497,7 +1499,7 @@ irqreturn_t musb_interrupt(struct musb *musb)
ep_num = 1; ep_num = 1;
while (reg) { while (reg) {
if (reg & 1) { if (reg & 1) {
// musb_ep_select(musb->mregs, ep_num); /* musb_ep_select(musb->mregs, ep_num); */
/* REVISIT just retval = ep->rx_irq(...) */ /* REVISIT just retval = ep->rx_irq(...) */
retval = IRQ_HANDLED; retval = IRQ_HANDLED;
if (devctl & MUSB_DEVCTL_HM) { if (devctl & MUSB_DEVCTL_HM) {
...@@ -1518,7 +1520,7 @@ irqreturn_t musb_interrupt(struct musb *musb) ...@@ -1518,7 +1520,7 @@ irqreturn_t musb_interrupt(struct musb *musb)
ep_num = 1; ep_num = 1;
while (reg) { while (reg) {
if (reg & 1) { if (reg & 1) {
// musb_ep_select(musb->mregs, ep_num); /* musb_ep_select(musb->mregs, ep_num); */
/* REVISIT just retval |= ep->tx_irq(...) */ /* REVISIT just retval |= ep->tx_irq(...) */
retval = IRQ_HANDLED; retval = IRQ_HANDLED;
if (devctl & MUSB_DEVCTL_HM) { if (devctl & MUSB_DEVCTL_HM) {
...@@ -1964,7 +1966,7 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl) ...@@ -1964,7 +1966,7 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
goto fail2; goto fail2;
} }
musb->nIrq = nIrq; musb->nIrq = nIrq;
// FIXME this handles wakeup irqs wrong /* FIXME this handles wakeup irqs wrong */
if (enable_irq_wake(nIrq) == 0) if (enable_irq_wake(nIrq) == 0)
device_init_wakeup(dev, 1); device_init_wakeup(dev, 1);
......
...@@ -63,4 +63,4 @@ static inline int _dbg_level(unsigned l) ...@@ -63,4 +63,4 @@ static inline int _dbg_level(unsigned l)
extern const char *otg_state_string(struct musb *); extern const char *otg_state_string(struct musb *);
#endif // __MUSB_LINUX_DEBUG_H__ #endif /* __MUSB_LINUX_DEBUG_H__ */
...@@ -113,7 +113,7 @@ struct dma_controller; ...@@ -113,7 +113,7 @@ struct dma_controller;
*/ */
struct dma_channel { struct dma_channel {
void *private_data; void *private_data;
// FIXME not void* private_data, but a dma_controller * /* FIXME not void* private_data, but a dma_controller * */
size_t max_len; size_t max_len;
size_t actual_len; size_t actual_len;
enum dma_channel_status status; enum dma_channel_status status;
......
...@@ -322,7 +322,7 @@ static void txstate(struct musb *musb, struct musb_request *req) ...@@ -322,7 +322,7 @@ static void txstate(struct musb *musb, struct musb_request *req)
MUSB_TXCSR_DMAMODE); MUSB_TXCSR_DMAMODE);
csr |= (MUSB_TXCSR_DMAENAB | csr |= (MUSB_TXCSR_DMAENAB |
MUSB_TXCSR_MODE); MUSB_TXCSR_MODE);
// against programming guide /* against programming guide */
} }
else else
csr |= (MUSB_TXCSR_AUTOSET csr |= (MUSB_TXCSR_AUTOSET
...@@ -646,7 +646,7 @@ static void rxstate(struct musb *musb, struct musb_request *req) ...@@ -646,7 +646,7 @@ static void rxstate(struct musb *musb, struct musb_request *req)
csr |= MUSB_RXCSR_DMAENAB; csr |= MUSB_RXCSR_DMAENAB;
#ifdef USE_MODE1 #ifdef USE_MODE1
csr |= MUSB_RXCSR_AUTOCLEAR; csr |= MUSB_RXCSR_AUTOCLEAR;
// csr |= MUSB_RXCSR_DMAMODE; /* csr |= MUSB_RXCSR_DMAMODE; */
/* this special sequence (enabling and then /* this special sequence (enabling and then
* disabling MUSB_RXCSR_DMAMODE) is required * disabling MUSB_RXCSR_DMAMODE) is required
...@@ -768,7 +768,7 @@ void musb_g_rx(struct musb *musb, u8 epnum) ...@@ -768,7 +768,7 @@ void musb_g_rx(struct musb *musb, u8 epnum)
} }
if (csr & MUSB_RXCSR_P_OVERRUN) { if (csr & MUSB_RXCSR_P_OVERRUN) {
// csr |= MUSB_RXCSR_P_WZC_BITS; /* csr |= MUSB_RXCSR_P_WZC_BITS; */
csr &= ~MUSB_RXCSR_P_OVERRUN; csr &= ~MUSB_RXCSR_P_OVERRUN;
musb_writew(epio, MUSB_RXCSR, csr); musb_writew(epio, MUSB_RXCSR, csr);
...@@ -1486,8 +1486,10 @@ static int musb_gadget_vbus_session(struct usb_gadget *gadget, int is_active) ...@@ -1486,8 +1486,10 @@ static int musb_gadget_vbus_session(struct usb_gadget *gadget, int is_active)
{ {
DBG(2, "<= %s =>\n", __FUNCTION__); DBG(2, "<= %s =>\n", __FUNCTION__);
// FIXME iff driver's softconnect flag is set (as it is during probe, /*
// though that can clear it), just musb_pullup(). * FIXME iff driver's softconnect flag is set (as it is during probe,
* though that can clear it), just musb_pullup().
*/
return -EINVAL; return -EINVAL;
} }
...@@ -1525,7 +1527,7 @@ static const struct usb_gadget_ops musb_gadget_operations = { ...@@ -1525,7 +1527,7 @@ static const struct usb_gadget_ops musb_gadget_operations = {
.get_frame = musb_gadget_get_frame, .get_frame = musb_gadget_get_frame,
.wakeup = musb_gadget_wakeup, .wakeup = musb_gadget_wakeup,
.set_selfpowered = musb_gadget_set_self_powered, .set_selfpowered = musb_gadget_set_self_powered,
//.vbus_session = musb_gadget_vbus_session, /* .vbus_session = musb_gadget_vbus_session, */
.vbus_draw = musb_gadget_vbus_draw, .vbus_draw = musb_gadget_vbus_draw,
.pullup = musb_gadget_pullup, .pullup = musb_gadget_pullup,
}; };
...@@ -1542,7 +1544,7 @@ static struct musb *the_gadget; ...@@ -1542,7 +1544,7 @@ static struct musb *the_gadget;
static void musb_gadget_release(struct device *dev) static void musb_gadget_release(struct device *dev)
{ {
// kref_put(WHAT) /* kref_put(WHAT) */
dev_dbg(dev, "%s\n", __FUNCTION__); dev_dbg(dev, "%s\n", __FUNCTION__);
} }
......
...@@ -494,7 +494,7 @@ static void ep0_txstate(struct musb *musb) ...@@ -494,7 +494,7 @@ static void ep0_txstate(struct musb *musb)
u8 fifo_count; u8 fifo_count;
if (!request) { if (!request) {
// WARN_ON(1); /* WARN_ON(1); */
DBG(2, "odd; csr0 %04x\n", musb_readw(regs, MUSB_CSR0)); DBG(2, "odd; csr0 %04x\n", musb_readw(regs, MUSB_CSR0));
return; return;
} }
......
...@@ -247,7 +247,7 @@ musb_start_urb(struct musb *musb, int is_in, struct musb_qh *qh) ...@@ -247,7 +247,7 @@ musb_start_urb(struct musb *musb, int is_in, struct musb_qh *qh)
qh->frame = urb->start_frame; qh->frame = urb->start_frame;
/* enable SOF interrupt so we can count down */ /* enable SOF interrupt so we can count down */
DBG(1,"SOF for %d\n", epnum); DBG(1,"SOF for %d\n", epnum);
#if 1 // ifndef CONFIG_ARCH_DAVINCI #if 1 /* ifndef CONFIG_ARCH_DAVINCI */
musb_writeb(mbase, MUSB_INTRUSBE, 0xff); musb_writeb(mbase, MUSB_INTRUSBE, 0xff);
#endif #endif
} }
...@@ -482,7 +482,7 @@ musb_host_packet_rx(struct musb *musb, struct urb *urb, u8 epnum, u8 iso_err) ...@@ -482,7 +482,7 @@ musb_host_packet_rx(struct musb *musb, struct urb *urb, u8 epnum, u8 iso_err)
int pipe = urb->pipe; int pipe = urb->pipe;
void *buffer = urb->transfer_buffer; void *buffer = urb->transfer_buffer;
// musb_ep_select(mbase, epnum); /* musb_ep_select(mbase, epnum); */
rx_count = musb_readw(epio, MUSB_RXCOUNT); rx_count = musb_readw(epio, MUSB_RXCOUNT);
DBG(3, "RX%d count %d, buffer %p len %d/%d\n", epnum, rx_count, DBG(3, "RX%d count %d, buffer %p len %d/%d\n", epnum, rx_count,
urb->transfer_buffer, qh->offset, urb->transfer_buffer, qh->offset,
...@@ -784,7 +784,7 @@ static void musb_ep_program(struct musb *musb, u8 epnum, ...@@ -784,7 +784,7 @@ static void musb_ep_program(struct musb *musb, u8 epnum,
csr &= ~(MUSB_TXCSR_AUTOSET csr &= ~(MUSB_TXCSR_AUTOSET
| MUSB_TXCSR_DMAMODE); | MUSB_TXCSR_DMAMODE);
csr |= (MUSB_TXCSR_DMAENAB); csr |= (MUSB_TXCSR_DMAENAB);
// against programming guide /* against programming guide */
} else } else
csr |= (MUSB_TXCSR_AUTOSET csr |= (MUSB_TXCSR_AUTOSET
| MUSB_TXCSR_DMAENAB | MUSB_TXCSR_DMAENAB
...@@ -1312,7 +1312,7 @@ void musb_host_tx(struct musb *musb, u8 epnum) ...@@ -1312,7 +1312,7 @@ void musb_host_tx(struct musb *musb, u8 epnum)
musb_advance_schedule(musb, urb, hw_ep, USB_DIR_OUT); musb_advance_schedule(musb, urb, hw_ep, USB_DIR_OUT);
} else if (!(tx_csr & MUSB_TXCSR_DMAENAB)) { } else if (!(tx_csr & MUSB_TXCSR_DMAENAB)) {
// WARN_ON(!buf); /* WARN_ON(!buf); */
/* REVISIT: some docs say that when hw_ep->tx_double_buffered, /* REVISIT: some docs say that when hw_ep->tx_double_buffered,
* (and presumably, fifo is not half-full) we should write TWO * (and presumably, fifo is not half-full) we should write TWO
...@@ -1541,9 +1541,9 @@ void musb_host_rx(struct musb *musb, u8 epnum) ...@@ -1541,9 +1541,9 @@ void musb_host_rx(struct musb *musb, u8 epnum)
status = -EPROTO; status = -EPROTO;
ERR("Rx interrupt with no errors or packet!\n"); ERR("Rx interrupt with no errors or packet!\n");
// FIXME this is another "SHOULD NEVER HAPPEN" /* FIXME this is another "SHOULD NEVER HAPPEN" */
// SCRUB (RX) /* SCRUB (RX) */
/* do the proper sequence to abort the transfer */ /* do the proper sequence to abort the transfer */
musb_ep_select(mbase, epnum); musb_ep_select(mbase, epnum);
val &= ~MUSB_RXCSR_H_REQPKT; val &= ~MUSB_RXCSR_H_REQPKT;
...@@ -2167,6 +2167,6 @@ const struct hc_driver musb_hc_driver = { ...@@ -2167,6 +2167,6 @@ const struct hc_driver musb_hc_driver = {
.hub_control = musb_hub_control, .hub_control = musb_hub_control,
.bus_suspend = musb_bus_suspend, .bus_suspend = musb_bus_suspend,
.bus_resume = musb_bus_resume, .bus_resume = musb_bus_resume,
// .start_port_reset = NULL, /* .start_port_reset = NULL, */
// .hub_irq_enable = NULL, /* .hub_irq_enable = NULL, */
}; };
...@@ -54,7 +54,7 @@ struct musb_qh { ...@@ -54,7 +54,7 @@ struct musb_qh {
struct musb_hw_ep *hw_ep; /* current binding */ struct musb_hw_ep *hw_ep; /* current binding */
struct list_head ring; /* of musb_qh */ struct list_head ring; /* of musb_qh */
//struct musb_qh *next; /* for periodic tree */ /* struct musb_qh *next; */ /* for periodic tree */
unsigned offset; /* in urb->transfer_buffer */ unsigned offset; /* in urb->transfer_buffer */
unsigned segsize; /* current xfer fragment */ unsigned segsize; /* current xfer fragment */
......
...@@ -705,8 +705,8 @@ static int musb_proc_write(struct file *file, const char __user *buffer, ...@@ -705,8 +705,8 @@ static int musb_proc_write(struct file *file, const char __user *buffer,
reg = musb_readb(mbase, MUSB_DEVCTL); reg = musb_readb(mbase, MUSB_DEVCTL);
reg |= MUSB_DEVCTL_HR; reg |= MUSB_DEVCTL_HR;
musb_writeb(mbase, MUSB_DEVCTL, reg); musb_writeb(mbase, MUSB_DEVCTL, reg);
//MUSB_HST_MODE( ((struct musb*)data) ); /* MUSB_HST_MODE( ((struct musb*)data) ); */
//WARN("Host Mode\n"); /* WARN("Host Mode\n"); */
} }
break; break;
...@@ -802,7 +802,7 @@ static int musb_proc_read(char *page, char **start, ...@@ -802,7 +802,7 @@ static int musb_proc_read(char *page, char **start,
} }
/* generate the report for the end points */ /* generate the report for the end points */
// REVISIT ... not unless something's connected! /* REVISIT ... not unless something's connected! */
for (epnum = 0; count >= 0 && epnum < musb->nr_endpoints; for (epnum = 0; count >= 0 && epnum < musb->nr_endpoints;
epnum++) { epnum++) {
code = dump_end_info(musb, epnum, buffer, count); code = dump_end_info(musb, epnum, buffer, count);
...@@ -840,7 +840,7 @@ musb_debug_create(char *name, struct musb *data) ...@@ -840,7 +840,7 @@ musb_debug_create(char *name, struct musb *data)
S_IFREG | S_IRUGO | S_IWUSR, NULL); S_IFREG | S_IRUGO | S_IWUSR, NULL);
if (pde) { if (pde) {
pde->data = data; pde->data = data;
// pde->owner = THIS_MODULE; /* pde->owner = THIS_MODULE; */
pde->read_proc = musb_proc_read; pde->read_proc = musb_proc_read;
pde->write_proc = musb_proc_write; pde->write_proc = musb_proc_write;
......
...@@ -337,7 +337,7 @@ static void tusb_set_clock_source(struct musb *musb, unsigned mode) ...@@ -337,7 +337,7 @@ static void tusb_set_clock_source(struct musb *musb, unsigned mode)
musb_writel(base, TUSB_PRCM_CONF, reg); musb_writel(base, TUSB_PRCM_CONF, reg);
// FIXME tusb6010_platform_retime(mode == 0); /* FIXME tusb6010_platform_retime(mode == 0); */
} }
/* /*
...@@ -688,7 +688,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *base) ...@@ -688,7 +688,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *base)
if ((is_otg_enabled(musb) && !musb->xceiv.default_a) if ((is_otg_enabled(musb) && !musb->xceiv.default_a)
|| !is_host_enabled(musb)) { || !is_host_enabled(musb)) {
#ifdef CONFIG_USB_MUSB_HDRC_HCD #ifdef CONFIG_USB_MUSB_HDRC_HCD
// ? musb_root_disconnect(musb); /* ? musb_root_disconnect(musb); */
musb->port1_status &= musb->port1_status &=
~(USB_PORT_STAT_CONNECTION ~(USB_PORT_STAT_CONNECTION
| USB_PORT_STAT_ENABLE | USB_PORT_STAT_ENABLE
...@@ -864,7 +864,7 @@ static irqreturn_t tusb_interrupt(int irq, void *__hci) ...@@ -864,7 +864,7 @@ static irqreturn_t tusb_interrupt(int irq, void *__hci)
DBG(3, "wake %sactive %02x\n", DBG(3, "wake %sactive %02x\n",
musb->is_active ? "" : "in", reg); musb->is_active ? "" : "in", reg);
// REVISIT host side TUSB_PRCM_WHOSTDISCON, TUSB_PRCM_WBUS /* REVISIT host side TUSB_PRCM_WHOSTDISCON, TUSB_PRCM_WBUS */
} }
if (int_src & TUSB_INT_SRC_USB_IP_CONN) if (int_src & TUSB_INT_SRC_USB_IP_CONN)
......
...@@ -75,7 +75,7 @@ static int tusb_omap_dma_start(struct dma_controller *c) ...@@ -75,7 +75,7 @@ static int tusb_omap_dma_start(struct dma_controller *c)
tusb_dma = container_of(c, struct tusb_omap_dma, controller); tusb_dma = container_of(c, struct tusb_omap_dma, controller);
// DBG(3, "ep%i ch: %i\n", chdat->epnum, chdat->ch); /* DBG(3, "ep%i ch: %i\n", chdat->epnum, chdat->ch); */
return 0; return 0;
} }
...@@ -86,7 +86,7 @@ static int tusb_omap_dma_stop(struct dma_controller *c) ...@@ -86,7 +86,7 @@ static int tusb_omap_dma_stop(struct dma_controller *c)
tusb_dma = container_of(c, struct tusb_omap_dma, controller); tusb_dma = container_of(c, struct tusb_omap_dma, controller);
// DBG(3, "ep%i ch: %i\n", chdat->epnum, chdat->ch); /* DBG(3, "ep%i ch: %i\n", chdat->epnum, chdat->ch); */
return 0; return 0;
} }
......
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