Commit 3481a091 authored by Tony Lindgren's avatar Tony Lindgren

musb_hdrc: Search and replace MGC_HSDMA with MUSB_HSDMA

Search and replace MGC_HSDMA with MUSB_HSDMA
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 5db11cd3
...@@ -50,7 +50,7 @@ ...@@ -50,7 +50,7 @@
#define MUSB_HSDMA_ADDRESS 0x8 #define MUSB_HSDMA_ADDRESS 0x8
#define MUSB_HSDMA_COUNT 0xc #define MUSB_HSDMA_COUNT 0xc
#define MGC_HSDMA_CHANNEL_OFFSET(_bChannel, _offset) \ #define MUSB_HSDMA_CHANNEL_OFFSET(_bChannel, _offset) \
(MUSB_HSDMA_BASE + (_bChannel << 4) + _offset) (MUSB_HSDMA_BASE + (_bChannel << 4) + _offset)
/* control register (16-bit): */ /* control register (16-bit): */
...@@ -62,12 +62,12 @@ ...@@ -62,12 +62,12 @@
#define MUSB_HSDMA_BUSERROR_SHIFT 8 #define MUSB_HSDMA_BUSERROR_SHIFT 8
#define MUSB_HSDMA_BURSTMODE_SHIFT 9 #define MUSB_HSDMA_BURSTMODE_SHIFT 9
#define MUSB_HSDMA_BURSTMODE (3 << MUSB_HSDMA_BURSTMODE_SHIFT) #define MUSB_HSDMA_BURSTMODE (3 << MUSB_HSDMA_BURSTMODE_SHIFT)
#define MGC_HSDMA_BURSTMODE_UNSPEC 0 #define MUSB_HSDMA_BURSTMODE_UNSPEC 0
#define MGC_HSDMA_BURSTMODE_INCR4 1 #define MUSB_HSDMA_BURSTMODE_INCR4 1
#define MGC_HSDMA_BURSTMODE_INCR8 2 #define MUSB_HSDMA_BURSTMODE_INCR8 2
#define MGC_HSDMA_BURSTMODE_INCR16 3 #define MUSB_HSDMA_BURSTMODE_INCR16 3
#define MGC_HSDMA_CHANNELS 8 #define MUSB_HSDMA_CHANNELS 8
struct musb_dma_controller; struct musb_dma_controller;
...@@ -84,7 +84,7 @@ struct musb_dma_channel { ...@@ -84,7 +84,7 @@ struct musb_dma_channel {
struct musb_dma_controller { struct musb_dma_controller {
struct dma_controller Controller; struct dma_controller Controller;
struct musb_dma_channel aChannel[MGC_HSDMA_CHANNELS]; struct musb_dma_channel aChannel[MUSB_HSDMA_CHANNELS];
void *pDmaPrivate; void *pDmaPrivate;
void __iomem *pCoreBase; void __iomem *pCoreBase;
u8 bChannelCount; u8 bChannelCount;
...@@ -112,7 +112,7 @@ static int dma_controller_stop(struct dma_controller *c) ...@@ -112,7 +112,7 @@ static int dma_controller_stop(struct dma_controller *c)
dev_err(musb->controller, dev_err(musb->controller,
"Stopping DMA controller while channel active\n"); "Stopping DMA controller while channel active\n");
for (bBit = 0; bBit < MGC_HSDMA_CHANNELS; bBit++) { for (bBit = 0; bBit < MUSB_HSDMA_CHANNELS; bBit++) {
if (controller->bmUsedChannels & (1 << bBit)) { if (controller->bmUsedChannels & (1 << bBit)) {
pChannel = &(controller->aChannel[bBit].Channel); pChannel = &(controller->aChannel[bBit].Channel);
dma_channel_release(pChannel); dma_channel_release(pChannel);
...@@ -134,7 +134,7 @@ static struct dma_channel* dma_channel_allocate(struct dma_controller *c, ...@@ -134,7 +134,7 @@ static struct dma_channel* dma_channel_allocate(struct dma_controller *c,
struct musb_dma_controller *controller = struct musb_dma_controller *controller =
container_of(c, struct musb_dma_controller, Controller); container_of(c, struct musb_dma_controller, Controller);
for (bBit = 0; bBit < MGC_HSDMA_CHANNELS; bBit++) { for (bBit = 0; bBit < MUSB_HSDMA_CHANNELS; bBit++) {
if (!(controller->bmUsedChannels & (1 << bBit))) { if (!(controller->bmUsedChannels & (1 << bBit))) {
controller->bmUsedChannels |= (1 << bBit); controller->bmUsedChannels |= (1 << bBit);
pImplChannel = &(controller->aChannel[bBit]); pImplChannel = &(controller->aChannel[bBit]);
...@@ -191,13 +191,13 @@ static void configure_channel(struct dma_channel *pChannel, ...@@ -191,13 +191,13 @@ static void configure_channel(struct dma_channel *pChannel,
} }
if (packet_sz >= 64) { if (packet_sz >= 64) {
csr |= csr |=
MGC_HSDMA_BURSTMODE_INCR16 << MUSB_HSDMA_BURSTMODE_SHIFT; MUSB_HSDMA_BURSTMODE_INCR16 << MUSB_HSDMA_BURSTMODE_SHIFT;
} else if (packet_sz >= 32) { } else if (packet_sz >= 32) {
csr |= csr |=
MGC_HSDMA_BURSTMODE_INCR8 << MUSB_HSDMA_BURSTMODE_SHIFT; MUSB_HSDMA_BURSTMODE_INCR8 << MUSB_HSDMA_BURSTMODE_SHIFT;
} else if (packet_sz >= 16) { } else if (packet_sz >= 16) {
csr |= csr |=
MGC_HSDMA_BURSTMODE_INCR4 << MUSB_HSDMA_BURSTMODE_SHIFT; MUSB_HSDMA_BURSTMODE_INCR4 << MUSB_HSDMA_BURSTMODE_SHIFT;
} }
} }
...@@ -208,15 +208,15 @@ static void configure_channel(struct dma_channel *pChannel, ...@@ -208,15 +208,15 @@ static void configure_channel(struct dma_channel *pChannel,
/* address/count */ /* address/count */
musb_writel(mbase, musb_writel(mbase,
MGC_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_ADDRESS), MUSB_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_ADDRESS),
dma_addr); dma_addr);
musb_writel(mbase, musb_writel(mbase,
MGC_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_COUNT), MUSB_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_COUNT),
len); len);
/* control (this should start things) */ /* control (this should start things) */
musb_writew(mbase, musb_writew(mbase,
MGC_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_CONTROL), MUSB_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_CONTROL),
csr); csr);
} }
...@@ -283,11 +283,11 @@ static int dma_channel_abort(struct dma_channel *pChannel) ...@@ -283,11 +283,11 @@ static int dma_channel_abort(struct dma_channel *pChannel)
} }
musb_writew(mbase, musb_writew(mbase,
MGC_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_CONTROL), 0); MUSB_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_CONTROL), 0);
musb_writel(mbase, musb_writel(mbase,
MGC_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_ADDRESS), 0); MUSB_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_ADDRESS), 0);
musb_writel(mbase, musb_writel(mbase,
MGC_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_COUNT), 0); MUSB_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_COUNT), 0);
pChannel->status = MUSB_DMA_STATUS_FREE; pChannel->status = MUSB_DMA_STATUS_FREE;
} }
...@@ -311,14 +311,14 @@ static irqreturn_t dma_controller_irq(int irq, void *private_data) ...@@ -311,14 +311,14 @@ static irqreturn_t dma_controller_irq(int irq, void *private_data)
if (!int_hsdma) if (!int_hsdma)
goto done; goto done;
for (bChannel = 0; bChannel < MGC_HSDMA_CHANNELS; bChannel++) { for (bChannel = 0; bChannel < MUSB_HSDMA_CHANNELS; bChannel++) {
if (int_hsdma & (1 << bChannel)) { if (int_hsdma & (1 << bChannel)) {
pImplChannel = (struct musb_dma_channel *) pImplChannel = (struct musb_dma_channel *)
&(controller->aChannel[bChannel]); &(controller->aChannel[bChannel]);
pChannel = &pImplChannel->Channel; pChannel = &pImplChannel->Channel;
csr = musb_readw(mbase, csr = musb_readw(mbase,
MGC_HSDMA_CHANNEL_OFFSET(bChannel, MUSB_HSDMA_CHANNEL_OFFSET(bChannel,
MUSB_HSDMA_CONTROL)); MUSB_HSDMA_CONTROL));
if (csr & (1 << MUSB_HSDMA_BUSERROR_SHIFT)) { if (csr & (1 << MUSB_HSDMA_BUSERROR_SHIFT)) {
...@@ -326,7 +326,7 @@ static irqreturn_t dma_controller_irq(int irq, void *private_data) ...@@ -326,7 +326,7 @@ static irqreturn_t dma_controller_irq(int irq, void *private_data)
MUSB_DMA_STATUS_BUS_ABORT; MUSB_DMA_STATUS_BUS_ABORT;
} else { } else {
dwAddress = musb_readl(mbase, dwAddress = musb_readl(mbase,
MGC_HSDMA_CHANNEL_OFFSET( MUSB_HSDMA_CHANNEL_OFFSET(
bChannel, bChannel,
MUSB_HSDMA_ADDRESS)); MUSB_HSDMA_ADDRESS));
pChannel->actual_len = pChannel->actual_len =
...@@ -403,7 +403,7 @@ dma_controller_create(struct musb *musb, void __iomem *pCoreBase) ...@@ -403,7 +403,7 @@ dma_controller_create(struct musb *musb, void __iomem *pCoreBase)
GFP_KERNEL))) GFP_KERNEL)))
return NULL; return NULL;
controller->bChannelCount = MGC_HSDMA_CHANNELS; controller->bChannelCount = MUSB_HSDMA_CHANNELS;
controller->pDmaPrivate = musb; controller->pDmaPrivate = musb;
controller->pCoreBase = pCoreBase; controller->pCoreBase = pCoreBase;
......
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