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Commit 1f21d2bd authored by Brian Murphy's avatar Brian Murphy Committed by Ralf Baechle
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[MIPS] Add back support for LASAT platforms 

Signed-off-by: default avatarBrian Murphy <brian@murphy.dk>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 0caf5833
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arch/mips/Kconfig
View file @ 1f21d2bd
...@@ -107,6 +107,20 @@ config MACH_JAZZ ...@@ -107,6 +107,20 @@ config MACH_JAZZ
Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and
Olivetti M700-10 workstations. Olivetti M700-10 workstations.
config LASAT
bool "LASAT Networks platforms"
select DMA_NONCOHERENT
select SYS_HAS_EARLY_PRINTK
select HW_HAS_PCI
select PCI_GT64XXX_PCI0
select MIPS_NILE4
select R5000_CPU_SCACHE
select SYS_HAS_CPU_R5000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
select SYS_SUPPORTS_LITTLE_ENDIAN
select GENERIC_HARDIRQS_NO__DO_IRQ
config LEMOTE_FULONG config LEMOTE_FULONG
bool "Lemote Fulong mini-PC" bool "Lemote Fulong mini-PC"
select ARCH_SPARSEMEM_ENABLE select ARCH_SPARSEMEM_ENABLE
...@@ -599,6 +613,7 @@ endchoice ...@@ -599,6 +613,7 @@ endchoice
source "arch/mips/au1000/Kconfig" source "arch/mips/au1000/Kconfig"
source "arch/mips/jazz/Kconfig" source "arch/mips/jazz/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/pmc-sierra/Kconfig" source "arch/mips/pmc-sierra/Kconfig"
source "arch/mips/sgi-ip27/Kconfig" source "arch/mips/sgi-ip27/Kconfig"
source "arch/mips/sibyte/Kconfig" source "arch/mips/sibyte/Kconfig"
...@@ -706,6 +721,9 @@ config MIPS_BONITO64 ...@@ -706,6 +721,9 @@ config MIPS_BONITO64
config MIPS_MSC config MIPS_MSC
bool bool
config MIPS_NILE4
bool
config MIPS_DISABLE_OBSOLETE_IDE config MIPS_DISABLE_OBSOLETE_IDE
bool bool
......
arch/mips/Makefile
View file @ 1f21d2bd
...@@ -361,6 +361,13 @@ core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/ ...@@ -361,6 +361,13 @@ core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/
cflags-$(CONFIG_BASLER_EXCITE) += -Iinclude/asm-mips/mach-excite cflags-$(CONFIG_BASLER_EXCITE) += -Iinclude/asm-mips/mach-excite
load-$(CONFIG_BASLER_EXCITE) += 0x80100000 load-$(CONFIG_BASLER_EXCITE) += 0x80100000
#
# LASAT platforms
#
core-$(CONFIG_LASAT) += arch/mips/lasat/
cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
load-$(CONFIG_LASAT) += 0xffffffff80000000
# #
# Common VR41xx # Common VR41xx
# #
...@@ -628,6 +635,11 @@ core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/ ...@@ -628,6 +635,11 @@ core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/ drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
ifdef CONFIG_LASAT
rom.bin rom.sw: vmlinux
$(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
endif
# #
# Some machines like the Indy need 32-bit ELF binaries for booting purposes. # Some machines like the Indy need 32-bit ELF binaries for booting purposes.
# Other need ECOFF, so we build a 32-bit ELF binary for them which we then # Other need ECOFF, so we build a 32-bit ELF binary for them which we then
...@@ -671,6 +683,7 @@ endif ...@@ -671,6 +683,7 @@ endif
archclean: archclean:
@$(MAKE) $(clean)=arch/mips/boot @$(MAKE) $(clean)=arch/mips/boot
@$(MAKE) $(clean)=arch/mips/lasat
define archhelp define archhelp
echo ' vmlinux.ecoff - ECOFF boot image' echo ' vmlinux.ecoff - ECOFF boot image'
......
arch/mips/configs/lasat_defconfig 0 → 100644
View file @ 1f21d2bd
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.23-rc3
# Sat Aug 18 17:37:58 2007
#
CONFIG_MIPS=y
#
# Machine selection
#
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_BASLER_EXCITE is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
CONFIG_LASAT=y
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_QEMU is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_PTSWARM is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SNI_RM is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_TOSHIBA_RBTX4938 is not set
# CONFIG_WR_PPMC is not set
CONFIG_PICVUE=y
CONFIG_PICVUE_PROC=y
CONFIG_DS1603=y
CONFIG_LASAT_SYSCTL=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_EARLY_PRINTK=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
# CONFIG_HOTPLUG_CPU is not set
CONFIG_MIPS_NILE4=y
# CONFIG_NO_IOPORT is not set
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_PCI_GT64XXX_PCI0=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
#
# CPU selection
#
# CONFIG_CPU_LOONGSON2 is not set
# CONFIG_CPU_MIPS32_R1 is not set
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_VR41XX is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_TX49XX is not set
CONFIG_CPU_R5000=y
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_SYS_HAS_CPU_R5000=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
#
# Kernel type
#
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_16KB is not set
# CONFIG_PAGE_SIZE_64KB is not set
CONFIG_BOARD_SCACHE=y
CONFIG_R5000_CPU_SCACHE=y
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
# CONFIG_HZ_48 is not set
# CONFIG_HZ_100 is not set
# CONFIG_HZ_128 is not set
# CONFIG_HZ_250 is not set
# CONFIG_HZ_256 is not set
CONFIG_HZ_1000=y
# CONFIG_HZ_1024 is not set
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_HZ=1000
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
# CONFIG_KEXEC is not set
# CONFIG_SECCOMP is not set
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# General setup
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
# CONFIG_USER_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
# CONFIG_SYSCTL_SYSCALL is not set
# CONFIG_KALLSYMS is not set
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
# CONFIG_EPOLL is not set
# CONFIG_SIGNALFD is not set
# CONFIG_TIMERFD is not set
# CONFIG_EVENTFD is not set
CONFIG_SHMEM=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
# CONFIG_MODULES is not set
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_DEFAULT_AS=y
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="anticipatory"
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_HW_HAS_PCI=y
CONFIG_PCI=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_MMU=y
#
# PCCARD (PCMCIA/CardBus) support
#
#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_TRAD_SIGNALS=y
#
# Power management options
#
# CONFIG_PM is not set
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_DIAG is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
#
# Wireless
#
# CONFIG_CFG80211 is not set
# CONFIG_WIRELESS_EXT is not set
# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
# CONFIG_SSFDC is not set
#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CFI_AMDSTD=y
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PHYSMAP is not set
CONFIG_MTD_LASAT=y
# CONFIG_MTD_PLATRAM is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
# CONFIG_MTD_NAND is not set
# CONFIG_MTD_ONENAND is not set
#
# UBI - Unsorted block images
#
# CONFIG_MTD_UBI is not set
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_MISC_DEVICES is not set
CONFIG_IDE=y
CONFIG_IDE_MAX_HWIFS=4
CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_BLK_DEV_IDEDISK=y
CONFIG_IDEDISK_MULTI_MODE=y
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
CONFIG_IDE_PROC_FS=y
#
# IDE chipset support/bugfixes
#
CONFIG_IDE_GENERIC=y
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
CONFIG_IDEPCI_PCIBUS_ORDER=y
# CONFIG_BLK_DEV_OFFBOARD is not set
CONFIG_BLK_DEV_GENERIC=y
# CONFIG_BLK_DEV_OPTI621 is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
# CONFIG_IDEDMA_ONLYDISK is not set
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
CONFIG_BLK_DEV_CMD64X=y
# CONFIG_BLK_DEV_TRIFLEX is not set
# CONFIG_BLK_DEV_CY82C693 is not set
# CONFIG_BLK_DEV_CS5520 is not set
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_JMICRON is not set
# CONFIG_BLK_DEV_SC1200 is not set
# CONFIG_BLK_DEV_PIIX is not set
# CONFIG_BLK_DEV_IT8213 is not set
# CONFIG_BLK_DEV_IT821X is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_PDC202XX_OLD is not set
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
# CONFIG_BLK_DEV_TC86C001 is not set
# CONFIG_IDE_ARM is not set
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_IVB is not set
# CONFIG_BLK_DEV_HD is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_DMA is not set
# CONFIG_SCSI_NETLINK is not set
# CONFIG_ATA is not set
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
CONFIG_NETDEVICES=y
# CONFIG_NETDEVICES_MULTIQUEUE is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ARCNET is not set
# CONFIG_PHYLIB is not set
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_AX88796 is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_CASSINI is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_DM9000 is not set
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
CONFIG_NET_PCI=y
CONFIG_PCNET32=y
# CONFIG_PCNET32_NAPI is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_B44 is not set
# CONFIG_FORCEDETH is not set
# CONFIG_TC35815 is not set
# CONFIG_DGRS is not set
# CONFIG_EEPRO100 is not set
# CONFIG_E100 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_SC92031 is not set
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
# CONFIG_TR is not set
#
# Wireless LAN
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_ISDN is not set
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
CONFIG_SERIO_I8042=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_LIBPS2 is not set
CONFIG_SERIO_RAW=y
# CONFIG_GAMEPORT is not set
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_PCI is not set
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
# CONFIG_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
# CONFIG_DAB is not set
#
# Graphics support
#
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
# CONFIG_FB is not set
#
# Sound
#
# CONFIG_SOUND is not set
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_INFINIBAND is not set
# CONFIG_RTC_CLASS is not set
#
# DMA Engine support
#
# CONFIG_DMA_ENGINE is not set
#
# DMA Clients
#
#
# DMA Devices
#
#
# Userspace I/O
#
# CONFIG_UIO is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
# CONFIG_EXT4DEV_FS is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_INOTIFY is not set
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
CONFIG_CONFIGFS_FS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
# CONFIG_NFS_FS is not set
# CONFIG_NFSD is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Distributed Lock Manager
#
# CONFIG_DLM is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_CROSSCOMPILE=y
CONFIG_CMDLINE=""
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
# CONFIG_CRYPTO is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
arch/mips/lasat/Kconfig 0 → 100644
View file @ 1f21d2bd
config PICVUE
tristate "PICVUE LCD display driver"
depends on LASAT
config PICVUE_PROC
tristate "PICVUE LCD display driver /proc interface"
depends on PICVUE
config DS1603
bool "DS1603 RTC driver"
depends on LASAT
config LASAT_SYSCTL
bool "LASAT sysctl interface"
depends on LASAT
arch/mips/lasat/Makefile 0 → 100644
View file @ 1f21d2bd
#
# Makefile for the LASAT specific kernel interface routines under Linux.
#
obj-y += reset.o setup.o prom.o lasat_board.o \
at93c.o interrupt.o serial.o
obj-$(CONFIG_LASAT_SYSCTL) += sysctl.o
obj-$(CONFIG_DS1603) += ds1603.o
obj-$(CONFIG_PICVUE) += picvue.o
obj-$(CONFIG_PICVUE_PROC) += picvue_proc.o
clean:
make -C image clean
EXTRA_CFLAGS += -Werror
arch/mips/lasat/at93c.c 0 → 100644
View file @ 1f21d2bd
/*
* Atmel AT93C46 serial eeprom driver
*
* Brian Murphy <brian.murphy@eicon.com>
*
*/
#include <linux/kernel.h>
#include <linux/delay.h>
#include <asm/lasat/lasat.h>
#include <linux/module.h>
#include <linux/init.h>
#include "at93c.h"
#define AT93C_ADDR_SHIFT 7
#define AT93C_ADDR_MAX ((1 << AT93C_ADDR_SHIFT) - 1)
#define AT93C_RCMD (0x6 << AT93C_ADDR_SHIFT)
#define AT93C_WCMD (0x5 << AT93C_ADDR_SHIFT)
#define AT93C_WENCMD 0x260
#define AT93C_WDSCMD 0x200
struct at93c_defs *at93c;
static void at93c_reg_write(u32 val)
{
*at93c->reg = val;
}
static u32 at93c_reg_read(void)
{
u32 tmp = *at93c->reg;
return tmp;
}
static u32 at93c_datareg_read(void)
{
u32 tmp = *at93c->rdata_reg;
return tmp;
}
static void at93c_cycle_clk(u32 data)
{
at93c_reg_write(data | at93c->clk);
lasat_ndelay(250);
at93c_reg_write(data & ~at93c->clk);
lasat_ndelay(250);
}
static void at93c_write_databit(u8 bit)
{
u32 data = at93c_reg_read();
if (bit)
data |= 1 << at93c->wdata_shift;
else
data &= ~(1 << at93c->wdata_shift);
at93c_reg_write(data);
lasat_ndelay(100);
at93c_cycle_clk(data);
}
static unsigned int at93c_read_databit(void)
{
u32 data;
at93c_cycle_clk(at93c_reg_read());
data = (at93c_datareg_read() >> at93c->rdata_shift) & 1;
return data;
}
static u8 at93c_read_byte(void)
{
int i;
u8 data = 0;
for (i = 0; i <= 7; i++) {
data <<= 1;
data |= at93c_read_databit();
}
return data;
}
static void at93c_write_bits(u32 data, int size)
{
int i;
int shift = size - 1;
u32 mask = (1 << shift);
for (i = 0; i < size; i++) {
at93c_write_databit((data & mask) >> shift);
data <<= 1;
}
}
static void at93c_init_op(void)
{
at93c_reg_write((at93c_reg_read() | at93c->cs) &
~at93c->clk & ~(1 << at93c->rdata_shift));
lasat_ndelay(50);
}
static void at93c_end_op(void)
{
at93c_reg_write(at93c_reg_read() & ~at93c->cs);
lasat_ndelay(250);
}
static void at93c_wait(void)
{
at93c_init_op();
while (!at93c_read_databit())
;
at93c_end_op();
};
static void at93c_disable_wp(void)
{
at93c_init_op();
at93c_write_bits(AT93C_WENCMD, 10);
at93c_end_op();
}
static void at93c_enable_wp(void)
{
at93c_init_op();
at93c_write_bits(AT93C_WDSCMD, 10);
at93c_end_op();
}
u8 at93c_read(u8 addr)
{
u8 byte;
at93c_init_op();
at93c_write_bits((addr & AT93C_ADDR_MAX)|AT93C_RCMD, 10);
byte = at93c_read_byte();
at93c_end_op();
return byte;
}
void at93c_write(u8 addr, u8 data)
{
at93c_disable_wp();
at93c_init_op();
at93c_write_bits((addr & AT93C_ADDR_MAX)|AT93C_WCMD, 10);
at93c_write_bits(data, 8);
at93c_end_op();
at93c_wait();
at93c_enable_wp();
}
arch/mips/lasat/at93c.h 0 → 100644
View file @ 1f21d2bd
/*
* Atmel AT93C46 serial eeprom driver
*
* Brian Murphy <brian.murphy@eicon.com>
*
*/
extern struct at93c_defs {
volatile u32 *reg;
volatile u32 *rdata_reg;
int rdata_shift;
int wdata_shift;
u32 cs;
u32 clk;
} *at93c;
u8 at93c_read(u8 addr);
void at93c_write(u8 addr, u8 data);
arch/mips/lasat/ds1603.c 0 → 100644
View file @ 1f21d2bd
/*
* Dallas Semiconductors 1603 RTC driver
*
* Brian Murphy <brian@murphy.dk>
*
*/
#include <linux/kernel.h>
#include <asm/lasat/lasat.h>
#include <linux/delay.h>
#include <asm/lasat/ds1603.h>
#include <asm/time.h>
#include "ds1603.h"
#define READ_TIME_CMD 0x81
#define SET_TIME_CMD 0x80
#define TRIMMER_SET_CMD 0xC0
#define TRIMMER_VALUE_MASK 0x38
#define TRIMMER_SHIFT 3
struct ds_defs *ds1603;
/* HW specific register functions */
static void rtc_reg_write(unsigned long val)
{
*ds1603->reg = val;
}
static unsigned long rtc_reg_read(void)
{
unsigned long tmp = *ds1603->reg;
return tmp;
}
static unsigned long rtc_datareg_read(void)
{
unsigned long tmp = *ds1603->data_reg;
return tmp;
}
static void rtc_nrst_high(void)
{
rtc_reg_write(rtc_reg_read() | ds1603->rst);
}
static void rtc_nrst_low(void)
{
rtc_reg_write(rtc_reg_read() & ~ds1603->rst);
}
static void rtc_cycle_clock(unsigned long data)
{
data |= ds1603->clk;
rtc_reg_write(data);
lasat_ndelay(250);
if (ds1603->data_reversed)
data &= ~ds1603->data;
else
data |= ds1603->data;
data &= ~ds1603->clk;
rtc_reg_write(data);
lasat_ndelay(250 + ds1603->huge_delay);
}
static void rtc_write_databit(unsigned int bit)
{
unsigned long data = rtc_reg_read();
if (ds1603->data_reversed)
bit = !bit;
if (bit)
data |= ds1603->data;
else
data &= ~ds1603->data;
rtc_reg_write(data);
lasat_ndelay(50 + ds1603->huge_delay);
rtc_cycle_clock(data);
}
static unsigned int rtc_read_databit(void)
{
unsigned int data;
data = (rtc_datareg_read() & (1 << ds1603->data_read_shift))
>> ds1603->data_read_shift;
rtc_cycle_clock(rtc_reg_read());
return data;
}
static void rtc_write_byte(unsigned int byte)
{
int i;
for (i = 0; i <= 7; i++) {
rtc_write_databit(byte & 1L);
byte >>= 1;
}
}
static void rtc_write_word(unsigned long word)
{
int i;
for (i = 0; i <= 31; i++) {
rtc_write_databit(word & 1L);
word >>= 1;
}
}
static unsigned long rtc_read_word(void)
{
int i;
unsigned long word = 0;
unsigned long shift = 0;
for (i = 0; i <= 31; i++) {
word |= rtc_read_databit() << shift;
shift++;
}
return word;
}
static void rtc_init_op(void)
{
rtc_nrst_high();
rtc_reg_write(rtc_reg_read() & ~ds1603->clk);
lasat_ndelay(50);
}
static void rtc_end_op(void)
{
rtc_nrst_low();
lasat_ndelay(1000);
}
/* interface */
unsigned long ds1603_read(void)
{
unsigned long word;
unsigned long flags;
spin_lock_irqsave(&rtc_lock, flags);
rtc_init_op();
rtc_write_byte(READ_TIME_CMD);
word = rtc_read_word();
rtc_end_op();
spin_unlock_irqrestore(&rtc_lock, flags);
return word;
}
int ds1603_set(unsigned long time)
{
unsigned long flags;
spin_lock_irqsave(&rtc_lock, flags);
rtc_init_op();
rtc_write_byte(SET_TIME_CMD);
rtc_write_word(time);
rtc_end_op();
spin_unlock_irqrestore(&rtc_lock, flags);
return 0;
}
void ds1603_set_trimmer(unsigned int trimval)
{
rtc_init_op();
rtc_write_byte(((trimval << TRIMMER_SHIFT) & TRIMMER_VALUE_MASK)
| (TRIMMER_SET_CMD));
rtc_end_op();
}
void ds1603_disable(void)
{
ds1603_set_trimmer(TRIMMER_DISABLE_RTC);
}
void ds1603_enable(void)
{
ds1603_set_trimmer(TRIMMER_DEFAULT);
}
arch/mips/lasat/ds1603.h 0 → 100644
View file @ 1f21d2bd
/*
* Dallas Semiconductors 1603 RTC driver
*
* Brian Murphy <brian@murphy.dk>
*
*/
#ifndef __DS1603_H
#define __DS1603_H
struct ds_defs {
volatile u32 *reg;
volatile u32 *data_reg;
u32 rst;
u32 clk;
u32 data;
u32 data_read_shift;
char data_reversed;
u32 huge_delay;
};
extern struct ds_defs *ds1603;
unsigned long ds1603_read(void);
int ds1603_set(unsigned long);
void ds1603_set_trimmer(unsigned int);
void ds1603_enable(void);
void ds1603_disable(void);
void ds1603_init(struct ds_defs *);
#define TRIMMER_DEFAULT 3
#define TRIMMER_DISABLE_RTC 0
#endif
arch/mips/lasat/image/Makefile 0 → 100644
View file @ 1f21d2bd
#
# MAKEFILE FOR THE MIPS LINUX BOOTLOADER AND ROM DEBUGGER
#
# i-data Networks
#
# Author: Thomas Horsten <thh@i-data.com>
#
ifndef Version
Version = "$(USER)-test"
endif
MKLASATIMG = mklasatimg
MKLASATIMG_ARCH = mq2,mqpro,sp100,sp200
KERNEL_IMAGE = $(TOPDIR)/vmlinux
KERNEL_START = $(shell $(NM) $(KERNEL_IMAGE) | grep " _text" | cut -f1 -d\ )
KERNEL_ENTRY = $(shell $(NM) $(KERNEL_IMAGE) | grep kernel_entry | cut -f1 -d\ )
LDSCRIPT= -L$(obj) -Tromscript.normal
HEAD_DEFINES := -D_kernel_start=0x$(KERNEL_START) \
-D_kernel_entry=0x$(KERNEL_ENTRY) \
-D VERSION="\"$(Version)\"" \
-D TIMESTAMP=$(shell date +%s)
$(obj)/head.o: $(obj)/head.S $(KERNEL_IMAGE)
$(CC) -fno-pic $(HEAD_DEFINES) -I$(TOPDIR)/include -c -o $@ $<
OBJECTS = head.o kImage.o
rom.sw: $(obj)/rom.sw
rom.bin: $(obj)/rom.bin
$(obj)/rom.sw: $(obj)/rom.bin
$(MKLASATIMG) -o $@ -k $^ -m $(MKLASATIMG_ARCH)
$(obj)/rom.bin: $(obj)/rom
$(OBJCOPY) -O binary -S $^ $@
# Rule to make the bootloader
$(obj)/rom: $(addprefix $(obj)/,$(OBJECTS))
$(LD) $(LDFLAGS) $(LDSCRIPT) -o $@ $^
$(obj)/%.o: $(obj)/%.gz
$(LD) -r -o $@ -b binary $<
$(obj)/%.gz: $(obj)/%.bin
gzip -cf -9 $< > $@
$(obj)/kImage.bin: $(KERNEL_IMAGE)
$(OBJCOPY) -O binary -S $^ $@
clean:
rm -f rom rom.bin rom.sw kImage.bin kImage.o
arch/mips/lasat/image/head.S 0 → 100644
View file @ 1f21d2bd
#include <asm/lasat/head.h>
.text
.section .text.start, "ax"
.set noreorder
.set mips3
/* Magic words identifying a software image */
.word LASAT_K_MAGIC0_VAL
.word LASAT_K_MAGIC1_VAL
/* Image header version */
.word 0x00000002
/* image start and size */
.word _image_start
.word _image_size
/* start of kernel and entrypoint in uncompressed image */
.word _kernel_start
.word _kernel_entry
/* Here we have room for future flags */
.org 0x40
reldate:
.word TIMESTAMP
.org 0x50
release:
.string VERSION
arch/mips/lasat/image/romscript.normal 0 → 100644
View file @ 1f21d2bd
OUTPUT_ARCH(mips)
SECTIONS
{
.text :
{
*(.text.start)
}
/* Data in ROM */
.data ALIGN(0x10) :
{
*(.data)
}
_image_start = ADDR(.data);
_image_size = SIZEOF(.data);
.other :
{
*(.*)
}
}
arch/mips/lasat/interrupt.c 0 → 100644
View file @ 1f21d2bd
/*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Routines for generic manipulation of the interrupts found on the
* Lasat boards.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <asm/bootinfo.h>
#include <asm/lasat/lasatint.h>
#include <asm/time.h>
#include <asm/gdb-stub.h>
static volatile int *lasat_int_status;
static volatile int *lasat_int_mask;
static volatile int lasat_int_mask_shift;
void disable_lasat_irq(unsigned int irq_nr)
{
*lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift;
}
void enable_lasat_irq(unsigned int irq_nr)
{
*lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift;
}
static struct irq_chip lasat_irq_type = {
.name = "Lasat",
.ack = disable_lasat_irq,
.mask = disable_lasat_irq,
.mask_ack = disable_lasat_irq,
.unmask = enable_lasat_irq,
};
static inline int ls1bit32(unsigned int x)
{
int b = 31, s;
s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
s = 1; if (x << 1 == 0) s = 0; b -= s;
return b;
}
static unsigned long (*get_int_status)(void);
static unsigned long get_int_status_100(void)
{
return *lasat_int_status & *lasat_int_mask;
}
static unsigned long get_int_status_200(void)
{
unsigned long int_status;
int_status = *lasat_int_status;
int_status &= (int_status >> LASATINT_MASK_SHIFT_200) & 0xffff;
return int_status;
}
asmlinkage void plat_irq_dispatch(void)
{
unsigned long int_status;
unsigned int cause = read_c0_cause();
int irq;
if (cause & CAUSEF_IP7) { /* R4000 count / compare IRQ */
ll_timer_interrupt(7);
return;
}
int_status = get_int_status();
/* if int_status == 0, then the interrupt has already been cleared */
if (int_status) {
irq = ls1bit32(int_status);
do_IRQ(irq);
}
}
void __init arch_init_irq(void)
{
int i;
switch (mips_machtype) {
case MACH_LASAT_100:
lasat_int_status = (void *)LASAT_INT_STATUS_REG_100;
lasat_int_mask = (void *)LASAT_INT_MASK_REG_100;
lasat_int_mask_shift = LASATINT_MASK_SHIFT_100;
get_int_status = get_int_status_100;
*lasat_int_mask = 0;
break;
case MACH_LASAT_200:
lasat_int_status = (void *)LASAT_INT_STATUS_REG_200;
lasat_int_mask = (void *)LASAT_INT_MASK_REG_200;
lasat_int_mask_shift = LASATINT_MASK_SHIFT_200;
get_int_status = get_int_status_200;
*lasat_int_mask &= 0xffff;
break;
default:
panic("arch_init_irq: mips_machtype incorrect");
}
for (i = 0; i <= LASATINT_END; i++)
set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq);
}
arch/mips/lasat/lasat_board.c 0 → 100644
View file @ 1f21d2bd
/*
* Thomas Horsten <thh@lasat.com>
* Copyright (C) 2000 LASAT Networks A/S.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Routines specific to the LASAT boards
*/
#include <linux/types.h>
#include <linux/crc32.h>
#include <asm/lasat/lasat.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/ctype.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include "at93c.h"
/* New model description table */
#include "lasat_models.h"
#define EEPROM_CRC(data, len) (~crc32(~0, data, len))
struct lasat_info lasat_board_info;
void update_bcastaddr(void);
int EEPROMRead(unsigned int pos, unsigned char *data, int len)
{
int i;
for (i = 0; i < len; i++)
*data++ = at93c_read(pos++);
return 0;
}
int EEPROMWrite(unsigned int pos, unsigned char *data, int len)
{
int i;
for (i = 0; i < len; i++)
at93c_write(pos++, *data++);
return 0;
}
static void init_flash_sizes(void)
{
unsigned long *lb = lasat_board_info.li_flashpart_base;
unsigned long *ls = lasat_board_info.li_flashpart_size;
int i;
ls[LASAT_MTD_BOOTLOADER] = 0x40000;
ls[LASAT_MTD_SERVICE] = 0xC0000;
ls[LASAT_MTD_NORMAL] = 0x100000;
if (mips_machtype == MACH_LASAT_100) {
lasat_board_info.li_flash_base = 0x1e000000;
lb[LASAT_MTD_BOOTLOADER] = 0x1e400000;
if (lasat_board_info.li_flash_size > 0x200000) {
ls[LASAT_MTD_CONFIG] = 0x100000;
ls[LASAT_MTD_FS] = 0x500000;
}
} else {
lasat_board_info.li_flash_base = 0x10000000;
if (lasat_board_info.li_flash_size < 0x1000000) {
lb[LASAT_MTD_BOOTLOADER] = 0x10000000;
ls[LASAT_MTD_CONFIG] = 0x100000;
if (lasat_board_info.li_flash_size >= 0x400000)
ls[LASAT_MTD_FS] =
lasat_board_info.li_flash_size - 0x300000;
}
}
for (i = 1; i < LASAT_MTD_LAST; i++)
lb[i] = lb[i-1] + ls[i-1];
}
int lasat_init_board_info(void)
{
int c;
unsigned long crc;
unsigned long cfg0, cfg1;
const struct product_info *ppi;
int i_n_base_models = N_BASE_MODELS;
const char * const * i_txt_base_models = txt_base_models;
int i_n_prids = N_PRIDS;
memset(&lasat_board_info, 0, sizeof(lasat_board_info));
/* First read the EEPROM info */
EEPROMRead(0, (unsigned char *)&lasat_board_info.li_eeprom_info,
sizeof(struct lasat_eeprom_struct));
/* Check the CRC */
crc = EEPROM_CRC((unsigned char *)(&lasat_board_info.li_eeprom_info),
sizeof(struct lasat_eeprom_struct) - 4);
if (crc != lasat_board_info.li_eeprom_info.crc32) {
printk(KERN_WARNING "WARNING...\nWARNING...\nEEPROM CRC does "
"not match calculated, attempting to soldier on...\n");
}
if (lasat_board_info.li_eeprom_info.version != LASAT_EEPROM_VERSION) {
printk(KERN_WARNING "WARNING...\nWARNING...\nEEPROM version "
"%d, wanted version %d, attempting to soldier on...\n",
(unsigned int)lasat_board_info.li_eeprom_info.version,
LASAT_EEPROM_VERSION);
}
cfg0 = lasat_board_info.li_eeprom_info.cfg[0];
cfg1 = lasat_board_info.li_eeprom_info.cfg[1];
if (LASAT_W0_DSCTYPE(cfg0) != 1) {
printk(KERN_WARNING "WARNING...\nWARNING...\n"
"Invalid configuration read from EEPROM, attempting to "
"soldier on...");
}
/* We have a valid configuration */
switch (LASAT_W0_SDRAMBANKSZ(cfg0)) {
case 0:
lasat_board_info.li_memsize = 0x0800000;
break;
case 1:
lasat_board_info.li_memsize = 0x1000000;
break;
case 2:
lasat_board_info.li_memsize = 0x2000000;
break;
case 3:
lasat_board_info.li_memsize = 0x4000000;
break;
case 4:
lasat_board_info.li_memsize = 0x8000000;
break;
default:
lasat_board_info.li_memsize = 0;
}
switch (LASAT_W0_SDRAMBANKS(cfg0)) {
case 0:
break;
case 1:
lasat_board_info.li_memsize *= 2;
break;
default:
break;
}
switch (LASAT_W0_BUSSPEED(cfg0)) {
case 0x0:
lasat_board_info.li_bus_hz = 60000000;
break;
case 0x1:
lasat_board_info.li_bus_hz = 66000000;
break;
case 0x2:
lasat_board_info.li_bus_hz = 66666667;
break;
case 0x3:
lasat_board_info.li_bus_hz = 80000000;
break;
case 0x4:
lasat_board_info.li_bus_hz = 83333333;
break;
case 0x5:
lasat_board_info.li_bus_hz = 100000000;
break;
}
switch (LASAT_W0_CPUCLK(cfg0)) {
case 0x0:
lasat_board_info.li_cpu_hz =
lasat_board_info.li_bus_hz;
break;
case 0x1:
lasat_board_info.li_cpu_hz =
lasat_board_info.li_bus_hz +
(lasat_board_info.li_bus_hz >> 1);
break;
case 0x2:
lasat_board_info.li_cpu_hz =
lasat_board_info.li_bus_hz +
lasat_board_info.li_bus_hz;
break;
case 0x3:
lasat_board_info.li_cpu_hz =
lasat_board_info.li_bus_hz +
lasat_board_info.li_bus_hz +
(lasat_board_info.li_bus_hz >> 1);
break;
case 0x4:
lasat_board_info.li_cpu_hz =
lasat_board_info.li_bus_hz +
lasat_board_info.li_bus_hz +
lasat_board_info.li_bus_hz;
break;
}
/* Flash size */
switch (LASAT_W1_FLASHSIZE(cfg1)) {
case 0:
lasat_board_info.li_flash_size = 0x200000;
break;
case 1:
lasat_board_info.li_flash_size = 0x400000;
break;
case 2:
lasat_board_info.li_flash_size = 0x800000;
break;
case 3:
lasat_board_info.li_flash_size = 0x1000000;
break;
case 4:
lasat_board_info.li_flash_size = 0x2000000;
break;
}
init_flash_sizes();
lasat_board_info.li_bmid = LASAT_W0_BMID(cfg0);
lasat_board_info.li_prid = lasat_board_info.li_eeprom_info.prid;
if (lasat_board_info.li_prid == 0xffff || lasat_board_info.li_prid == 0)
lasat_board_info.li_prid = lasat_board_info.li_bmid;
/* Base model stuff */
if (lasat_board_info.li_bmid > i_n_base_models)
lasat_board_info.li_bmid = i_n_base_models;
strcpy(lasat_board_info.li_bmstr,
i_txt_base_models[lasat_board_info.li_bmid]);
/* Product ID dependent values */
c = lasat_board_info.li_prid;
if (c >= i_n_prids) {
strcpy(lasat_board_info.li_namestr, "Unknown Model");
strcpy(lasat_board_info.li_typestr, "Unknown Type");
} else {
ppi = &vendor_info_table[0].vi_product_info[c];
strcpy(lasat_board_info.li_namestr, ppi->pi_name);
if (ppi->pi_type)
strcpy(lasat_board_info.li_typestr, ppi->pi_type);
else
sprintf(lasat_board_info.li_typestr, "%d", 10 * c);
}
#if defined(CONFIG_INET) && defined(CONFIG_SYSCTL)
update_bcastaddr();
#endif
return 0;
}
void lasat_write_eeprom_info(void)
{
unsigned long crc;
/* Generate the CRC */
crc = EEPROM_CRC((unsigned char *)(&lasat_board_info.li_eeprom_info),
sizeof(struct lasat_eeprom_struct) - 4);
lasat_board_info.li_eeprom_info.crc32 = crc;
/* Write the EEPROM info */
EEPROMWrite(0, (unsigned char *)&lasat_board_info.li_eeprom_info,
sizeof(struct lasat_eeprom_struct));
}
arch/mips/lasat/lasat_models.h 0 → 100644
View file @ 1f21d2bd
/*
* Model description tables
*/
#include <linux/kernel.h>
struct product_info {
const char *pi_name;
const char *pi_type;
};
struct vendor_info {
const char *vi_name;
const struct product_info *vi_product_info;
};
/*
* Base models
*/
static const char * const txt_base_models[] = {
"MQ 2", "MQ Pro", "SP 25", "SP 50", "SP 100", "SP 5000", "SP 7000",
"SP 1000", "Unknown"
};
#define N_BASE_MODELS (ARRAY_SIZE(txt_base_models) - 1)
/*
* Eicon Networks
*/
static const char txt_en_mq[] = "Masquerade";
static const char txt_en_sp[] = "Safepipe";
static const struct product_info product_info_eicon[] = {
{ txt_en_mq, "II" }, /* 0 */
{ txt_en_mq, "Pro" }, /* 1 */
{ txt_en_sp, "25" }, /* 2 */
{ txt_en_sp, "50" }, /* 3 */
{ txt_en_sp, "100" }, /* 4 */
{ txt_en_sp, "5000" }, /* 5 */
{ txt_en_sp, "7000" }, /* 6 */
{ txt_en_sp, "30" }, /* 7 */
{ txt_en_sp, "5100" }, /* 8 */
{ txt_en_sp, "7100" }, /* 9 */
{ txt_en_sp, "1110" }, /* 10 */
{ txt_en_sp, "3020" }, /* 11 */
{ txt_en_sp, "3030" }, /* 12 */
{ txt_en_sp, "5020" }, /* 13 */
{ txt_en_sp, "5030" }, /* 14 */
{ txt_en_sp, "1120" }, /* 15 */
{ txt_en_sp, "1130" }, /* 16 */
{ txt_en_sp, "6010" }, /* 17 */
{ txt_en_sp, "6110" }, /* 18 */
{ txt_en_sp, "6210" }, /* 19 */
{ txt_en_sp, "1020" }, /* 20 */
{ txt_en_sp, "1040" }, /* 21 */
{ txt_en_sp, "1050" }, /* 22 */
{ txt_en_sp, "1060" }, /* 23 */
};
#define N_PRIDS ARRAY_SIZE(product_info_eicon)
/*
* The vendor table
*/
static struct vendor_info const vendor_info_table[] = {
{ "Eicon Networks", product_info_eicon },
};
#define N_VENDORS ARRAY_SIZE(vendor_info_table)
arch/mips/lasat/picvue.c 0 → 100644
View file @ 1f21d2bd
/*
* Picvue PVC160206 display driver
*
* Brian Murphy <brian@murphy.dk>
*
*/
#include <linux/kernel.h>
#include <linux/delay.h>
#include <asm/bootinfo.h>
#include <asm/lasat/lasat.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/string.h>
#include "picvue.h"
#define PVC_BUSY 0x80
#define PVC_NLINES 2
#define PVC_DISPMEM 80
#define PVC_LINELEN PVC_DISPMEM / PVC_NLINES
struct pvc_defs *picvue;
DECLARE_MUTEX(pvc_sem);
static void pvc_reg_write(u32 val)
{
*picvue->reg = val;
}
static u32 pvc_reg_read(void)
{
u32 tmp = *picvue->reg;
return tmp;
}
static void pvc_write_byte(u32 data, u8 byte)
{
data |= picvue->e;
pvc_reg_write(data);
data &= ~picvue->data_mask;
data |= byte << picvue->data_shift;
pvc_reg_write(data);
ndelay(220);
pvc_reg_write(data & ~picvue->e);
ndelay(220);
}
static u8 pvc_read_byte(u32 data)
{
u8 byte;
data |= picvue->e;
pvc_reg_write(data);
ndelay(220);
byte = (pvc_reg_read() & picvue->data_mask) >> picvue->data_shift;
data &= ~picvue->e;
pvc_reg_write(data);
ndelay(220);
return byte;
}
static u8 pvc_read_data(void)
{
u32 data = pvc_reg_read();
u8 byte;
data |= picvue->rw;
data &= ~picvue->rs;
pvc_reg_write(data);
ndelay(40);
byte = pvc_read_byte(data);
data |= picvue->rs;
pvc_reg_write(data);
return byte;
}
#define TIMEOUT 1000
static int pvc_wait(void)
{
int i = TIMEOUT;
int err = 0;
while ((pvc_read_data() & PVC_BUSY) && i)
i--;
if (i == 0)
err = -ETIME;
return err;
}
#define MODE_INST 0
#define MODE_DATA 1
static void pvc_write(u8 byte, int mode)
{
u32 data = pvc_reg_read();
data &= ~picvue->rw;
if (mode == MODE_DATA)
data |= picvue->rs;
else
data &= ~picvue->rs;
pvc_reg_write(data);
ndelay(40);
pvc_write_byte(data, byte);
if (mode == MODE_DATA)
data &= ~picvue->rs;
else
data |= picvue->rs;
pvc_reg_write(data);
pvc_wait();
}
void pvc_write_string(const unsigned char *str, u8 addr, int line)
{
int i = 0;
if (line > 0 && (PVC_NLINES > 1))
addr += 0x40 * line;
pvc_write(0x80 | addr, MODE_INST);
while (*str != 0 && i < PVC_LINELEN) {
pvc_write(*str++, MODE_DATA);
i++;
}
}
void pvc_write_string_centered(const unsigned char *str, int line)
{
int len = strlen(str);
u8 addr;
if (len > PVC_VISIBLE_CHARS)
addr = 0;
else
addr = (PVC_VISIBLE_CHARS - strlen(str))/2;
pvc_write_string(str, addr, line);
}
void pvc_dump_string(const unsigned char *str)
{
int len = strlen(str);
pvc_write_string(str, 0, 0);
if (len > PVC_VISIBLE_CHARS)
pvc_write_string(&str[PVC_VISIBLE_CHARS], 0, 1);
}
#define BM_SIZE 8
#define MAX_PROGRAMMABLE_CHARS 8
int pvc_program_cg(int charnum, u8 bitmap[BM_SIZE])
{
int i;
int addr;
if (charnum > MAX_PROGRAMMABLE_CHARS)
return -ENOENT;
addr = charnum * 8;
pvc_write(0x40 | addr, MODE_INST);
for (i = 0; i < BM_SIZE; i++)
pvc_write(bitmap[i], MODE_DATA);
return 0;
}
#define FUNC_SET_CMD 0x20
#define EIGHT_BYTE (1 << 4)
#define FOUR_BYTE 0
#define TWO_LINES (1 << 3)
#define ONE_LINE 0
#define LARGE_FONT (1 << 2)
#define SMALL_FONT 0
static void pvc_funcset(u8 cmd)
{
pvc_write(FUNC_SET_CMD | (cmd & (EIGHT_BYTE|TWO_LINES|LARGE_FONT)),
MODE_INST);
}
#define ENTRYMODE_CMD 0x4
#define AUTO_INC (1 << 1)
#define AUTO_DEC 0
#define CURSOR_FOLLOWS_DISP (1 << 0)
static void pvc_entrymode(u8 cmd)
{
pvc_write(ENTRYMODE_CMD | (cmd & (AUTO_INC|CURSOR_FOLLOWS_DISP)),
MODE_INST);
}
#define DISP_CNT_CMD 0x08
#define DISP_OFF 0
#define DISP_ON (1 << 2)
#define CUR_ON (1 << 1)
#define CUR_BLINK (1 << 0)
void pvc_dispcnt(u8 cmd)
{
pvc_write(DISP_CNT_CMD | (cmd & (DISP_ON|CUR_ON|CUR_BLINK)), MODE_INST);
}
#define MOVE_CMD 0x10
#define DISPLAY (1 << 3)
#define CURSOR 0
#define RIGHT (1 << 2)
#define LEFT 0
void pvc_move(u8 cmd)
{
pvc_write(MOVE_CMD | (cmd & (DISPLAY|RIGHT)), MODE_INST);
}
#define CLEAR_CMD 0x1
void pvc_clear(void)
{
pvc_write(CLEAR_CMD, MODE_INST);
}
#define HOME_CMD 0x2
void pvc_home(void)
{
pvc_write(HOME_CMD, MODE_INST);
}
int pvc_init(void)
{
u8 cmd = EIGHT_BYTE;
if (PVC_NLINES == 2)
cmd |= (SMALL_FONT|TWO_LINES);
else
cmd |= (LARGE_FONT|ONE_LINE);
pvc_funcset(cmd);
pvc_dispcnt(DISP_ON);
pvc_entrymode(AUTO_INC);
pvc_clear();
pvc_write_string_centered("Display", 0);
pvc_write_string_centered("Initialized", 1);
return 0;
}
module_init(pvc_init);
MODULE_LICENSE("GPL");
arch/mips/lasat/picvue.h 0 → 100644
View file @ 1f21d2bd
/*
* Picvue PVC160206 display driver
*
* Brian Murphy <brian.murphy@eicon.com>
*
*/
#include <asm/semaphore.h>
struct pvc_defs {
volatile u32 *reg;
u32 data_shift;
u32 data_mask;
u32 e;
u32 rw;
u32 rs;
};
extern struct pvc_defs *picvue;
#define PVC_NLINES 2
#define PVC_DISPMEM 80
#define PVC_LINELEN PVC_DISPMEM / PVC_NLINES
#define PVC_VISIBLE_CHARS 16
void pvc_write_string(const unsigned char *str, u8 addr, int line);
void pvc_write_string_centered(const unsigned char *str, int line);
void pvc_dump_string(const unsigned char *str);
#define BM_SIZE 8
#define MAX_PROGRAMMABLE_CHARS 8
int pvc_program_cg(int charnum, u8 bitmap[BM_SIZE]);
void pvc_dispcnt(u8 cmd);
#define DISP_OFF 0
#define DISP_ON (1 << 2)
#define CUR_ON (1 << 1)
#define CUR_BLINK (1 << 0)
void pvc_move(u8 cmd);
#define DISPLAY (1 << 3)
#define CURSOR 0
#define RIGHT (1 << 2)
#define LEFT 0
void pvc_clear(void);
void pvc_home(void);
extern struct semaphore pvc_sem;
arch/mips/lasat/picvue_proc.c 0 → 100644
View file @ 1f21d2bd
/*
* Picvue PVC160206 display driver
*
* Brian Murphy <brian.murphy@eicon.com>
*
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/proc_fs.h>
#include <linux/interrupt.h>
#include <linux/timer.h>
#include "picvue.h"
static char pvc_lines[PVC_NLINES][PVC_LINELEN+1];
static int pvc_linedata[PVC_NLINES];
static struct proc_dir_entry *pvc_display_dir;
static char *pvc_linename[PVC_NLINES] = {"line1", "line2"};
#define DISPLAY_DIR_NAME "display"
static int scroll_dir, scroll_interval;
static struct timer_list timer;
static void pvc_display(unsigned long data)
{
int i;
pvc_clear();
for (i = 0; i < PVC_NLINES; i++)
pvc_write_string(pvc_lines[i], 0, i);
}
static DECLARE_TASKLET(pvc_display_tasklet, &pvc_display, 0);
static int pvc_proc_read_line(char *page, char **start,
off_t off, int count,
int *eof, void *data)
{
char *origpage = page;
int lineno = *(int *)data;
if (lineno < 0 || lineno > PVC_NLINES) {
printk(KERN_WARNING "proc_read_line: invalid lineno %d\n", lineno);
return 0;
}
down(&pvc_sem);
page += sprintf(page, "%s\n", pvc_lines[lineno]);
up(&pvc_sem);
return page - origpage;
}
static int pvc_proc_write_line(struct file *file, const char *buffer,
unsigned long count, void *data)
{
int origcount = count;
int lineno = *(int *)data;
if (lineno < 0 || lineno > PVC_NLINES) {
printk(KERN_WARNING "proc_write_line: invalid lineno %d\n",
lineno);
return origcount;
}
if (count > PVC_LINELEN)
count = PVC_LINELEN;
if (buffer[count-1] == '\n')
count--;
down(&pvc_sem);
strncpy(pvc_lines[lineno], buffer, count);
pvc_lines[lineno][count] = '\0';
up(&pvc_sem);
tasklet_schedule(&pvc_display_tasklet);
return origcount;
}
static int pvc_proc_write_scroll(struct file *file, const char *buffer,
unsigned long count, void *data)
{
int origcount = count;
int cmd = simple_strtol(buffer, NULL, 10);
down(&pvc_sem);
if (scroll_interval != 0)
del_timer(&timer);
if (cmd == 0) {
scroll_dir = 0;
scroll_interval = 0;
} else {
if (cmd < 0) {
scroll_dir = -1;
scroll_interval = -cmd;
} else {
scroll_dir = 1;
scroll_interval = cmd;
}
add_timer(&timer);
}
up(&pvc_sem);
return origcount;
}
static int pvc_proc_read_scroll(char *page, char **start,
off_t off, int count,
int *eof, void *data)
{
char *origpage = page;
down(&pvc_sem);
page += sprintf(page, "%d\n", scroll_dir * scroll_interval);
up(&pvc_sem);
return page - origpage;
}
void pvc_proc_timerfunc(unsigned long data)
{
if (scroll_dir < 0)
pvc_move(DISPLAY|RIGHT);
else if (scroll_dir > 0)
pvc_move(DISPLAY|LEFT);
timer.expires = jiffies + scroll_interval;
add_timer(&timer);
}
static void pvc_proc_cleanup(void)
{
int i;
for (i = 0; i < PVC_NLINES; i++)
remove_proc_entry(pvc_linename[i], pvc_display_dir);
remove_proc_entry("scroll", pvc_display_dir);
remove_proc_entry(DISPLAY_DIR_NAME, NULL);
del_timer(&timer);
}
static int __init pvc_proc_init(void)
{
struct proc_dir_entry *proc_entry;
int i;
pvc_display_dir = proc_mkdir(DISPLAY_DIR_NAME, NULL);
if (pvc_display_dir == NULL)
goto error;
for (i = 0; i < PVC_NLINES; i++) {
strcpy(pvc_lines[i], "");
pvc_linedata[i] = i;
}
for (i = 0; i < PVC_NLINES; i++) {
proc_entry = create_proc_entry(pvc_linename[i], 0644,
pvc_display_dir);
if (proc_entry == NULL)
goto error;
proc_entry->read_proc = pvc_proc_read_line;
proc_entry->write_proc = pvc_proc_write_line;
proc_entry->data = &pvc_linedata[i];
}
proc_entry = create_proc_entry("scroll", 0644, pvc_display_dir);
if (proc_entry == NULL)
goto error;
proc_entry->write_proc = pvc_proc_write_scroll;
proc_entry->read_proc = pvc_proc_read_scroll;
init_timer(&timer);
timer.function = pvc_proc_timerfunc;
return 0;
error:
pvc_proc_cleanup();
return -ENOMEM;
}
module_init(pvc_proc_init);
module_exit(pvc_proc_cleanup);
MODULE_LICENSE("GPL");
arch/mips/lasat/prom.c 0 → 100644
View file @ 1f21d2bd
/*
* PROM interface routines.
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/ctype.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
#include <linux/ioport.h>
#include <asm/bootinfo.h>
#include <asm/lasat/lasat.h>
#include <asm/cpu.h>
#include "at93c.h"
#include <asm/lasat/eeprom.h>
#include "prom.h"
#define RESET_VECTOR 0xbfc00000
#define PROM_JUMP_TABLE_ENTRY(n) (*((u32 *)(RESET_VECTOR + 0x20) + n))
#define PROM_DISPLAY_ADDR PROM_JUMP_TABLE_ENTRY(0)
#define PROM_PUTC_ADDR PROM_JUMP_TABLE_ENTRY(1)
#define PROM_MONITOR_ADDR PROM_JUMP_TABLE_ENTRY(2)
static void null_prom_display(const char *string, int pos, int clear)
{
}
static void null_prom_monitor(void)
{
}
static void null_prom_putc(char c)
{
}
/* these are functions provided by the bootloader */
static void (*__prom_putc)(char c) = null_prom_putc;
void prom_putchar(char c)
{
__prom_putc(c);
}
void (*prom_display)(const char *string, int pos, int clear) =
null_prom_display;
void (*prom_monitor)(void) = null_prom_monitor;
unsigned int lasat_ndelay_divider;
static void setup_prom_vectors(void)
{
u32 version = *(u32 *)(RESET_VECTOR + 0x90);
if (version >= 307) {
prom_display = (void *)PROM_DISPLAY_ADDR;
__prom_putc = (void *)PROM_PUTC_ADDR;
prom_monitor = (void *)PROM_MONITOR_ADDR;
}
printk(KERN_DEBUG "prom vectors set up\n");
}
static struct at93c_defs at93c_defs[N_MACHTYPES] = {
{
.reg = (void *)AT93C_REG_100,
.rdata_reg = (void *)AT93C_RDATA_REG_100,
.rdata_shift = AT93C_RDATA_SHIFT_100,
.wdata_shift = AT93C_WDATA_SHIFT_100,
.cs = AT93C_CS_M_100,
.clk = AT93C_CLK_M_100
}, {
.reg = (void *)AT93C_REG_200,
.rdata_reg = (void *)AT93C_RDATA_REG_200,
.rdata_shift = AT93C_RDATA_SHIFT_200,
.wdata_shift = AT93C_WDATA_SHIFT_200,
.cs = AT93C_CS_M_200,
.clk = AT93C_CLK_M_200
},
};
void __init prom_init(void)
{
int argc = fw_arg0;
char **argv = (char **) fw_arg1;
setup_prom_vectors();
if (current_cpu_data.cputype == CPU_R5000) {
printk(KERN_INFO "LASAT 200 board\n");
mips_machtype = MACH_LASAT_200;
lasat_ndelay_divider = LASAT_200_DIVIDER;
} else {
printk(KERN_INFO "LASAT 100 board\n");
mips_machtype = MACH_LASAT_100;
lasat_ndelay_divider = LASAT_100_DIVIDER;
}
at93c = &at93c_defs[mips_machtype];
lasat_init_board_info(); /* Read info from EEPROM */
mips_machgroup = MACH_GROUP_LASAT;
/* Get the command line */
if (argc > 0) {
strncpy(arcs_cmdline, argv[0], CL_SIZE-1);
arcs_cmdline[CL_SIZE-1] = '\0';
}
/* Set the I/O base address */
set_io_port_base(KSEG1);
/* Set memory regions */
ioport_resource.start = 0;
ioport_resource.end = 0xffffffff; /* Wrong, fixme. */
add_memory_region(0, lasat_board_info.li_memsize, BOOT_MEM_RAM);
}
void __init prom_free_prom_memory(void)
{
}
const char *get_system_type(void)
{
return lasat_board_info.li_bmstr;
}
arch/mips/lasat/prom.h 0 → 100644
View file @ 1f21d2bd
#ifndef __PROM_H
#define __PROM_H
extern void (*prom_display)(const char *string, int pos, int clear);
extern void (*prom_monitor)(void);
#endif /* __PROM_H */
arch/mips/lasat/reset.c 0 → 100644
View file @ 1f21d2bd
/*
* Thomas Horsten <thh@lasat.com>
* Copyright (C) 2000 LASAT Networks A/S.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Reset the LASAT board.
*/
#include <linux/kernel.h>
#include <linux/pm.h>
#include <asm/reboot.h>
#include <asm/system.h>
#include <asm/lasat/lasat.h>
#include "picvue.h"
#include "prom.h"
static void lasat_machine_restart(char *command);
static void lasat_machine_halt(void);
/* Used to set machine to boot in service mode via /proc interface */
int lasat_boot_to_service;
static void lasat_machine_restart(char *command)
{
local_irq_disable();
if (lasat_boot_to_service) {
*(volatile unsigned int *)0xa0000024 = 0xdeadbeef;
*(volatile unsigned int *)0xa00000fc = 0xfedeabba;
}
*lasat_misc->reset_reg = 0xbedead;
for (;;) ;
}
static void lasat_machine_halt(void)
{
local_irq_disable();
prom_monitor();
for (;;) ;
}
void lasat_reboot_setup(void)
{
_machine_restart = lasat_machine_restart;
_machine_halt = lasat_machine_halt;
pm_power_off = lasat_machine_halt;
}
arch/mips/lasat/serial.c 0 → 100644
View file @ 1f21d2bd
/*
* Registration of Lasat UART platform device.
*
* Copyright (C) 2007 Brian Murphy <brian@murphy.dk>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <asm/bootinfo.h>
#include <asm/lasat/lasat.h>
#include <asm/lasat/serial.h>
static struct resource lasat_serial_res[2] __initdata;
static struct plat_serial8250_port lasat_serial8250_port[] = {
{
.iotype = UPIO_MEM,
.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF |
UPF_SKIP_TEST,
},
{},
};
static __init int lasat_uart_add(void)
{
struct platform_device *pdev;
int retval;
pdev = platform_device_alloc("serial8250", -1);
if (!pdev)
return -ENOMEM;
if (mips_machtype == MACH_LASAT_100) {
lasat_serial_res[0].start = KSEG1ADDR(LASAT_UART_REGS_BASE_100);
lasat_serial_res[0].end = lasat_serial_res[0].start + LASAT_UART_REGS_SHIFT_100 * 8 - 1;
lasat_serial_res[0].flags = IORESOURCE_MEM;
lasat_serial_res[1].start = LASATINT_UART_100;
lasat_serial_res[1].end = LASATINT_UART_100;
lasat_serial_res[1].flags = IORESOURCE_IRQ;
lasat_serial8250_port[0].mapbase = LASAT_UART_REGS_BASE_100;
lasat_serial8250_port[0].uartclk = LASAT_BASE_BAUD_100 * 16;
lasat_serial8250_port[0].regshift = LASAT_UART_REGS_SHIFT_100;
lasat_serial8250_port[0].irq = LASATINT_UART_100;
} else {
lasat_serial_res[0].start = KSEG1ADDR(LASAT_UART_REGS_BASE_200);
lasat_serial_res[0].end = lasat_serial_res[0].start + LASAT_UART_REGS_SHIFT_200 * 8 - 1;
lasat_serial_res[0].flags = IORESOURCE_MEM;
lasat_serial_res[1].start = LASATINT_UART_200;
lasat_serial_res[1].end = LASATINT_UART_200;
lasat_serial_res[1].flags = IORESOURCE_IRQ;
lasat_serial8250_port[0].mapbase = LASAT_UART_REGS_BASE_200;
lasat_serial8250_port[0].uartclk = LASAT_BASE_BAUD_200 * 16;
lasat_serial8250_port[0].regshift = LASAT_UART_REGS_SHIFT_200;
lasat_serial8250_port[0].irq = LASATINT_UART_200;
}
pdev->id = PLAT8250_DEV_PLATFORM;
pdev->dev.platform_data = lasat_serial8250_port;
retval = platform_device_add_resources(pdev, lasat_serial_res, ARRAY_SIZE(lasat_serial_res));
if (retval)
goto err_free_device;
retval = platform_device_add(pdev);
if (retval)
goto err_free_device;
return 0;
err_free_device:
platform_device_put(pdev);
return retval;
}
device_initcall(lasat_uart_add);
arch/mips/lasat/setup.c 0 → 100644
View file @ 1f21d2bd
/*
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 1999 MIPS Technologies, Inc. All rights reserved.
*
* Thomas Horsten <thh@lasat.com>
* Copyright (C) 2000 LASAT Networks A/S.
*
* Brian Murphy <brian@murphy.dk>
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Lasat specific setup.
*/
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/tty.h>
#include <asm/time.h>
#include <asm/cpu.h>
#include <asm/bootinfo.h>
#include <asm/irq.h>
#include <asm/lasat/lasat.h>
#include <asm/lasat/serial.h>
#ifdef CONFIG_PICVUE
#include <linux/notifier.h>
#endif
#include "ds1603.h"
#include <asm/lasat/ds1603.h>
#include <asm/lasat/picvue.h>
#include <asm/lasat/eeprom.h>
#include "prom.h"
int lasat_command_line;
void lasatint_init(void);
extern void lasat_reboot_setup(void);
extern void pcisetup(void);
extern void edhac_init(void *, void *, void *);
extern void addrflt_init(void);
struct lasat_misc lasat_misc_info[N_MACHTYPES] = {
{
.reset_reg = (void *)KSEG1ADDR(0x1c840000),
.flash_wp_reg = (void *)KSEG1ADDR(0x1c800000), 2
}, {
.reset_reg = (void *)KSEG1ADDR(0x11080000),
.flash_wp_reg = (void *)KSEG1ADDR(0x11000000), 6
}
};
struct lasat_misc *lasat_misc;
#ifdef CONFIG_DS1603
static struct ds_defs ds_defs[N_MACHTYPES] = {
{ (void *)DS1603_REG_100, (void *)DS1603_REG_100,
DS1603_RST_100, DS1603_CLK_100, DS1603_DATA_100,
DS1603_DATA_SHIFT_100, 0, 0 },
{ (void *)DS1603_REG_200, (void *)DS1603_DATA_REG_200,
DS1603_RST_200, DS1603_CLK_200, DS1603_DATA_200,
DS1603_DATA_READ_SHIFT_200, 1, 2000 }
};
#endif
#ifdef CONFIG_PICVUE
#include "picvue.h"
static struct pvc_defs pvc_defs[N_MACHTYPES] = {
{ (void *)PVC_REG_100, PVC_DATA_SHIFT_100, PVC_DATA_M_100,
PVC_E_100, PVC_RW_100, PVC_RS_100 },
{ (void *)PVC_REG_200, PVC_DATA_SHIFT_200, PVC_DATA_M_200,
PVC_E_200, PVC_RW_200, PVC_RS_200 }
};
#endif
static int lasat_panic_display(struct notifier_block *this,
unsigned long event, void *ptr)
{
#ifdef CONFIG_PICVUE
unsigned char *string = ptr;
if (string == NULL)
string = "Kernel Panic";
pvc_dump_string(string);
#endif
return NOTIFY_DONE;
}
static int lasat_panic_prom_monitor(struct notifier_block *this,
unsigned long event, void *ptr)
{
prom_monitor();
return NOTIFY_DONE;
}
static struct notifier_block lasat_panic_block[] =
{
{
.notifier_call = lasat_panic_display,
.priority = INT_MAX
}, {
.notifier_call = lasat_panic_prom_monitor,
.priority = INT_MIN
}
};
static void lasat_time_init(void)
{
mips_hpt_frequency = lasat_board_info.li_cpu_hz / 2;
}
void __init plat_timer_setup(struct irqaction *irq)
{
change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5);
}
void __init plat_mem_setup(void)
{
int i;
lasat_misc = &lasat_misc_info[mips_machtype];
#ifdef CONFIG_PICVUE
picvue = &pvc_defs[mips_machtype];
#endif
/* Set up panic notifier */
for (i = 0; i < ARRAY_SIZE(lasat_panic_block); i++)
atomic_notifier_chain_register(&panic_notifier_list,
&lasat_panic_block[i]);
lasat_reboot_setup();
board_time_init = lasat_time_init;
#ifdef CONFIG_DS1603
ds1603 = &ds_defs[mips_machtype];
rtc_mips_get_time = ds1603_read;
rtc_mips_set_time = ds1603_set;
#endif
#ifdef DYNAMIC_SERIAL_INIT
serial_init();
#endif
pr_info("Lasat specific initialization complete\n");
}
arch/mips/lasat/sysctl.c 0 → 100644
View file @ 1f21d2bd
/*
* Thomas Horsten <thh@lasat.com>
* Copyright (C) 2000 LASAT Networks A/S.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Routines specific to the LASAT boards
*/
#include <linux/types.h>
#include <asm/lasat/lasat.h>
#include <linux/module.h>
#include <linux/sysctl.h>
#include <linux/stddef.h>
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/ctype.h>
#include <linux/string.h>
#include <linux/net.h>
#include <linux/inet.h>
#include <linux/mutex.h>
#include <linux/uaccess.h>
#include "sysctl.h"
#include "ds1603.h"
static DEFINE_MUTEX(lasat_info_mutex);
/* Strategy function to write EEPROM after changing string entry */
int sysctl_lasatstring(ctl_table *table, int *name, int nlen,
void *oldval, size_t *oldlenp,
void *newval, size_t newlen)
{
int r;
mutex_lock(&lasat_info_mutex);
r = sysctl_string(table, name,
nlen, oldval, oldlenp, newval, newlen);
if (r < 0) {
mutex_unlock(&lasat_info_mutex);
return r;
}
if (newval && newlen)
lasat_write_eeprom_info();
mutex_unlock(&lasat_info_mutex);
return 1;
}
/* And the same for proc */
int proc_dolasatstring(ctl_table *table, int write, struct file *filp,
void *buffer, size_t *lenp, loff_t *ppos)
{
int r;
mutex_lock(&lasat_info_mutex);
r = proc_dostring(table, write, filp, buffer, lenp, ppos);
if ((!write) || r) {
mutex_unlock(&lasat_info_mutex);
return r;
}
lasat_write_eeprom_info();
mutex_unlock(&lasat_info_mutex);
return 0;
}
/* proc function to write EEPROM after changing int entry */
int proc_dolasatint(ctl_table *table, int write, struct file *filp,
void *buffer, size_t *lenp, loff_t *ppos)
{
int r;
mutex_lock(&lasat_info_mutex);
r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
if ((!write) || r) {
mutex_unlock(&lasat_info_mutex);
return r;
}
lasat_write_eeprom_info();
mutex_unlock(&lasat_info_mutex);
return 0;
}
static int rtctmp;
#ifdef CONFIG_DS1603
/* proc function to read/write RealTime Clock */
int proc_dolasatrtc(ctl_table *table, int write, struct file *filp,
void *buffer, size_t *lenp, loff_t *ppos)
{
int r;
mutex_lock(&lasat_info_mutex);
if (!write) {
rtctmp = ds1603_read();
/* check for time < 0 and set to 0 */
if (rtctmp < 0)
rtctmp = 0;
}
r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
if ((!write) || r) {
mutex_unlock(&lasat_info_mutex);
return r;
}
ds1603_set(rtctmp);
mutex_unlock(&lasat_info_mutex);
return 0;
}
#endif
/* Sysctl for setting the IP addresses */
int sysctl_lasat_intvec(ctl_table *table, int *name, int nlen,
void *oldval, size_t *oldlenp,
void *newval, size_t newlen)
{
int r;
mutex_lock(&lasat_info_mutex);
r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen);
if (r < 0) {
mutex_unlock(&lasat_info_mutex);
return r;
}
if (newval && newlen)
lasat_write_eeprom_info();
mutex_unlock(&lasat_info_mutex);
return 1;
}
#ifdef CONFIG_DS1603
/* Same for RTC */
int sysctl_lasat_rtc(ctl_table *table, int *name, int nlen,
void *oldval, size_t *oldlenp,
void *newval, size_t newlen)
{
int r;
mutex_lock(&lasat_info_mutex);
rtctmp = ds1603_read();
if (rtctmp < 0)
rtctmp = 0;
r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen);
if (r < 0) {
mutex_unlock(&lasat_info_mutex);
return r;
}
if (newval && newlen)
ds1603_set(rtctmp);
mutex_unlock(&lasat_info_mutex);
return 1;
}
#endif
#ifdef CONFIG_INET
static char lasat_bcastaddr[16];
void update_bcastaddr(void)
{
unsigned int ip;
ip = (lasat_board_info.li_eeprom_info.ipaddr &
lasat_board_info.li_eeprom_info.netmask) |
~lasat_board_info.li_eeprom_info.netmask;
sprintf(lasat_bcastaddr, "%d.%d.%d.%d",
(ip) & 0xff,
(ip >> 8) & 0xff,
(ip >> 16) & 0xff,
(ip >> 24) & 0xff);
}
static char proc_lasat_ipbuf[32];
/* Parsing of IP address */
int proc_lasat_ip(ctl_table *table, int write, struct file *filp,
void *buffer, size_t *lenp, loff_t *ppos)
{
unsigned int ip;
char *p, c;
int len;
if (!table->data || !table->maxlen || !*lenp ||
(*ppos && !write)) {
*lenp = 0;
return 0;
}
mutex_lock(&lasat_info_mutex);
if (write) {
len = 0;
p = buffer;
while (len < *lenp) {
if (get_user(c, p++)) {
mutex_unlock(&lasat_info_mutex);
return -EFAULT;
}
if (c == 0 || c == '\n')
break;
len++;
}
if (len >= sizeof(proc_lasat_ipbuf)-1)
len = sizeof(proc_lasat_ipbuf) - 1;
if (copy_from_user(proc_lasat_ipbuf, buffer, len)) {
mutex_unlock(&lasat_info_mutex);
return -EFAULT;
}
proc_lasat_ipbuf[len] = 0;
*ppos += *lenp;
/* Now see if we can convert it to a valid IP */
ip = in_aton(proc_lasat_ipbuf);
*(unsigned int *)(table->data) = ip;
lasat_write_eeprom_info();
} else {
ip = *(unsigned int *)(table->data);
sprintf(proc_lasat_ipbuf, "%d.%d.%d.%d",
(ip) & 0xff,
(ip >> 8) & 0xff,
(ip >> 16) & 0xff,
(ip >> 24) & 0xff);
len = strlen(proc_lasat_ipbuf);
if (len > *lenp)
len = *lenp;
if (len)
if (copy_to_user(buffer, proc_lasat_ipbuf, len)) {
mutex_unlock(&lasat_info_mutex);
return -EFAULT;
}
if (len < *lenp) {
if (put_user('\n', ((char *) buffer) + len)) {
mutex_unlock(&lasat_info_mutex);
return -EFAULT;
}
len++;
}
*lenp = len;
*ppos += len;
}
update_bcastaddr();
mutex_unlock(&lasat_info_mutex);
return 0;
}
#endif /* defined(CONFIG_INET) */
static int sysctl_lasat_eeprom_value(ctl_table *table, int *name, int nlen,
void *oldval, size_t *oldlenp,
void *newval, size_t newlen)
{
int r;
mutex_lock(&lasat_info_mutex);
r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen);
if (r < 0) {
mutex_unlock(&lasat_info_mutex);
return r;
}
if (newval && newlen) {
if (name && *name == LASAT_PRID)
lasat_board_info.li_eeprom_info.prid = *(int *)newval;
lasat_write_eeprom_info();
lasat_init_board_info();
}
mutex_unlock(&lasat_info_mutex);
return 0;
}
int proc_lasat_eeprom_value(ctl_table *table, int write, struct file *filp,
void *buffer, size_t *lenp, loff_t *ppos)
{
int r;
mutex_lock(&lasat_info_mutex);
r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
if ((!write) || r) {
mutex_unlock(&lasat_info_mutex);
return r;
}
if (filp && filp->f_path.dentry) {
if (!strcmp(filp->f_path.dentry->d_name.name, "prid"))
lasat_board_info.li_eeprom_info.prid =
lasat_board_info.li_prid;
if (!strcmp(filp->f_path.dentry->d_name.name, "debugaccess"))
lasat_board_info.li_eeprom_info.debugaccess =
lasat_board_info.li_debugaccess;
}
lasat_write_eeprom_info();
mutex_unlock(&lasat_info_mutex);
return 0;
}
extern int lasat_boot_to_service;
#ifdef CONFIG_SYSCTL
static ctl_table lasat_table[] = {
{
.ctl_name = CTL_UNNUMBERED,
.procname = "cpu-hz",
.data = &lasat_board_info.li_cpu_hz,
.maxlen = sizeof(int),
.mode = 0444,
.proc_handler = &proc_dointvec,
.strategy = &sysctl_intvec
},
{
.ctl_name = CTL_UNNUMBERED,
.procname = "bus-hz",
.data = &lasat_board_info.li_bus_hz,
.maxlen = sizeof(int),
.mode = 0444,
.proc_handler = &proc_dointvec,
.strategy = &sysctl_intvec
},
{
.ctl_name = CTL_UNNUMBERED,
.procname = "bmid",
.data = &lasat_board_info.li_bmid,
.maxlen = sizeof(int),
.mode = 0444,
.proc_handler = &proc_dointvec,
.strategy = &sysctl_intvec
},
{
.ctl_name = CTL_UNNUMBERED,
.procname = "prid",
.data = &lasat_board_info.li_prid,
.maxlen = sizeof(int),
.mode = 0644,
.proc_handler = &proc_lasat_eeprom_value,
.strategy = &sysctl_lasat_eeprom_value
},
#ifdef CONFIG_INET
{
.ctl_name = CTL_UNNUMBERED,
.procname = "ipaddr",
.data = &lasat_board_info.li_eeprom_info.ipaddr,
.maxlen = sizeof(int),
.mode = 0644,
.proc_handler = &proc_lasat_ip,
.strategy = &sysctl_lasat_intvec
},
{
.ctl_name = LASAT_NETMASK,
.procname = "netmask",
.data = &lasat_board_info.li_eeprom_info.netmask,
.maxlen = sizeof(int),
.mode = 0644,
.proc_handler = &proc_lasat_ip,
.strategy = &sysctl_lasat_intvec
},
{
.ctl_name = CTL_UNNUMBERED,
.procname = "bcastaddr",
.data = &lasat_bcastaddr,
.maxlen = sizeof(lasat_bcastaddr),
.mode = 0600,
.proc_handler = &proc_dostring,
.strategy = &sysctl_string
},
#endif
{
.ctl_name = CTL_UNNUMBERED,
.procname = "passwd_hash",
.data = &lasat_board_info.li_eeprom_info.passwd_hash,
.maxlen =
sizeof(lasat_board_info.li_eeprom_info.passwd_hash),
.mode = 0600,
.proc_handler = &proc_dolasatstring,
.strategy = &sysctl_lasatstring
},
{
.ctl_name = CTL_UNNUMBERED,
.procname = "boot-service",
.data = &lasat_boot_to_service,
.maxlen = sizeof(int),
.mode = 0644,
.proc_handler = &proc_dointvec,
.strategy = &sysctl_intvec
},
#ifdef CONFIG_DS1603
{
.ctl_name = CTL_UNNUMBERED,
.procname = "rtc",
.data = &rtctmp,
.maxlen = sizeof(int),
.mode = 0644,
.proc_handler = &proc_dolasatrtc,
.strategy = &sysctl_lasat_rtc
},
#endif
{
.ctl_name = CTL_UNNUMBERED,
.procname = "namestr",
.data = &lasat_board_info.li_namestr,
.maxlen = sizeof(lasat_board_info.li_namestr),
.mode = 0444,
.proc_handler = &proc_dostring,
.strategy = &sysctl_string
},
{
.ctl_name = CTL_UNNUMBERED,
.procname = "typestr",
.data = &lasat_board_info.li_typestr,
.maxlen = sizeof(lasat_board_info.li_typestr),
.mode = 0444,
.proc_handler = &proc_dostring,
.strategy = &sysctl_string
},
{}
};
static ctl_table lasat_root_table[] = {
{
.ctl_name = CTL_UNNUMBERED,
.procname = "lasat",
.mode = 0555,
.child = lasat_table
},
{}
};
static int __init lasat_register_sysctl(void)
{
struct ctl_table_header *lasat_table_header;
lasat_table_header =
register_sysctl_table(lasat_root_table);
return 0;
}
__initcall(lasat_register_sysctl);
#endif /* CONFIG_SYSCTL */
arch/mips/lasat/sysctl.h 0 → 100644
View file @ 1f21d2bd
/*
* LASAT sysctl values
*/
#ifndef _LASAT_SYSCTL_H
#define _LASAT_SYSCTL_H
/* /proc/sys/lasat */
enum {
LASAT_CPU_HZ = 1,
LASAT_BUS_HZ,
LASAT_MODEL,
LASAT_PRID,
LASAT_IPADDR,
LASAT_NETMASK,
LASAT_BCAST,
LASAT_PASSWORD,
LASAT_SBOOT,
LASAT_RTC,
LASAT_NAMESTR,
LASAT_TYPESTR,
};
#endif /* _LASAT_SYSCTL_H */
arch/mips/pci/Makefile
View file @ 1f21d2bd
...@@ -10,6 +10,7 @@ obj-y += pci.o ...@@ -10,6 +10,7 @@ obj-y += pci.o
obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
obj-$(CONFIG_MIPS_MSC) += ops-msc.o obj-$(CONFIG_MIPS_MSC) += ops-msc.o
obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o
obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o
...@@ -19,6 +20,7 @@ obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o ...@@ -19,6 +20,7 @@ obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
# These are still pretty much in the old state, watch, go blind. # These are still pretty much in the old state, watch, go blind.
# #
obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o
obj-$(CONFIG_LASAT) += pci-lasat.o
obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
......
arch/mips/pci/ops-nile4.c 0 → 100644
View file @ 1f21d2bd
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <asm/bootinfo.h>
#include <asm/lasat/lasat.h>
#include <asm/gt64120.h>
#include <asm/nile4.h>
#define PCI_ACCESS_READ 0
#define PCI_ACCESS_WRITE 1
#define LO(reg) (reg / 4)
#define HI(reg) (reg / 4 + 1)
volatile unsigned long *const vrc_pciregs = (void *) Vrc5074_BASE;
static DEFINE_SPINLOCK(nile4_pci_lock);
static int nile4_pcibios_config_access(unsigned char access_type,
struct pci_bus *bus, unsigned int devfn, int where, u32 *val)
{
unsigned char busnum = bus->number;
u32 adr, mask, err;
if ((busnum == 0) && (PCI_SLOT(devfn) > 8))
/* The addressing scheme chosen leaves room for just
* 8 devices on the first busnum (besides the PCI
* controller itself) */
return PCIBIOS_DEVICE_NOT_FOUND;
if ((busnum == 0) && (devfn == PCI_DEVFN(0, 0))) {
/* Access controller registers directly */
if (access_type == PCI_ACCESS_WRITE) {
vrc_pciregs[(0x200 + where) >> 2] = *val;
} else {
*val = vrc_pciregs[(0x200 + where) >> 2];
}
return PCIBIOS_SUCCESSFUL;
}
/* Temporarily map PCI Window 1 to config space */
mask = vrc_pciregs[LO(NILE4_PCIINIT1)];
vrc_pciregs[LO(NILE4_PCIINIT1)] = 0x0000001a | (busnum ? 0x200 : 0);
/* Clear PCI Error register. This also clears the Error Type
* bits in the Control register */
vrc_pciregs[LO(NILE4_PCIERR)] = 0;
vrc_pciregs[HI(NILE4_PCIERR)] = 0;
/* Setup address */
if (busnum == 0)
adr =
KSEG1ADDR(PCI_WINDOW1) +
((1 << (PCI_SLOT(devfn) + 15)) | (PCI_FUNC(devfn) << 8)
| (where & ~3));
else
adr = KSEG1ADDR(PCI_WINDOW1) | (busnum << 16) | (devfn << 8) |
(where & ~3);
if (access_type == PCI_ACCESS_WRITE)
*(u32 *) adr = *val;
else
*val = *(u32 *) adr;
/* Check for master or target abort */
err = (vrc_pciregs[HI(NILE4_PCICTRL)] >> 5) & 0x7;
/* Restore PCI Window 1 */
vrc_pciregs[LO(NILE4_PCIINIT1)] = mask;
if (err)
return PCIBIOS_DEVICE_NOT_FOUND;
return PCIBIOS_SUCCESSFUL;
}
static int nile4_pcibios_read(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 *val)
{
unsigned long flags;
u32 data = 0;
int err;
if ((size == 2) && (where & 1))
return PCIBIOS_BAD_REGISTER_NUMBER;
else if ((size == 4) && (where & 3))
return PCIBIOS_BAD_REGISTER_NUMBER;
spin_lock_irqsave(&nile4_pci_lock, flags);
err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
&data);
spin_unlock_irqrestore(&nile4_pci_lock, flags);
if (err)
return err;
if (size == 1)
*val = (data >> ((where & 3) << 3)) & 0xff;
else if (size == 2)
*val = (data >> ((where & 3) << 3)) & 0xffff;
else
*val = data;
return PCIBIOS_SUCCESSFUL;
}
static int nile4_pcibios_write(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val)
{
unsigned long flags;
u32 data = 0;
int err;
if ((size == 2) && (where & 1))
return PCIBIOS_BAD_REGISTER_NUMBER;
else if ((size == 4) && (where & 3))
return PCIBIOS_BAD_REGISTER_NUMBER;
spin_lock_irqsave(&nile4_pci_lock, flags);
err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
&data);
spin_unlock_irqrestore(&nile4_pci_lock, flags);
if (err)
return err;
if (size == 1)
data = (data & ~(0xff << ((where & 3) << 3))) |
(val << ((where & 3) << 3));
else if (size == 2)
data = (data & ~(0xffff << ((where & 3) << 3))) |
(val << ((where & 3) << 3));
else
data = val;
if (nile4_pcibios_config_access
(PCI_ACCESS_WRITE, bus, devfn, where, &data))
return -1;
return PCIBIOS_SUCCESSFUL;
}
struct pci_ops nile4_pci_ops = {
.read = nile4_pcibios_read,
.write = nile4_pcibios_write,
};
arch/mips/pci/pci-lasat.c 0 → 100644
View file @ 1f21d2bd
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2000, 2001, 04 Keith M Wesolowski
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <asm/bootinfo.h>
extern struct pci_ops nile4_pci_ops;
extern struct pci_ops gt64xxx_pci0_ops;
static struct resource lasat_pci_mem_resource = {
.name = "LASAT PCI MEM",
.start = 0x18000000,
.end = 0x19ffffff,
.flags = IORESOURCE_MEM,
};
static struct resource lasat_pci_io_resource = {
.name = "LASAT PCI IO",
.start = 0x1a000000,
.end = 0x1bffffff,
.flags = IORESOURCE_IO,
};
static struct pci_controller lasat_pci_controller = {
.mem_resource = &lasat_pci_mem_resource,
.io_resource = &lasat_pci_io_resource,
};
static int __init lasat_pci_setup(void)
{
printk(KERN_DEBUG "PCI: starting\n");
switch (mips_machtype) {
case MACH_LASAT_100:
lasat_pci_controller.pci_ops = &gt64xxx_pci0_ops;
break;
case MACH_LASAT_200:
lasat_pci_controller.pci_ops = &nile4_pci_ops;
break;
default:
panic("pcibios_init: mips_machtype incorrect");
}
register_pci_controller(&lasat_pci_controller);
return 0;
}
arch_initcall(lasat_pci_setup);
#define LASATINT_ETH1 0
#define LASATINT_ETH0 1
#define LASATINT_HDC 2
#define LASATINT_COMP 3
#define LASATINT_HDLC 4
#define LASATINT_PCIA 5
#define LASATINT_PCIB 6
#define LASATINT_PCIC 7
#define LASATINT_PCID 8
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
switch (slot) {
case 1:
case 2:
case 3:
return LASATINT_PCIA + (((slot-1) + (pin-1)) % 4);
case 4:
return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */
case 5:
return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */
case 6:
return LASATINT_HDC; /* IDE controller */
default:
return 0xff; /* Illegal */
}
return -1;
}
/* Do platform specific device initialization at pci_enable_device() time */
int pcibios_plat_dev_init(struct pci_dev *dev)
{
return 0;
}
include/asm-mips/bootinfo.h
View file @ 1f21d2bd
...@@ -174,6 +174,13 @@ ...@@ -174,6 +174,13 @@
#define MACH_GROUP_HP_LJ 20 /* Hewlett Packard LaserJet */ #define MACH_GROUP_HP_LJ 20 /* Hewlett Packard LaserJet */
#define MACH_HP_LASERJET 1 #define MACH_HP_LASERJET 1
/*
* Valid machtype for group LASAT
*/
#define MACH_GROUP_LASAT 21
#define MACH_LASAT_100 0 /* Masquerade II/SP100/SP50/SP25 */
#define MACH_LASAT_200 1 /* Masquerade PRO/SP200 */
/* /*
* Valid machtype for group TITAN * Valid machtype for group TITAN
*/ */
......
include/asm-mips/lasat/ds1603.h 0 → 100644
View file @ 1f21d2bd
#include <asm/addrspace.h>
/* Lasat 100 */
#define DS1603_REG_100 (KSEG1ADDR(0x1c810000))
#define DS1603_RST_100 (1 << 2)
#define DS1603_CLK_100 (1 << 0)
#define DS1603_DATA_SHIFT_100 1
#define DS1603_DATA_100 (1 << DS1603_DATA_SHIFT_100)
/* Lasat 200 */
#define DS1603_REG_200 (KSEG1ADDR(0x11000000))
#define DS1603_RST_200 (1 << 3)
#define DS1603_CLK_200 (1 << 4)
#define DS1603_DATA_200 (1 << 5)
#define DS1603_DATA_REG_200 (DS1603_REG_200 + 0x10000)
#define DS1603_DATA_READ_SHIFT_200 9
#define DS1603_DATA_READ_200 (1 << DS1603_DATA_READ_SHIFT_200)
include/asm-mips/lasat/eeprom.h 0 → 100644
View file @ 1f21d2bd
#include <asm/addrspace.h>
/* lasat 100 */
#define AT93C_REG_100 KSEG1ADDR(0x1c810000)
#define AT93C_RDATA_REG_100 AT93C_REG_100
#define AT93C_RDATA_SHIFT_100 4
#define AT93C_WDATA_SHIFT_100 4
#define AT93C_CS_M_100 (1 << 5)
#define AT93C_CLK_M_100 (1 << 3)
/* lasat 200 */
#define AT93C_REG_200 KSEG1ADDR(0x11000000)
#define AT93C_RDATA_REG_200 (AT93C_REG_200+0x10000)
#define AT93C_RDATA_SHIFT_200 8
#define AT93C_WDATA_SHIFT_200 2
#define AT93C_CS_M_200 (1 << 0)
#define AT93C_CLK_M_200 (1 << 1)
include/asm-mips/lasat/head.h 0 → 100644
View file @ 1f21d2bd
/*
* Image header stuff
*/
#ifndef _HEAD_H
#define _HEAD_H
#define LASAT_K_MAGIC0_VAL 0xfedeabba
#define LASAT_K_MAGIC1_VAL 0x00bedead
#ifndef _LANGUAGE_ASSEMBLY
#include <linux/types.h>
struct bootloader_header {
u32 magic[2];
u32 version;
u32 image_start;
u32 image_size;
u32 kernel_start;
u32 kernel_entry;
};
#endif
#endif /* _HEAD_H */
include/asm-mips/lasat/lasat.h 0 → 100644
View file @ 1f21d2bd
/*
* lasat.h
*
* Thomas Horsten <thh@lasat.com>
* Copyright (C) 2000 LASAT Networks A/S.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
* Configuration for LASAT boards, loads the appropriate include files.
*/
#ifndef _LASAT_H
#define _LASAT_H
#ifndef _LANGUAGE_ASSEMBLY
extern struct lasat_misc {
volatile u32 *reset_reg;
volatile u32 *flash_wp_reg;
u32 flash_wp_bit;
} *lasat_misc;
enum lasat_mtdparts {
LASAT_MTD_BOOTLOADER,
LASAT_MTD_SERVICE,
LASAT_MTD_NORMAL,
LASAT_MTD_CONFIG,
LASAT_MTD_FS,
LASAT_MTD_LAST
};
/*
* The format of the data record in the EEPROM.
* See Documentation/LASAT/eeprom.txt for a detailed description
* of the fields in this struct, and the LASAT Hardware Configuration
* field specification for a detailed description of the config
* field.
*/
#include <linux/types.h>
#define LASAT_EEPROM_VERSION 7
struct lasat_eeprom_struct {
unsigned int version;
unsigned int cfg[3];
unsigned char hwaddr[6];
unsigned char print_partno[12];
unsigned char term0;
unsigned char print_serial[14];
unsigned char term1;
unsigned char prod_partno[12];
unsigned char term2;
unsigned char prod_serial[14];
unsigned char term3;
unsigned char passwd_hash[16];
unsigned char pwdnull;
unsigned char vendid;
unsigned char ts_ref;
unsigned char ts_signoff;
unsigned char reserved[11];
unsigned char debugaccess;
unsigned short prid;
unsigned int serviceflag;
unsigned int ipaddr;
unsigned int netmask;
unsigned int crc32;
};
struct lasat_eeprom_struct_pre7 {
unsigned int version;
unsigned int flags[3];
unsigned char hwaddr0[6];
unsigned char hwaddr1[6];
unsigned char print_partno[9];
unsigned char term0;
unsigned char print_serial[14];
unsigned char term1;
unsigned char prod_partno[9];
unsigned char term2;
unsigned char prod_serial[14];
unsigned char term3;
unsigned char passwd_hash[24];
unsigned char pwdnull;
unsigned char vendor;
unsigned char ts_ref;
unsigned char ts_signoff;
unsigned char reserved[6];
unsigned int writecount;
unsigned int ipaddr;
unsigned int netmask;
unsigned int crc32;
};
/* Configuration descriptor encoding - see the doc for details */
#define LASAT_W0_DSCTYPE(v) (((v)) & 0xf)
#define LASAT_W0_BMID(v) (((v) >> 0x04) & 0xf)
#define LASAT_W0_CPUTYPE(v) (((v) >> 0x08) & 0xf)
#define LASAT_W0_BUSSPEED(v) (((v) >> 0x0c) & 0xf)
#define LASAT_W0_CPUCLK(v) (((v) >> 0x10) & 0xf)
#define LASAT_W0_SDRAMBANKSZ(v) (((v) >> 0x14) & 0xf)
#define LASAT_W0_SDRAMBANKS(v) (((v) >> 0x18) & 0xf)
#define LASAT_W0_L2CACHE(v) (((v) >> 0x1c) & 0xf)
#define LASAT_W1_EDHAC(v) (((v)) & 0xf)
#define LASAT_W1_HIFN(v) (((v) >> 0x04) & 0x1)
#define LASAT_W1_ISDN(v) (((v) >> 0x05) & 0x1)
#define LASAT_W1_IDE(v) (((v) >> 0x06) & 0x1)
#define LASAT_W1_HDLC(v) (((v) >> 0x07) & 0x1)
#define LASAT_W1_USVERSION(v) (((v) >> 0x08) & 0x1)
#define LASAT_W1_4MACS(v) (((v) >> 0x09) & 0x1)
#define LASAT_W1_EXTSERIAL(v) (((v) >> 0x0a) & 0x1)
#define LASAT_W1_FLASHSIZE(v) (((v) >> 0x0c) & 0xf)
#define LASAT_W1_PCISLOTS(v) (((v) >> 0x10) & 0xf)
#define LASAT_W1_PCI1OPT(v) (((v) >> 0x14) & 0xf)
#define LASAT_W1_PCI2OPT(v) (((v) >> 0x18) & 0xf)
#define LASAT_W1_PCI3OPT(v) (((v) >> 0x1c) & 0xf)
/* Routines specific to LASAT boards */
#define LASAT_BMID_MASQUERADE2 0
#define LASAT_BMID_MASQUERADEPRO 1
#define LASAT_BMID_SAFEPIPE25 2
#define LASAT_BMID_SAFEPIPE50 3
#define LASAT_BMID_SAFEPIPE100 4
#define LASAT_BMID_SAFEPIPE5000 5
#define LASAT_BMID_SAFEPIPE7000 6
#define LASAT_BMID_SAFEPIPE1000 7
#if 0
#define LASAT_BMID_SAFEPIPE30 7
#define LASAT_BMID_SAFEPIPE5100 8
#define LASAT_BMID_SAFEPIPE7100 9
#endif
#define LASAT_BMID_UNKNOWN 0xf
#define LASAT_MAX_BMID_NAMES 9 /* no larger than 15! */
#define LASAT_HAS_EDHAC (1 << 0)
#define LASAT_EDHAC_FAST (1 << 1)
#define LASAT_HAS_EADI (1 << 2)
#define LASAT_HAS_HIFN (1 << 3)
#define LASAT_HAS_ISDN (1 << 4)
#define LASAT_HAS_LEASEDLINE_IF (1 << 5)
#define LASAT_HAS_HDC (1 << 6)
#define LASAT_PRID_MASQUERADE2 0
#define LASAT_PRID_MASQUERADEPRO 1
#define LASAT_PRID_SAFEPIPE25 2
#define LASAT_PRID_SAFEPIPE50 3
#define LASAT_PRID_SAFEPIPE100 4
#define LASAT_PRID_SAFEPIPE5000 5
#define LASAT_PRID_SAFEPIPE7000 6
#define LASAT_PRID_SAFEPIPE30 7
#define LASAT_PRID_SAFEPIPE5100 8
#define LASAT_PRID_SAFEPIPE7100 9
#define LASAT_PRID_SAFEPIPE1110 10
#define LASAT_PRID_SAFEPIPE3020 11
#define LASAT_PRID_SAFEPIPE3030 12
#define LASAT_PRID_SAFEPIPE5020 13
#define LASAT_PRID_SAFEPIPE5030 14
#define LASAT_PRID_SAFEPIPE1120 15
#define LASAT_PRID_SAFEPIPE1130 16
#define LASAT_PRID_SAFEPIPE6010 17
#define LASAT_PRID_SAFEPIPE6110 18
#define LASAT_PRID_SAFEPIPE6210 19
#define LASAT_PRID_SAFEPIPE1020 20
#define LASAT_PRID_SAFEPIPE1040 21
#define LASAT_PRID_SAFEPIPE1060 22
struct lasat_info {
unsigned int li_cpu_hz;
unsigned int li_bus_hz;
unsigned int li_bmid;
unsigned int li_memsize;
unsigned int li_flash_size;
unsigned int li_prid;
unsigned char li_bmstr[16];
unsigned char li_namestr[32];
unsigned char li_typestr[16];
/* Info on the Flash layout */
unsigned int li_flash_base;
unsigned long li_flashpart_base[LASAT_MTD_LAST];
unsigned long li_flashpart_size[LASAT_MTD_LAST];
struct lasat_eeprom_struct li_eeprom_info;
unsigned int li_eeprom_upgrade_version;
unsigned int li_debugaccess;
};
extern struct lasat_info lasat_board_info;
static inline unsigned long lasat_flash_partition_start(int partno)
{
if (partno < 0 || partno >= LASAT_MTD_LAST)
return 0;
return lasat_board_info.li_flashpart_base[partno];
}
static inline unsigned long lasat_flash_partition_size(int partno)
{
if (partno < 0 || partno >= LASAT_MTD_LAST)
return 0;
return lasat_board_info.li_flashpart_size[partno];
}
/* Called from setup() to initialize the global board_info struct */
extern int lasat_init_board_info(void);
/* Write the modified EEPROM info struct */
extern void lasat_write_eeprom_info(void);
#define N_MACHTYPES 2
/* for calibration of delays */
/* the lasat_ndelay function is necessary because it is used at an
* early stage of the boot process where ndelay is not calibrated.
* It is used for the bit-banging rtc and eeprom drivers */
#include <linux/delay.h>
/* calculating with the slowest board with 100 MHz clock */
#define LASAT_100_DIVIDER 20
/* All 200's run at 250 MHz clock */
#define LASAT_200_DIVIDER 8
extern unsigned int lasat_ndelay_divider;
static inline void lasat_ndelay(unsigned int ns)
{
__delay(ns / lasat_ndelay_divider);
}
#endif /* !defined (_LANGUAGE_ASSEMBLY) */
#define LASAT_SERVICEMODE_MAGIC_1 0xdeadbeef
#define LASAT_SERVICEMODE_MAGIC_2 0xfedeabba
/* Lasat 100 boards */
#define LASAT_GT_BASE (KSEG1ADDR(0x14000000))
/* Lasat 200 boards */
#define Vrc5074_PHYS_BASE 0x1fa00000
#define Vrc5074_BASE (KSEG1ADDR(Vrc5074_PHYS_BASE))
#define PCI_WINDOW1 0x1a000000
#endif /* _LASAT_H */
include/asm-mips/lasat/lasatint.h 0 → 100644
View file @ 1f21d2bd
#define LASATINT_END 16
/* lasat 100 */
#define LASAT_INT_STATUS_REG_100 (KSEG1ADDR(0x1c880000))
#define LASAT_INT_MASK_REG_100 (KSEG1ADDR(0x1c890000))
#define LASATINT_MASK_SHIFT_100 0
/* lasat 200 */
#define LASAT_INT_STATUS_REG_200 (KSEG1ADDR(0x1104003c))
#define LASAT_INT_MASK_REG_200 (KSEG1ADDR(0x1104003c))
#define LASATINT_MASK_SHIFT_200 16
include/asm-mips/lasat/picvue.h 0 → 100644
View file @ 1f21d2bd
/* Lasat 100 */
#define PVC_REG_100 KSEG1ADDR(0x1c820000)
#define PVC_DATA_SHIFT_100 0
#define PVC_DATA_M_100 0xFF
#define PVC_E_100 (1 << 8)
#define PVC_RW_100 (1 << 9)
#define PVC_RS_100 (1 << 10)
/* Lasat 200 */
#define PVC_REG_200 KSEG1ADDR(0x11000000)
#define PVC_DATA_SHIFT_200 24
#define PVC_DATA_M_200 (0xFF << PVC_DATA_SHIFT_200)
#define PVC_E_200 (1 << 16)
#define PVC_RW_200 (1 << 17)
#define PVC_RS_200 (1 << 18)
include/asm-mips/lasat/serial.h 0 → 100644
View file @ 1f21d2bd
#include <asm/lasat/lasat.h>
/* Lasat 100 boards serial configuration */
#define LASAT_BASE_BAUD_100 (7372800 / 16)
#define LASAT_UART_REGS_BASE_100 0x1c8b0000
#define LASAT_UART_REGS_SHIFT_100 2
#define LASATINT_UART_100 8
/* * LASAT 200 boards serial configuration */
#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12)
#define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300)
#define LASAT_UART_REGS_SHIFT_200 3
#define LASATINT_UART_200 13
include/asm-mips/mach-lasat/mach-gt64120.h 0 → 100644
View file @ 1f21d2bd
/*
* This is a direct copy of the ev96100.h file, with a global
* search and replace. The numbers are the same.
*
* The reason I'm duplicating this is so that the 64120/96100
* defines won't be confusing in the source code.
*/
#ifndef _ASM_GT64120_LASAT_GT64120_DEP_H
#define _ASM_GT64120_LASAT_GT64120_DEP_H
/*
* GT64120 config space base address on Lasat 100
*/
#define GT64120_BASE (KSEG1ADDR(0x14000000))
/*
* PCI Bus allocation
*
* (Guessing ...)
*/
#define GT_PCI_MEM_BASE 0x12000000UL
#define GT_PCI_MEM_SIZE 0x02000000UL
#define GT_PCI_IO_BASE 0x10000000UL
#define GT_PCI_IO_SIZE 0x02000000UL
#define GT_ISA_IO_BASE PCI_IO_BASE
#endif /* _ASM_GT64120_LASAT_GT64120_DEP_H */
include/asm-mips/nile4.h 0 → 100644
View file @ 1f21d2bd
/*
* asm-mips/nile4.h -- NEC Vrc-5074 Nile 4 definitions
*
* Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
* Sony Software Development Center Europe (SDCE), Brussels
*
* This file is based on the following documentation:
*
* NEC Vrc 5074 System Controller Data Sheet, June 1998
*/
#ifndef _ASM_NILE4_H
#define _ASM_NILE4_H
#define NILE4_BASE 0xbfa00000
#define NILE4_SIZE 0x00200000 /* 2 MB */
/*
* Physical Device Address Registers (PDARs)
*/
#define NILE4_SDRAM0 0x0000 /* SDRAM Bank 0 [R/W] */
#define NILE4_SDRAM1 0x0008 /* SDRAM Bank 1 [R/W] */
#define NILE4_DCS2 0x0010 /* Device Chip-Select 2 [R/W] */
#define NILE4_DCS3 0x0018 /* Device Chip-Select 3 [R/W] */
#define NILE4_DCS4 0x0020 /* Device Chip-Select 4 [R/W] */
#define NILE4_DCS5 0x0028 /* Device Chip-Select 5 [R/W] */
#define NILE4_DCS6 0x0030 /* Device Chip-Select 6 [R/W] */
#define NILE4_DCS7 0x0038 /* Device Chip-Select 7 [R/W] */
#define NILE4_DCS8 0x0040 /* Device Chip-Select 8 [R/W] */
#define NILE4_PCIW0 0x0060 /* PCI Address Window 0 [R/W] */
#define NILE4_PCIW1 0x0068 /* PCI Address Window 1 [R/W] */
#define NILE4_INTCS 0x0070 /* Controller Internal Registers and Devices */
/* [R/W] */
#define NILE4_BOOTCS 0x0078 /* Boot ROM Chip-Select [R/W] */
/*
* CPU Interface Registers
*/
#define NILE4_CPUSTAT 0x0080 /* CPU Status [R/W] */
#define NILE4_INTCTRL 0x0088 /* Interrupt Control [R/W] */
#define NILE4_INTSTAT0 0x0090 /* Interrupt Status 0 [R] */
#define NILE4_INTSTAT1 0x0098 /* Interrupt Status 1 and CPU Interrupt */
/* Enable [R/W] */
#define NILE4_INTCLR 0x00A0 /* Interrupt Clear [R/W] */
#define NILE4_INTPPES 0x00A8 /* PCI Interrupt Control [R/W] */
/*
* Memory-Interface Registers
*/
#define NILE4_MEMCTRL 0x00C0 /* Memory Control */
#define NILE4_ACSTIME 0x00C8 /* Memory Access Timing [R/W] */
#define NILE4_CHKERR 0x00D0 /* Memory Check Error Status [R] */
/*
* PCI-Bus Registers
*/
#define NILE4_PCICTRL 0x00E0 /* PCI Control [R/W] */
#define NILE4_PCIARB 0x00E8 /* PCI Arbiter [R/W] */
#define NILE4_PCIINIT0 0x00F0 /* PCI Master (Initiator) 0 [R/W] */
#define NILE4_PCIINIT1 0x00F8 /* PCI Master (Initiator) 1 [R/W] */
#define NILE4_PCIERR 0x00B8 /* PCI Error [R/W] */
/*
* Local-Bus Registers
*/
#define NILE4_LCNFG 0x0100 /* Local Bus Configuration [R/W] */
#define NILE4_LCST2 0x0110 /* Local Bus Chip-Select Timing 2 [R/W] */
#define NILE4_LCST3 0x0118 /* Local Bus Chip-Select Timing 3 [R/W] */
#define NILE4_LCST4 0x0120 /* Local Bus Chip-Select Timing 4 [R/W] */
#define NILE4_LCST5 0x0128 /* Local Bus Chip-Select Timing 5 [R/W] */
#define NILE4_LCST6 0x0130 /* Local Bus Chip-Select Timing 6 [R/W] */
#define NILE4_LCST7 0x0138 /* Local Bus Chip-Select Timing 7 [R/W] */
#define NILE4_LCST8 0x0140 /* Local Bus Chip-Select Timing 8 [R/W] */
#define NILE4_DCSFN 0x0150 /* Device Chip-Select Muxing and Output */
/* Enables [R/W] */
#define NILE4_DCSIO 0x0158 /* Device Chip-Selects As I/O Bits [R/W] */
#define NILE4_BCST 0x0178 /* Local Boot Chip-Select Timing [R/W] */
/*
* DMA Registers
*/
#define NILE4_DMACTRL0 0x0180 /* DMA Control 0 [R/W] */
#define NILE4_DMASRCA0 0x0188 /* DMA Source Address 0 [R/W] */
#define NILE4_DMADESA0 0x0190 /* DMA Destination Address 0 [R/W] */
#define NILE4_DMACTRL1 0x0198 /* DMA Control 1 [R/W] */
#define NILE4_DMASRCA1 0x01A0 /* DMA Source Address 1 [R/W] */
#define NILE4_DMADESA1 0x01A8 /* DMA Destination Address 1 [R/W] */
/*
* Timer Registers
*/
#define NILE4_T0CTRL 0x01C0 /* SDRAM Refresh Control [R/W] */
#define NILE4_T0CNTR 0x01C8 /* SDRAM Refresh Counter [R/W] */
#define NILE4_T1CTRL 0x01D0 /* CPU-Bus Read Time-Out Control [R/W] */
#define NILE4_T1CNTR 0x01D8 /* CPU-Bus Read Time-Out Counter [R/W] */
#define NILE4_T2CTRL 0x01E0 /* General-Purpose Timer Control [R/W] */
#define NILE4_T2CNTR 0x01E8 /* General-Purpose Timer Counter [R/W] */
#define NILE4_T3CTRL 0x01F0 /* Watchdog Timer Control [R/W] */
#define NILE4_T3CNTR 0x01F8 /* Watchdog Timer Counter [R/W] */
/*
* PCI Configuration Space Registers
*/
#define NILE4_PCI_BASE 0x0200
#define NILE4_VID 0x0200 /* PCI Vendor ID [R] */
#define NILE4_DID 0x0202 /* PCI Device ID [R] */
#define NILE4_PCICMD 0x0204 /* PCI Command [R/W] */
#define NILE4_PCISTS 0x0206 /* PCI Status [R/W] */
#define NILE4_REVID 0x0208 /* PCI Revision ID [R] */
#define NILE4_CLASS 0x0209 /* PCI Class Code [R] */
#define NILE4_CLSIZ 0x020C /* PCI Cache Line Size [R/W] */
#define NILE4_MLTIM 0x020D /* PCI Latency Timer [R/W] */
#define NILE4_HTYPE 0x020E /* PCI Header Type [R] */
#define NILE4_BIST 0x020F /* BIST [R] (unimplemented) */
#define NILE4_BARC 0x0210 /* PCI Base Address Register Control [R/W] */
#define NILE4_BAR0 0x0218 /* PCI Base Address Register 0 [R/W] */
#define NILE4_BAR1 0x0220 /* PCI Base Address Register 1 [R/W] */
#define NILE4_CIS 0x0228 /* PCI Cardbus CIS Pointer [R] */
/* (unimplemented) */
#define NILE4_SSVID 0x022C /* PCI Sub-System Vendor ID [R/W] */
#define NILE4_SSID 0x022E /* PCI Sub-System ID [R/W] */
#define NILE4_ROM 0x0230 /* Expansion ROM Base Address [R] */
/* (unimplemented) */
#define NILE4_INTLIN 0x023C /* PCI Interrupt Line [R/W] */
#define NILE4_INTPIN 0x023D /* PCI Interrupt Pin [R] */
#define NILE4_MINGNT 0x023E /* PCI Min_Gnt [R] (unimplemented) */
#define NILE4_MAXLAT 0x023F /* PCI Max_Lat [R] (unimplemented) */
#define NILE4_BAR2 0x0240 /* PCI Base Address Register 2 [R/W] */
#define NILE4_BAR3 0x0248 /* PCI Base Address Register 3 [R/W] */
#define NILE4_BAR4 0x0250 /* PCI Base Address Register 4 [R/W] */
#define NILE4_BAR5 0x0258 /* PCI Base Address Register 5 [R/W] */
#define NILE4_BAR6 0x0260 /* PCI Base Address Register 6 [R/W] */
#define NILE4_BAR7 0x0268 /* PCI Base Address Register 7 [R/W] */
#define NILE4_BAR8 0x0270 /* PCI Base Address Register 8 [R/W] */
#define NILE4_BARB 0x0278 /* PCI Base Address Register BOOT [R/W] */
/*
* Serial-Port Registers
*/
#define NILE4_UART_BASE 0x0300
#define NILE4_UARTRBR 0x0300 /* UART Receiver Data Buffer [R] */
#define NILE4_UARTTHR 0x0300 /* UART Transmitter Data Holding [W] */
#define NILE4_UARTIER 0x0308 /* UART Interrupt Enable [R/W] */
#define NILE4_UARTDLL 0x0300 /* UART Divisor Latch LSB [R/W] */
#define NILE4_UARTDLM 0x0308 /* UART Divisor Latch MSB [R/W] */
#define NILE4_UARTIIR 0x0310 /* UART Interrupt ID [R] */
#define NILE4_UARTFCR 0x0310 /* UART FIFO Control [W] */
#define NILE4_UARTLCR 0x0318 /* UART Line Control [R/W] */
#define NILE4_UARTMCR 0x0320 /* UART Modem Control [R/W] */
#define NILE4_UARTLSR 0x0328 /* UART Line Status [R/W] */
#define NILE4_UARTMSR 0x0330 /* UART Modem Status [R/W] */
#define NILE4_UARTSCR 0x0338 /* UART Scratch [R/W] */
#define NILE4_UART_BASE_BAUD 520833 /* 100 MHz / 12 / 16 */
/*
* Interrupt Lines
*/
#define NILE4_INT_CPCE 0 /* CPU-Interface Parity-Error Interrupt */
#define NILE4_INT_CNTD 1 /* CPU No-Target Decode Interrupt */
#define NILE4_INT_MCE 2 /* Memory-Check Error Interrupt */
#define NILE4_INT_DMA 3 /* DMA Controller Interrupt */
#define NILE4_INT_UART 4 /* UART Interrupt */
#define NILE4_INT_WDOG 5 /* Watchdog Timer Interrupt */
#define NILE4_INT_GPT 6 /* General-Purpose Timer Interrupt */
#define NILE4_INT_LBRTD 7 /* Local-Bus Ready Timer Interrupt */
#define NILE4_INT_INTA 8 /* PCI Interrupt Signal INTA# */
#define NILE4_INT_INTB 9 /* PCI Interrupt Signal INTB# */
#define NILE4_INT_INTC 10 /* PCI Interrupt Signal INTC# */
#define NILE4_INT_INTD 11 /* PCI Interrupt Signal INTD# */
#define NILE4_INT_INTE 12 /* PCI Interrupt Signal INTE# (ISA cascade) */
#define NILE4_INT_RESV 13 /* Reserved */
#define NILE4_INT_PCIS 14 /* PCI SERR# Interrupt */
#define NILE4_INT_PCIE 15 /* PCI Internal Error Interrupt */
/*
* Nile 4 Register Access
*/
static inline void nile4_sync(void)
{
volatile u32 *p = (volatile u32 *)0xbfc00000;
(void)(*p);
}
static inline void nile4_out32(u32 offset, u32 val)
{
*(volatile u32 *)(NILE4_BASE+offset) = val;
nile4_sync();
}
static inline u32 nile4_in32(u32 offset)
{
u32 val = *(volatile u32 *)(NILE4_BASE+offset);
nile4_sync();
return val;
}
static inline void nile4_out16(u32 offset, u16 val)
{
*(volatile u16 *)(NILE4_BASE+offset) = val;
nile4_sync();
}
static inline u16 nile4_in16(u32 offset)
{
u16 val = *(volatile u16 *)(NILE4_BASE+offset);
nile4_sync();
return val;
}
static inline void nile4_out8(u32 offset, u8 val)
{
*(volatile u8 *)(NILE4_BASE+offset) = val;
nile4_sync();
}
static inline u8 nile4_in8(u32 offset)
{
u8 val = *(volatile u8 *)(NILE4_BASE+offset);
nile4_sync();
return val;
}
/*
* Physical Device Address Registers
*/
extern void nile4_set_pdar(u32 pdar, u32 phys, u32 size, int width,
int on_memory_bus, int visible);
/*
* PCI Master Registers
*/
#define NILE4_PCICMD_IACK 0 /* PCI Interrupt Acknowledge */
#define NILE4_PCICMD_IO 1 /* PCI I/O Space */
#define NILE4_PCICMD_MEM 3 /* PCI Memory Space */
#define NILE4_PCICMD_CFG 5 /* PCI Configuration Space */
/*
* PCI Address Spaces
*
* Note that these are multiplexed using PCIINIT[01]!
*/
#define NILE4_PCI_IO_BASE 0xa6000000
#define NILE4_PCI_MEM_BASE 0xa8000000
#define NILE4_PCI_CFG_BASE NILE4_PCI_MEM_BASE
#define NILE4_PCI_IACK_BASE NILE4_PCI_IO_BASE
extern void nile4_set_pmr(u32 pmr, u32 type, u32 addr);
/*
* Interrupt Programming
*/
#define NUM_I8259_INTERRUPTS 16
#define NUM_NILE4_INTERRUPTS 16
#define IRQ_I8259_CASCADE NILE4_INT_INTE
#define is_i8259_irq(irq) ((irq) < NUM_I8259_INTERRUPTS)
#define nile4_to_irq(n) ((n)+NUM_I8259_INTERRUPTS)
#define irq_to_nile4(n) ((n)-NUM_I8259_INTERRUPTS)
extern void nile4_map_irq(int nile4_irq, int cpu_irq);
extern void nile4_map_irq_all(int cpu_irq);
extern void nile4_enable_irq(unsigned int nile4_irq);
extern void nile4_disable_irq(unsigned int nile4_irq);
extern void nile4_disable_irq_all(void);
extern u16 nile4_get_irq_stat(int cpu_irq);
extern void nile4_enable_irq_output(int cpu_irq);
extern void nile4_disable_irq_output(int cpu_irq);
extern void nile4_set_pci_irq_polarity(int pci_irq, int high);
extern void nile4_set_pci_irq_level_or_edge(int pci_irq, int level);
extern void nile4_clear_irq(int nile4_irq);
extern void nile4_clear_irq_mask(u32 mask);
extern u8 nile4_i8259_iack(void);
extern void nile4_dump_irq_status(void); /* Debug */
#endif
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